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Sun, 19 Apr 2026 16:17:30 -0700 (PDT) Received: from [192.168.3.100] ([151.41.218.6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-488fc177dafsm296195175e9.4.2026.04.19.16.17.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 19 Apr 2026 16:17:30 -0700 (PDT) Message-ID: <463ab3cf-2ef2-4ba1-9f3b-7dfad523d91e@baylibre.com> Date: Mon, 20 Apr 2026 01:17:27 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC v2 02/11] ASoC: meson: aiu-encoder-i2s: use gx_iface and gx_stream structures To: Jerome Brunet Cc: Mark Brown , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org References: <20260411-audin-rfc-v2-0-4c8a6ec5fcab@baylibre.com> <20260411-audin-rfc-v2-2-4c8a6ec5fcab@baylibre.com> <58d1df89-7c97-4e2f-af15-93d1f7bce5a7@sirena.org.uk> <1jy0ios3f9.fsf@starbuckisacylon.baylibre.com> Content-Language: en-US From: Valerio Setti In-Reply-To: <1jy0ios3f9.fsf@starbuckisacylon.baylibre.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260419_161733_465597_98818E93 X-CRM114-Status: GOOD ( 20.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 4/15/26 16:28, Jerome Brunet wrote: > > Huh interresting, I had not thought of that. Valerio and I discussed the > clock part a lot for this rework. It is the crux since since the > interface and clock setting lives in the AIU subsys but serves both the > AIU and AUDIN subsys. > > Valerio maybe you could keep function above just to set the rate, but > enabling the clocks through a DAPM supply widget ? This is kind of what > the AXG is doing. > > what do you think ? > > (actually in the AXG the each formatter widget call CCF > clk_prepare_enable() but a supply widget poking the register would do > the same thing) > Hi Jerome, thanks for your review and suggestion. I took some time to investigate it and I think I have a different proposal that reduces the amount of changes compared to the current implementation, but gets to the same result. The thing is in "axg-tdm-interface.c" MCLK is enabled/disabled using "set_bias_level()" callback which works fine because in that case the interface driver is also a standalone component. On the GX platform the interface is a DAI which is part of the AIU component, so this callback isn't available. To get the same behavior I would need to add a new DAPM widget in "aiu_cpu_dapm_widgets[]" and then add it to both "aiu_cpu_dapm_routes[]" both in "aiu.c" and in the device-tree for AUDIN. What if instead I add the "prepare()" callback to "aiu_encoder_i2s_dai_ops" and enable MCLK and I2S clock divider there? This would match "hw_free()" calls and it would be a change only internal to "aiu-encoder-i2s.c". To support this I will: - remove calls to "gx_stream_set_cont_clocks" which are arguably not very useful for the GX platform; - use the "clk_enabled" field of "struct gx_stream" (unused after removal of "gx_stream_set_cont_clocks" calls) to track the status of MCLK and enable/disable it only when necessary (ex: prevent multiple calls to "prepare" to enable MCLK multiple times, etc); - keep using "snd_soc_dai_active" in "hw_free" to know when to disable the I2S clock divider. Or perhaps I can rely on "clk_enabled" also for this one so that I can manage these 2 clocks uniformly. Is this an acceptable alternative approach for you? -- Valerio