From: "Sven Peter" <sven@svenpeter.dev>
To: "Nick Chan" <towinchenmi@gmail.com>,
"Janne Grunau" <j@jannau.net>,
"Alyssa Rosenzweig" <alyssa@rosenzweig.io>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>
Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/9] arm64: dts: apple: Add CPU cache information for Apple A7-A11, T2 SoCs
Date: Sat, 01 Mar 2025 12:11:54 +0100 [thread overview]
Message-ID: <4670e5f8-2a92-46bd-8faa-dd3774517f3e@app.fastmail.com> (raw)
In-Reply-To: <20250220-caches-v1-0-2c7011097768@gmail.com>
Hi,
On Thu, Feb 20, 2025, at 13:21, Nick Chan wrote:
> Add CPU cache information for Apple A7-A11, T2 SoCs. On Apple
> A10 (T8010), A10X (T8011), T2 (T8012), only the caches in one of the
> CPU clusters can be used due to the "Apple Fusion Architecture"
> big.LITTLE switcher. The values for the P-cluster is used in this
> case.
So this means that the cache information will be "wrong" when the CPU
is in the lower power states and only correct for the higher ones?
I'm not familiar with how these values are used; are you and do you
know if this will have any weird or unexpected effects?
Would it be better to use the cache size for the lower rather than
the higher states or does this not matter much?
Best,
Sven
next prev parent reply other threads:[~2025-03-01 11:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-20 12:21 [PATCH 0/9] arm64: dts: apple: Add CPU cache information for Apple A7-A11, T2 SoCs Nick Chan
2025-02-20 12:21 ` [PATCH 1/9] arm64: dts: apple: s5l8960x: Add CPU caches Nick Chan
2025-02-20 12:21 ` [PATCH 2/9] arm64: dts: apple: t7000: " Nick Chan
2025-02-20 12:21 ` [PATCH 3/9] arm64: dts: apple: t7001: " Nick Chan
2025-02-20 12:21 ` [PATCH 4/9] arm64: dts: apple: s800-0-3: " Nick Chan
2025-02-20 12:21 ` [PATCH 5/9] arm64: dts: apple: s8001: " Nick Chan
2025-02-20 12:21 ` [PATCH 6/9] arm64: dts: apple: t8010: " Nick Chan
2025-02-20 12:21 ` [PATCH 7/9] arm64: dts: apple: t8011: " Nick Chan
2025-02-20 12:21 ` [PATCH 8/9] arm64: dts: apple: t8012: " Nick Chan
2025-02-20 12:21 ` [PATCH 9/9] arm64: dts: apple: t8015: " Nick Chan
2025-03-01 11:11 ` Sven Peter [this message]
2025-03-01 12:32 ` [PATCH 0/9] arm64: dts: apple: Add CPU cache information for Apple A7-A11, T2 SoCs Nick Chan
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