From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AD6FC4332F for ; Thu, 3 Nov 2022 14:53:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Fnyho/NRSkRoM1RdeTBjhJWg4j6tHR90DUmQRkyGkiM=; b=q9PjD1TMXEJ1K0 T0pvSaD7CMCGCFsFJgO+RUxP/bWx5bsN8IkK4bjXhzBwgRJFWPeHgXzvj8UxGiAq+JU97JRgD3y6G pNbxru7vI/ll0Ofm8L7jDA1nq+u9ma7FAQlK1G5IIdlk8Vy7N5EY7zxYl9/MJX0l4oNZElkYQjyvM kB3PwOTA7mBzsTnMK7L/ti1vFzaL4/zZvod/qsM2EZ/ddurssM9rewkf3w5DDfWGBtA5Ixzy+XmJK Dg6mKBeKSiXhOaFGTvm+h0YFbAHpT8x8kw8vbt47svriv1FMbz9PFzbY80yHlL4P888X3sNT2yZfu tKVivPbpQ51Rm69kwJcA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqbZq-0009wj-Ai; Thu, 03 Nov 2022 14:52:18 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqbZm-0009tB-7B; Thu, 03 Nov 2022 14:52:16 +0000 Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oqbZd-0006qR-Fy; Thu, 03 Nov 2022 15:52:05 +0100 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch Cc: Joerg Roedel , Will Deacon , Robin Murphy , Benjamin Gaignard , Simon Xue , Michael Riesch Subject: Re: [PATCH] iommu/rockchip: fix permission bits in page table entries v2 Date: Thu, 03 Nov 2022 15:52:04 +0100 Message-ID: <4780234.31r3eYUQgx@diego> In-Reply-To: <20221102063553.2464161-1-michael.riesch@wolfvision.net> References: <20221102063553.2464161-1-michael.riesch@wolfvision.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221103_075214_299065_A0D2F012 X-CRM114-Status: GOOD ( 21.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Am Mittwoch, 2. November 2022, 07:35:53 CET schrieb Michael Riesch: > As pointed out in the corresponding downstream fix [0], the permission bits > of the page table entries are compatible between v1 and v2 of the IOMMU. > This is in contrast to the current mainline code that incorrectly assumes > that the read and write permission bits are switched. Fix the permission > bits by reusing the v1 bit defines. > > [0] https://github.com/rockchip-linux/kernel/commit/e3bc123a2260145e34b57454da3db0edd117eb8e > > Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") > Signed-off-by: Michael Riesch Reviewed-by: Heiko Stuebner > --- > drivers/iommu/rockchip-iommu.c | 10 ++++------ > 1 file changed, 4 insertions(+), 6 deletions(-) > > diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c > index a3fc59b814ab..a68eadd64f38 100644 > --- a/drivers/iommu/rockchip-iommu.c > +++ b/drivers/iommu/rockchip-iommu.c > @@ -280,19 +280,17 @@ static u32 rk_mk_pte(phys_addr_t page, int prot) > * 11:9 - Page address bit 34:32 > * 8:4 - Page address bit 39:35 > * 3 - Security > - * 2 - Readable > - * 1 - Writable > + * 2 - Writable > + * 1 - Readable > * 0 - 1 if Page @ Page address is valid > */ > -#define RK_PTE_PAGE_READABLE_V2 BIT(2) > -#define RK_PTE_PAGE_WRITABLE_V2 BIT(1) > > static u32 rk_mk_pte_v2(phys_addr_t page, int prot) > { > u32 flags = 0; > > - flags |= (prot & IOMMU_READ) ? RK_PTE_PAGE_READABLE_V2 : 0; > - flags |= (prot & IOMMU_WRITE) ? RK_PTE_PAGE_WRITABLE_V2 : 0; > + flags |= (prot & IOMMU_READ) ? RK_PTE_PAGE_READABLE : 0; > + flags |= (prot & IOMMU_WRITE) ? RK_PTE_PAGE_WRITABLE : 0; > > return rk_mk_dte_v2(page) | flags; > } > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel