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Wed, 05 Mar 2025 23:21:14 +0100 From: Heiko Stuebner To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Philipp Zabel , Catalin Marinas , Will Deacon , Sugar Zhang , Nicolas Frattaroli Cc: Luca Ceresoli , Sebastian Reichel , kernel@collabora.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, Nicolas Frattaroli Subject: Re: [PATCH 2/7] clk: rockchip: add support for GRF gated clocks Date: Wed, 05 Mar 2025 23:21:12 +0100 Message-ID: <4964374.GXAFRqVoOG@phil> In-Reply-To: <20250305-rk3576-sai-v1-2-64e6cf863e9a@collabora.com> References: <20250305-rk3576-sai-v1-0-64e6cf863e9a@collabora.com> <20250305-rk3576-sai-v1-2-64e6cf863e9a@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250305_222132_635546_FD5A1FA7 X-CRM114-Status: GOOD ( 22.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hey, Am Mittwoch, 5. M=C3=A4rz 2025, 22:24:22 MEZ schrieb Nicolas Frattaroli: > Certain Rockchip SoCs, the RK3576 in particular, have some clocks that > are essentially gated behind an additional GRF write. Downstream uses an > additional entirely separate clock driver that maps over the same > address range as ioc_grf in the DT. >=20 > Instead, this implementation introduces a new gate type, GRF gates. > These gates function quite like regular gates. In effect, this means > they'll only be enabled if the clock is used, which I feel is a more > appropriate way to describe this compared to doing it in, say, pinctrl, > or even in the drivers of the respective clock consumers such as SAI. >=20 > It should be noted that RK3588 has similar GRF-gated clocks, but has > gotten away with not having to deal with any of this because the clocks > are ungated by the hardware's register reset value by default. The > RK3576 is not so lucky, and the hardware's reset value gates them > instead, which means we'll have to ungate them somewhere. >=20 > In order to facilitate the GRF gating on RK3576, we introduce the > concept of auxiliary GRFs. The RK3576 has several defined GRF nodes, and > so far it could get away with just using one for MUXGRF by reassigning > the clock provider's grf member. >=20 > However, with the IOC GRF gated clocks, we now also need access to the > IOC GRF, so we can't get away with this anymore. Instead, we add a > hashtable to the clock provider struct, keyed by a grf type enum. The > clock branches can then specify through the use of a new member of that > enum's type (with corresponding changes to relevant macros) which GRF > range they would like to use. >=20 > The SoC-specific clk_init can then populate the hashtable with the GRFs > that it needs. This way, GRF-dependent clock branches don't have to be > registered in a different step than everything else, as they would need > to be had I extended the branch struct to instead take a pointer to a > GRF, which isn't available at the time most of our branches are defined. >=20 > Signed-off-by: Nicolas Frattaroli I only did a short look through the patch and didn't see anything glaringly wrong, but this wants to be at least 3 patches: =2D add the handling (hash-table etc) for multiple grfs (including adapting the grf-mux) =2D adding the grf-gate clock-type =2D adding the rk3576 grf-gates Heiko