[PATCH] ep93xx: Add support for Snapper CL15 module

[PATCH] ep93xx: Add support for Snapper CL15 module

[Ryan Mallon]

Add support for the Bluewater Systems Snapper CL15 single board computer
module.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Cc: Hartley Sweeten <hartleys@visionengravers.com>

---

diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 9167c3d..71eabca 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -168,6 +168,13 @@ config MACH_TS72XX
 	  Say 'Y' here if you want your kernel to support the
 	  Technologic Systems TS-72xx board.
 
+config MACH_SNAPPER_CL15
+	bool "Support Bluewater Systems Snapper CL15 Module"
+	depends on EP93XX_SDCE0_PHYS_OFFSET
+	help
+	  Say 'Y' here if you want your kernel to support the Bluewater
+	  Systems Snapper CL15 Module.
+
 choice
 	prompt "Select a UART for early kernel messages"
 
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index eae6199..41e5d85 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_MACH_EDB93XX)	+= edb93xx.o
 obj-$(CONFIG_MACH_GESBC9312)	+= gesbc9312.o
 obj-$(CONFIG_MACH_MICRO9)	+= micro9.o
 obj-$(CONFIG_MACH_TS72XX)	+= ts72xx.o
+obj-$(CONFIG_MACH_SNAPPER_CL15)	+= snappercl15.o
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
new file mode 100644
index 0000000..2805f4d
--- /dev/null
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -0,0 +1,185 @@
+/*
+ * arch/arm/mach-ep93xx/snappercl15.c
+ * Bluewater Systems Snapper CL15 system module
+ *
+ * Copyright (C) 2009 Bluewater Systems Ltd
+ * Author: Ryan Mallon <ryan@bluewatersys.com>
+ *
+ * NAND code adapted from driver by:
+ *   Andre Renaud <andre@bluewatersys.com>
+ *   James R. McKaskill
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/fb.h>
+
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+
+#include <mach/hardware.h>
+#include <mach/fb.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + 0x01000000)
+
+#define SNAPPERCL15_NAND_CTRL	(1 << 6)
+#define SNAPPERCL15_NAND_WPN	(1 << 8)
+#define SNAPPERCL15_NAND_ALE	(1 << 9)
+#define SNAPPERCL15_NAND_CLE	(1 << 10)
+#define SNAPPERCL15_NAND_CEN	(1 << 11)
+#define SNAPPERCL15_NAND_RDY	(1 << 14)
+
+#define NAND_CTRL_ADDR(chip)						\
+	((void __iomem *)((unsigned long)chip->IO_ADDR_W + 0x40))
+
+static unsigned long nand_state;
+
+static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+				      unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd->priv;
+	static int first = 1;
+	unsigned set;
+
+	if (first) {
+		nand_state = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
+		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+		first = 0;
+	}
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		set = SNAPPERCL15_NAND_CEN;
+
+		if (ctrl & NAND_NCE)
+			set &= ~SNAPPERCL15_NAND_CEN;
+		if (ctrl & NAND_CLE)
+			set |= SNAPPERCL15_NAND_CLE;
+		if (ctrl & NAND_ALE)
+			set |= SNAPPERCL15_NAND_ALE;
+
+		nand_state &= ~(SNAPPERCL15_NAND_CEN |
+				SNAPPERCL15_NAND_CLE |
+				SNAPPERCL15_NAND_ALE);
+		nand_state |= set;
+		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+	}
+
+	if (cmd != NAND_CMD_NONE)
+		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
+}
+
+static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd->priv;
+
+	return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
+}
+
+static struct mtd_partition snappercl15_nand_partitions[] = {
+	{
+		.name		= "Kernel",
+		.offset		= 0,
+		.size		= SZ_2M,
+	},
+	{
+		.name		= "Filesystem",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= MTDPART_SIZ_FULL,
+	},
+};
+
+static void snappercl15_nand_set_parts(uint64_t size,
+				       struct platform_nand_chip *chip)
+{
+	pr_info("Snapper CL15: %llu bytes NAND\n", size);
+	chip->partitions = snappercl15_nand_partitions;
+	chip->nr_partitions = ARRAY_SIZE(snappercl15_nand_partitions);
+}
+
+static struct platform_nand_data snappercl15_nand_data = {
+	.chip = {
+		.nr_chips	= 1,
+		.set_parts	= snappercl15_nand_set_parts,
+		.options	= NAND_NO_AUTOINCR,
+		.chip_delay	= 25,
+	},
+	.ctrl = {
+		.dev_ready	= snappercl15_nand_dev_ready,
+		.cmd_ctrl	= snappercl15_nand_cmd_ctrl,
+	},
+};
+
+static struct resource snappercl15_nand_resource[] = {
+	{
+		.start		= SNAPPERCL15_NAND_BASE,
+		.end		= SNAPPERCL15_NAND_BASE + SZ_4K - 1,
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device snappercl15_nand_device = {
+	.name			= "gen_nand",
+	.id			= -1,
+	.dev.platform_data	= &snappercl15_nand_data,
+	.resource		= snappercl15_nand_resource,
+	.num_resources		= ARRAY_SIZE(snappercl15_nand_resource),
+};
+
+static struct ep93xx_eth_data snappercl15_eth_data = {
+	.phy_id			= 1,
+};
+
+static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = {
+	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,
+	.sda_is_open_drain	= 0,
+	.scl_pin		= EP93XX_GPIO_LINE_EECLK,
+	.scl_is_open_drain	= 0,
+	.udelay			= 0,
+	.timeout		= 0,
+};
+
+static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
+	{
+		/* Audio codec */
+		I2C_BOARD_INFO("tlv320aic23", 0x1a),
+	},
+};
+
+static struct ep93xxfb_mach_info snappercl15_fb_info = {
+	.num_modes		= EP93XXFB_USE_MODEDB,
+	.bpp			= 16,
+};
+
+static void __init snappercl15_init_machine(void)
+{
+	ep93xx_init_devices();
+	ep93xx_register_eth(&snappercl15_eth_data, 1);
+	ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
+			    ARRAY_SIZE(snappercl15_i2c_data));
+	ep93xx_register_fb(&snappercl15_fb_info);
+	platform_device_register(&snappercl15_nand_device);
+}
+
+MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
+	/* Maintainer: Ryan Mallon <ryan@bluewatersys.com> */
+	.phys_io	= EP93XX_APB_PHYS_BASE,
+	.io_pg_offst	= ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= EP93XX_SDCE0_PHYS_BASE + 0x100,
+	.map_io		= ep93xx_map_io,
+	.init_irq	= ep93xx_init_irq,
+	.timer 		= &ep93xx_timer,
+	.init_machine	= snappercl15_init_machine,
+MACHINE_END

[PATCH] ep93xx: Add support for Snapper CL15 module

[H Hartley Sweeten]

On Thursday, February 04, 2010 1:58 PM, Ryan Mallon wrote:
> Add support for the Bluewater Systems Snapper CL15 single board computer
> module.
> 
> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
> Cc: Hartley Sweeten <hartleys@visionengravers.com>
> 
> ---
> 
> diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
> index 9167c3d..71eabca 100644
> --- a/arch/arm/mach-ep93xx/Kconfig
> +++ b/arch/arm/mach-ep93xx/Kconfig
> @@ -168,6 +168,13 @@ config MACH_TS72XX
>  	  Say 'Y' here if you want your kernel to support the
>  	  Technologic Systems TS-72xx board.
>  
> +config MACH_SNAPPER_CL15
> +	bool "Support Bluewater Systems Snapper CL15 Module"
> +	depends on EP93XX_SDCE0_PHYS_OFFSET
> +	help
> +	  Say 'Y' here if you want your kernel to support the Bluewater
> +	  Systems Snapper CL15 Module.
> +

Your will need to base this patch on Russell's -devel tree.  The Sim.One
board is now in that.

Also, please move this so that they stay alphabetized:

config MACH_SIM_ONE
...
+config MACH_SNAPPER_CL15
+...
config MACH_TS72XX
...

>  choice
>  	prompt "Select a UART for early kernel messages"
> diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
> index eae6199..41e5d85 100644
> --- a/arch/arm/mach-ep93xx/Makefile
> +++ b/arch/arm/mach-ep93xx/Makefile
> @@ -11,3 +11,4 @@ obj-$(CONFIG_MACH_EDB93XX)	+= edb93xx.o
>  obj-$(CONFIG_MACH_GESBC9312)	+= gesbc9312.o
>  obj-$(CONFIG_MACH_MICRO9)	+= micro9.o
>  obj-$(CONFIG_MACH_TS72XX)	+= ts72xx.o
> +obj-$(CONFIG_MACH_SNAPPER_CL15)	+= snappercl15.o

Ditto.

> diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
> new file mode 100644
> index 0000000..2805f4d
> --- /dev/null
> +++ b/arch/arm/mach-ep93xx/snappercl15.c
> @@ -0,0 +1,185 @@
> +/*
> + * arch/arm/mach-ep93xx/snappercl15.c
> + * Bluewater Systems Snapper CL15 system module
> + *
> + * Copyright (C) 2009 Bluewater Systems Ltd
> + * Author: Ryan Mallon <ryan@bluewatersys.com>
> + *
> + * NAND code adapted from driver by:
> + *   Andre Renaud <andre@bluewatersys.com>
> + *   James R. McKaskill
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or (at
> + * your option) any later version.
> + *
> + */
> +
> +#include <linux/platform_device.h>
> +#include <linux/kernel.h>
> +#include <linux/init.h>

#include <linux/io.h>

Should be here since you are using __raw_{read/write}w

> +#include <linux/gpio.h>
> +#include <linux/i2c.h>
> +#include <linux/i2c-gpio.h>
> +#include <linux/fb.h>
> +
> +#include <linux/mtd/partitions.h>
> +#include <linux/mtd/nand.h>
> +
> +#include <mach/hardware.h>
> +#include <mach/fb.h>
> +
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +
> +#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + 0x01000000)

Maybe use SZ_16M?  Your call.

> +
> +#define SNAPPERCL15_NAND_CTRL	(1 << 6)
> +#define SNAPPERCL15_NAND_WPN	(1 << 8)
> +#define SNAPPERCL15_NAND_ALE	(1 << 9)
> +#define SNAPPERCL15_NAND_CLE	(1 << 10)
> +#define SNAPPERCL15_NAND_CEN	(1 << 11)
> +#define SNAPPERCL15_NAND_RDY	(1 << 14)
> +
> +#define NAND_CTRL_ADDR(chip)						\
> +	((void __iomem *)((unsigned long)chip->IO_ADDR_W + 0x40))

The cast is probably not needed. IO_ADDR_W is already a void __iomem * and
adding to it should not require the cast.

> +
> +static unsigned long nand_state;
> +
> +static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
> +				      unsigned int ctrl)
> +{
> +	struct nand_chip *chip = mtd->priv;
> +	static int first = 1;
> +	unsigned set;
> +
> +	if (first) {
> +		nand_state = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
> +		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
> +		first = 0;
> +	}
> +
> +	if (ctrl & NAND_CTRL_CHANGE) {
> +		set = SNAPPERCL15_NAND_CEN;
> +
> +		if (ctrl & NAND_NCE)
> +			set &= ~SNAPPERCL15_NAND_CEN;
> +		if (ctrl & NAND_CLE)
> +			set |= SNAPPERCL15_NAND_CLE;
> +		if (ctrl & NAND_ALE)
> +			set |= SNAPPERCL15_NAND_ALE;
> +
> +		nand_state &= ~(SNAPPERCL15_NAND_CEN |
> +				SNAPPERCL15_NAND_CLE |
> +				SNAPPERCL15_NAND_ALE);
> +		nand_state |= set;
> +		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
> +	}
> +
> +	if (cmd != NAND_CMD_NONE)
> +		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
> +}
> +

Interesting... Is your nand connected thru a fpga or something?

> +static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
> +{
> +	struct nand_chip *chip = mtd->priv;
> +
> +	return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
> +}
> +
> +static struct mtd_partition snappercl15_nand_partitions[] = {
> +	{
> +		.name		= "Kernel",
> +		.offset		= 0,
> +		.size		= SZ_2M,
> +	},
> +	{
> +		.name		= "Filesystem",
> +		.offset		= MTDPART_OFS_APPEND,
> +		.size		= MTDPART_SIZ_FULL,
> +	},
> +};
> +
> +static void snappercl15_nand_set_parts(uint64_t size,
> +				       struct platform_nand_chip *chip)
> +{
> +	pr_info("Snapper CL15: %llu bytes NAND\n", size);

You only have one pr_<level> right now but you might consider defining a
pr_fmt to prefix the "Snapper CL15: ".  Then you don't have to worry about
adding it to any pr_<level> output later.  Just put this before the #include's:

#define pr_fmt(fmt) "Snapper CL15: " fmt

Your could also use the following but the prefix will be "snappercl15: "

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

> +	chip->partitions = snappercl15_nand_partitions;
> +	chip->nr_partitions = ARRAY_SIZE(snappercl15_nand_partitions);
> +}
> +
> +static struct platform_nand_data snappercl15_nand_data = {
> +	.chip = {
> +		.nr_chips	= 1,
> +		.set_parts	= snappercl15_nand_set_parts,
> +		.options	= NAND_NO_AUTOINCR,
> +		.chip_delay	= 25,
> +	},
> +	.ctrl = {
> +		.dev_ready	= snappercl15_nand_dev_ready,
> +		.cmd_ctrl	= snappercl15_nand_cmd_ctrl,
> +	},
> +};
> +
> +static struct resource snappercl15_nand_resource[] = {
> +	{
> +		.start		= SNAPPERCL15_NAND_BASE,
> +		.end		= SNAPPERCL15_NAND_BASE + SZ_4K - 1,
> +		.flags		= IORESOURCE_MEM,
> +	},
> +};
> +
> +static struct platform_device snappercl15_nand_device = {
> +	.name			= "gen_nand",
> +	.id			= -1,
> +	.dev.platform_data	= &snappercl15_nand_data,
> +	.resource		= snappercl15_nand_resource,
> +	.num_resources		= ARRAY_SIZE(snappercl15_nand_resource),
> +};
> +
> +static struct ep93xx_eth_data snappercl15_eth_data = {
> +	.phy_id			= 1,
> +};
> +
> +static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = {
> +	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,
> +	.sda_is_open_drain	= 0,
> +	.scl_pin		= EP93XX_GPIO_LINE_EECLK,
> +	.scl_is_open_drain	= 0,
> +	.udelay			= 0,
> +	.timeout		= 0,
> +};
> +
> +static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
> +	{
> +		/* Audio codec */
> +		I2C_BOARD_INFO("tlv320aic23", 0x1a),
> +	},
> +};

Are you going to add the audio support later?

> +
> +static struct ep93xxfb_mach_info snappercl15_fb_info = {
> +	.num_modes		= EP93XXFB_USE_MODEDB,
> +	.bpp			= 16,
> +};
> +
> +static void __init snappercl15_init_machine(void)
> +{
> +	ep93xx_init_devices();
> +	ep93xx_register_eth(&snappercl15_eth_data, 1);
> +	ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
> +			    ARRAY_SIZE(snappercl15_i2c_data));
> +	ep93xx_register_fb(&snappercl15_fb_info);
> +	platform_device_register(&snappercl15_nand_device);
> +}
> +
> +MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
> +	/* Maintainer: Ryan Mallon <ryan@bluewatersys.com> */
> +	.phys_io	= EP93XX_APB_PHYS_BASE,
> +	.io_pg_offst	= ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
> +	.boot_params	= EP93XX_SDCE0_PHYS_BASE + 0x100,
> +	.map_io		= ep93xx_map_io,
> +	.init_irq	= ep93xx_init_irq,
> +	.timer 		= &ep93xx_timer,
> +	.init_machine	= snappercl15_init_machine,
> +MACHINE_END

Looks good other than that.

Regards,
Hartley

[PATCH] ep93xx: Add support for Snapper CL15 module

[Ryan Mallon]

H Hartley Sweeten wrote:
> On Thursday, February 04, 2010 1:58 PM, Ryan Mallon wrote:
>> Add support for the Bluewater Systems Snapper CL15 single board computer
>> module.
>>
>> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
>> Cc: Hartley Sweeten <hartleys@visionengravers.com>
>>
>> ---
>>
>> diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
>> index 9167c3d..71eabca 100644
>> --- a/arch/arm/mach-ep93xx/Kconfig
>> +++ b/arch/arm/mach-ep93xx/Kconfig
>> @@ -168,6 +168,13 @@ config MACH_TS72XX
>>  	  Say 'Y' here if you want your kernel to support the
>>  	  Technologic Systems TS-72xx board.
>>  
>> +config MACH_SNAPPER_CL15
>> +	bool "Support Bluewater Systems Snapper CL15 Module"
>> +	depends on EP93XX_SDCE0_PHYS_OFFSET
>> +	help
>> +	  Say 'Y' here if you want your kernel to support the Bluewater
>> +	  Systems Snapper CL15 Module.
>> +
> 
> Your will need to base this patch on Russell's -devel tree.  The Sim.One
> board is now in that.

My understanding is that this sort of thing will merge cleanly since the
patches are otherwise unrelated. I think I only need to rebase on the
-devel tree if I have direct dependencies, or expect conflicts there.
Russell?

> 
> Also, please move this so that they stay alphabetized:
> 
> config MACH_SIM_ONE
> ...
> +config MACH_SNAPPER_CL15
> +...
> config MACH_TS72XX
> ...

Will fix.

>> +
>> +#include <linux/platform_device.h>
>> +#include <linux/kernel.h>
>> +#include <linux/init.h>
> 
> #include <linux/io.h>
> 
> Should be here since you are using __raw_{read/write}w

Okay.

>> +#include <linux/gpio.h>
>> +#include <linux/i2c.h>
>> +#include <linux/i2c-gpio.h>
>> +#include <linux/fb.h>
>> +
>> +#include <linux/mtd/partitions.h>
>> +#include <linux/mtd/nand.h>
>> +
>> +#include <mach/hardware.h>
>> +#include <mach/fb.h>
>> +
>> +#include <asm/mach-types.h>
>> +#include <asm/mach/arch.h>
>> +
>> +#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + 0x01000000)
> 
> Maybe use SZ_16M?  Your call.

Sure.

>> +
>> +#define SNAPPERCL15_NAND_CTRL	(1 << 6)
>> +#define SNAPPERCL15_NAND_WPN	(1 << 8)
>> +#define SNAPPERCL15_NAND_ALE	(1 << 9)
>> +#define SNAPPERCL15_NAND_CLE	(1 << 10)
>> +#define SNAPPERCL15_NAND_CEN	(1 << 11)
>> +#define SNAPPERCL15_NAND_RDY	(1 << 14)
>> +
>> +#define NAND_CTRL_ADDR(chip)						\
>> +	((void __iomem *)((unsigned long)chip->IO_ADDR_W + 0x40))
> 
> The cast is probably not needed. IO_ADDR_W is already a void __iomem * and
> adding to it should not require the cast.

I'll have a look and see if I can simplify this and remove the casts. I
think I based it on one of the other platform NAND implementations that
had something similar.

>> +
>> +static unsigned long nand_state;
>> +
>> +static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
>> +				      unsigned int ctrl)
>> +{
>> +	struct nand_chip *chip = mtd->priv;
>> +	static int first = 1;
>> +	unsigned set;
>> +
>> +	if (first) {
>> +		nand_state = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
>> +		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
>> +		first = 0;
>> +	}
>> +
>> +	if (ctrl & NAND_CTRL_CHANGE) {
>> +		set = SNAPPERCL15_NAND_CEN;
>> +
>> +		if (ctrl & NAND_NCE)
>> +			set &= ~SNAPPERCL15_NAND_CEN;
>> +		if (ctrl & NAND_CLE)
>> +			set |= SNAPPERCL15_NAND_CLE;
>> +		if (ctrl & NAND_ALE)
>> +			set |= SNAPPERCL15_NAND_ALE;
>> +
>> +		nand_state &= ~(SNAPPERCL15_NAND_CEN |
>> +				SNAPPERCL15_NAND_CLE |
>> +				SNAPPERCL15_NAND_ALE);
>> +		nand_state |= set;
>> +		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
>> +	}
>> +
>> +	if (cmd != NAND_CMD_NONE)
>> +		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
>> +}
>> +
> 
> Interesting... Is your nand connected thru a fpga or something?

No, just a series of buffers. The Snapper CL15 has placement options for
either a NAND part or (for legacy reasons) an xD card connector. The
driver will work with either. For xD cards, hotplugging the cards is not
supported. However, all new Snapper CL15's are manufactured with NAND
fitted.

>> +
>> +static void snappercl15_nand_set_parts(uint64_t size,
>> +				       struct platform_nand_chip *chip)
>> +{
>> +	pr_info("Snapper CL15: %llu bytes NAND\n", size);
> 
> You only have one pr_<level> right now but you might consider defining a
> pr_fmt to prefix the "Snapper CL15: ".  Then you don't have to worry about
> adding it to any pr_<level> output later.  Just put this before the #include's:
> 
> #define pr_fmt(fmt) "Snapper CL15: " fmt
> 
> Your could also use the following but the prefix will be "snappercl15: "
> 
> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

Probably not worth it since I don't expect to be adding a lot of printks
to this file. I can probably remove this one even, since the MTD core
displays informtation about the NAND part and the partition layout.

>> +
>> +static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
>> +	{
>> +		/* Audio codec */
>> +		I2C_BOARD_INFO("tlv320aic23", 0x1a),
>> +	},
>> +};
> 
> Are you going to add the audio support later?

Hopefully. I have some partially working code to support the audio using
the SoC audio interface. I think there is no harm in having this here
now though, and it saves having to patch it in later.

> 
> Looks good other than that.

Thanks, will post an updated patch later today.

~Ryan

-- 
Bluewater Systems Ltd - ARM Technology Solution Centre

Ryan Mallon         		5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com         	PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com	New Zealand
Phone: +64 3 3779127		Freecall: Australia 1800 148 751
Fax:   +64 3 3779135			  USA 1800 261 2934

[PATCH] ep93xx: Add support for Snapper CL15 module

[Ryan Mallon]

H Hartley Sweeten wrote:
> On Thursday, February 04, 2010 1:58 PM, Ryan Mallon wrote:
>   
>> Add support for the Bluewater Systems Snapper CL15 single board computer
>> module.
>>
>> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
>> Cc: Hartley Sweeten <hartleys@visionengravers.com>
>>
>>     
Updated version with fixes suggested by Hartley. I haven't rebased on
-devel since I think that this should merge cleanly with the Sim.One patch.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>

---

diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 9167c3d..5121ce4 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -161,6 +161,13 @@ config MACH_MICRO9S
 	  Say 'Y' here if you want your kernel to support the
 	  Contec Micro9-Slim board.
 
+config MACH_SNAPPER_CL15
+	bool "Support Bluewater Systems Snapper CL15 Module"
+	depends on EP93XX_SDCE0_PHYS_OFFSET
+	help
+	  Say 'Y' here if you want your kernel to support the Bluewater
+	  Systems Snapper CL15 Module.
+
 config MACH_TS72XX
 	bool "Support Technologic Systems TS-72xx SBC"
 	depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index eae6199..556028c 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_MACH_ADSSPHERE)	+= adssphere.o
 obj-$(CONFIG_MACH_EDB93XX)	+= edb93xx.o
 obj-$(CONFIG_MACH_GESBC9312)	+= gesbc9312.o
 obj-$(CONFIG_MACH_MICRO9)	+= micro9.o
+obj-$(CONFIG_MACH_SNAPPER_CL15)	+= snappercl15.o
 obj-$(CONFIG_MACH_TS72XX)	+= ts72xx.o
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
new file mode 100644
index 0000000..b1013b2
--- /dev/null
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -0,0 +1,184 @@
+/*
+ * arch/arm/mach-ep93xx/snappercl15.c
+ * Bluewater Systems Snapper CL15 system module
+ *
+ * Copyright (C) 2009 Bluewater Systems Ltd
+ * Author: Ryan Mallon <ryan@bluewatersys.com>
+ *
+ * NAND code adapted from driver by:
+ *   Andre Renaud <andre@bluewatersys.com>
+ *   James R. McKaskill
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/fb.h>
+
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+
+#include <mach/hardware.h>
+#include <mach/fb.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + SZ_16M)
+
+#define SNAPPERCL15_NAND_CTRL	(1 << 6)
+#define SNAPPERCL15_NAND_WPN	(1 << 8)
+#define SNAPPERCL15_NAND_ALE	(1 << 9)
+#define SNAPPERCL15_NAND_CLE	(1 << 10)
+#define SNAPPERCL15_NAND_CEN	(1 << 11)
+#define SNAPPERCL15_NAND_RDY	(1 << 14)
+
+#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)
+
+static unsigned long nand_state;
+
+static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+				      unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd->priv;
+	static int first = 1;
+	unsigned set;
+
+	if (first) {
+		nand_state = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
+		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+		first = 0;
+	}
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		set = SNAPPERCL15_NAND_CEN;
+
+		if (ctrl & NAND_NCE)
+			set &= ~SNAPPERCL15_NAND_CEN;
+		if (ctrl & NAND_CLE)
+			set |= SNAPPERCL15_NAND_CLE;
+		if (ctrl & NAND_ALE)
+			set |= SNAPPERCL15_NAND_ALE;
+
+		nand_state &= ~(SNAPPERCL15_NAND_CEN |
+				SNAPPERCL15_NAND_CLE |
+				SNAPPERCL15_NAND_ALE);
+		nand_state |= set;
+		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+	}
+
+	if (cmd != NAND_CMD_NONE)
+		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
+}
+
+static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd->priv;
+
+	return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
+}
+
+static struct mtd_partition snappercl15_nand_partitions[] = {
+	{
+		.name		= "Kernel",
+		.offset		= 0,
+		.size		= SZ_2M,
+	},
+	{
+		.name		= "Filesystem",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= MTDPART_SIZ_FULL,
+	},
+};
+
+static void snappercl15_nand_set_parts(uint64_t size,
+				       struct platform_nand_chip *chip)
+{
+	chip->partitions = snappercl15_nand_partitions;
+	chip->nr_partitions = ARRAY_SIZE(snappercl15_nand_partitions);
+}
+
+static struct platform_nand_data snappercl15_nand_data = {
+	.chip = {
+		.nr_chips	= 1,
+		.set_parts	= snappercl15_nand_set_parts,
+		.options	= NAND_NO_AUTOINCR,
+		.chip_delay	= 25,
+	},
+	.ctrl = {
+		.dev_ready	= snappercl15_nand_dev_ready,
+		.cmd_ctrl	= snappercl15_nand_cmd_ctrl,
+	},
+};
+
+static struct resource snappercl15_nand_resource[] = {
+	{
+		.start		= SNAPPERCL15_NAND_BASE,
+		.end		= SNAPPERCL15_NAND_BASE + SZ_4K - 1,
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device snappercl15_nand_device = {
+	.name			= "gen_nand",
+	.id			= -1,
+	.dev.platform_data	= &snappercl15_nand_data,
+	.resource		= snappercl15_nand_resource,
+	.num_resources		= ARRAY_SIZE(snappercl15_nand_resource),
+};
+
+static struct ep93xx_eth_data snappercl15_eth_data = {
+	.phy_id			= 1,
+};
+
+static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = {
+	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,
+	.sda_is_open_drain	= 0,
+	.scl_pin		= EP93XX_GPIO_LINE_EECLK,
+	.scl_is_open_drain	= 0,
+	.udelay			= 0,
+	.timeout		= 0,
+};
+
+static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
+	{
+		/* Audio codec */
+		I2C_BOARD_INFO("tlv320aic23", 0x1a),
+	},
+};
+
+static struct ep93xxfb_mach_info snappercl15_fb_info = {
+	.num_modes		= EP93XXFB_USE_MODEDB,
+	.bpp			= 16,
+};
+
+static void __init snappercl15_init_machine(void)
+{
+	ep93xx_init_devices();
+	ep93xx_register_eth(&snappercl15_eth_data, 1);
+	ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
+			    ARRAY_SIZE(snappercl15_i2c_data));
+	ep93xx_register_fb(&snappercl15_fb_info);
+	platform_device_register(&snappercl15_nand_device);
+}
+
+MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
+	/* Maintainer: Ryan Mallon <ryan@bluewatersys.com> */
+	.phys_io	= EP93XX_APB_PHYS_BASE,
+	.io_pg_offst	= ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= EP93XX_SDCE0_PHYS_BASE + 0x100,
+	.map_io		= ep93xx_map_io,
+	.init_irq	= ep93xx_init_irq,
+	.timer 		= &ep93xx_timer,
+	.init_machine	= snappercl15_init_machine,
+MACHINE_END

[PATCH] ep93xx: Add support for Snapper CL15 module

[H Hartley Sweeten]

On Sunday, February 07, 2010 1:03 PM, Ryan Mallon wrote:
> H Hartley Sweeten wrote:
>> On Thursday, February 04, 2010 1:58 PM, Ryan Mallon wrote:
>>   
>>> Add support for the Bluewater Systems Snapper CL15 single board computer
>>> module.
>>>
>>> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
>>> Cc: Hartley Sweeten <hartleys@visionengravers.com>
>>>
>>>     
> Updated version with fixes suggested by Hartley. I haven't rebased on
> -devel since I think that this should merge cleanly with the Sim.One patch.
>
> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>

Russell will let you know if it doesn't merge cleanly ;-)

Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>

[PATCH] ep93xx: Add support for Snapper CL15 module

[Ryan Mallon]

H Hartley Sweeten wrote:
> On Sunday, February 07, 2010 1:03 PM, Ryan Mallon wrote:
>   
>> H Hartley Sweeten wrote:
>>     
>>> On Thursday, February 04, 2010 1:58 PM, Ryan Mallon wrote:
>>>   
>>>       
>>>> Add support for the Bluewater Systems Snapper CL15 single board computer
>>>> module.
>>>>
>>>> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
>>>> Cc: Hartley Sweeten <hartleys@visionengravers.com>
>>>>
>>>>     
>>>>         
>> Updated version with fixes suggested by Hartley. I haven't rebased on
>> -devel since I think that this should merge cleanly with the Sim.One patch.
>>
>> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
>>     
>
> Doh... One other thing...
>
> [snip]
>
> +static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
> +				      unsigned int ctrl)
> +{
> +	struct nand_chip *chip = mtd->priv;
> +	static int first = 1;
> +	unsigned set;
> +
> +	if (first) {
> +		nand_state = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
> +		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
> +		first = 0;
> +	}
>
> If I read this correctly, you are making the NAND writeable when
> starting (WPn is high).  Is there any way to write-protect the
> device?
>   
Yes, that is correct. I have added comments to each of the NAND address
bit defines and removed the unused SNAPPERCL15_NAND_CTRL one. I have
also rewritten the above to assert SNAPPERCL15_NAND_WPN on each write,
which gets rid of the first test. I have tested this and reading/writing
to the device still works. The WPN line does allow the NAND to be made
read-only, but we don't use this feature.

Updated patch below. Can I still use your Acked-by?

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
---

diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 9167c3d..5121ce4 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -161,6 +161,13 @@ config MACH_MICRO9S
 	  Say 'Y' here if you want your kernel to support the
 	  Contec Micro9-Slim board.

+config MACH_SNAPPER_CL15
+	bool "Support Bluewater Systems Snapper CL15 Module"
+	depends on EP93XX_SDCE0_PHYS_OFFSET
+	help
+	  Say 'Y' here if you want your kernel to support the Bluewater
+	  Systems Snapper CL15 Module.
+
 config MACH_TS72XX
 	bool "Support Technologic Systems TS-72xx SBC"
 	depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index eae6199..556028c 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_MACH_ADSSPHERE)	+= adssphere.o
 obj-$(CONFIG_MACH_EDB93XX)	+= edb93xx.o
 obj-$(CONFIG_MACH_GESBC9312)	+= gesbc9312.o
 obj-$(CONFIG_MACH_MICRO9)	+= micro9.o
+obj-$(CONFIG_MACH_SNAPPER_CL15)	+= snappercl15.o
 obj-$(CONFIG_MACH_TS72XX)	+= ts72xx.o
diff --git a/arch/arm/mach-ep93xx/snappercl15.c
b/arch/arm/mach-ep93xx/snappercl15.c
new file mode 100644
index 0000000..af9d799
--- /dev/null
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -0,0 +1,176 @@
+/*
+ * arch/arm/mach-ep93xx/snappercl15.c
+ * Bluewater Systems Snapper CL15 system module
+ *
+ * Copyright (C) 2009 Bluewater Systems Ltd
+ * Author: Ryan Mallon <ryan@bluewatersys.com>
+ *
+ * NAND code adapted from driver by:
+ *   Andre Renaud <andre@bluewatersys.com>
+ *   James R. McKaskill
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/fb.h>
+
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+
+#include <mach/hardware.h>
+#include <mach/fb.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + SZ_16M)
+
+#define SNAPPERCL15_NAND_WPN	(1 << 8)  /* Write protect (active low) */
+#define SNAPPERCL15_NAND_ALE	(1 << 9)  /* Address latch */
+#define SNAPPERCL15_NAND_CLE	(1 << 10) /* Command latch */
+#define SNAPPERCL15_NAND_CEN	(1 << 11) /* Chip enable (active low) */
+#define SNAPPERCL15_NAND_RDY	(1 << 14) /* Device ready */
+
+#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)
+
+static unsigned long nand_state;
+
+static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+				      unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd->priv;
+	unsigned set;
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
+
+		if (ctrl & NAND_NCE)
+			set &= ~SNAPPERCL15_NAND_CEN;
+		if (ctrl & NAND_CLE)
+			set |= SNAPPERCL15_NAND_CLE;
+		if (ctrl & NAND_ALE)
+			set |= SNAPPERCL15_NAND_ALE;
+
+		nand_state &= ~(SNAPPERCL15_NAND_CEN |
+				SNAPPERCL15_NAND_CLE |
+				SNAPPERCL15_NAND_ALE);
+		nand_state |= set;
+		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+	}
+
+	if (cmd != NAND_CMD_NONE)
+		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
+}
+
+static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd->priv;
+
+	return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
+}
+
+static struct mtd_partition snappercl15_nand_partitions[] = {
+	{
+		.name		= "Kernel",
+		.offset		= 0,
+		.size		= SZ_2M,
+	},
+	{
+		.name		= "Filesystem",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= MTDPART_SIZ_FULL,
+	},
+};
+
+static void snappercl15_nand_set_parts(uint64_t size,
+				       struct platform_nand_chip *chip)
+{
+	chip->partitions = snappercl15_nand_partitions;
+	chip->nr_partitions = ARRAY_SIZE(snappercl15_nand_partitions);
+}
+
+static struct platform_nand_data snappercl15_nand_data = {
+	.chip = {
+		.nr_chips	= 1,
+		.set_parts	= snappercl15_nand_set_parts,
+		.options	= NAND_NO_AUTOINCR,
+		.chip_delay	= 25,
+	},
+	.ctrl = {
+		.dev_ready	= snappercl15_nand_dev_ready,
+		.cmd_ctrl	= snappercl15_nand_cmd_ctrl,
+	},
+};
+
+static struct resource snappercl15_nand_resource[] = {
+	{
+		.start		= SNAPPERCL15_NAND_BASE,
+		.end		= SNAPPERCL15_NAND_BASE + SZ_4K - 1,
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device snappercl15_nand_device = {
+	.name			= "gen_nand",
+	.id			= -1,
+	.dev.platform_data	= &snappercl15_nand_data,
+	.resource		= snappercl15_nand_resource,
+	.num_resources		= ARRAY_SIZE(snappercl15_nand_resource),
+};
+
+static struct ep93xx_eth_data snappercl15_eth_data = {
+	.phy_id			= 1,
+};
+
+static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = {
+	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,
+	.sda_is_open_drain	= 0,
+	.scl_pin		= EP93XX_GPIO_LINE_EECLK,
+	.scl_is_open_drain	= 0,
+	.udelay			= 0,
+	.timeout		= 0,
+};
+
+static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
+	{
+		/* Audio codec */
+		I2C_BOARD_INFO("tlv320aic23", 0x1a),
+	},
+};
+
+static struct ep93xxfb_mach_info snappercl15_fb_info = {
+	.num_modes		= EP93XXFB_USE_MODEDB,
+	.bpp			= 16,
+};
+
+static void __init snappercl15_init_machine(void)
+{
+	ep93xx_init_devices();
+	ep93xx_register_eth(&snappercl15_eth_data, 1);
+	ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
+			    ARRAY_SIZE(snappercl15_i2c_data));
+	ep93xx_register_fb(&snappercl15_fb_info);
+	platform_device_register(&snappercl15_nand_device);
+}
+
+MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
+	/* Maintainer: Ryan Mallon <ryan@bluewatersys.com> */
+	.phys_io	= EP93XX_APB_PHYS_BASE,
+	.io_pg_offst	= ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= EP93XX_SDCE0_PHYS_BASE + 0x100,
+	.map_io		= ep93xx_map_io,
+	.init_irq	= ep93xx_init_irq,
+	.timer 		= &ep93xx_timer,
+	.init_machine	= snappercl15_init_machine,
+MACHINE_END

[PATCH] ep93xx: Add support for Snapper CL15 module

[H Hartley Sweeten]

On Monday, February 08, 2010 1:12 PM, Ryan Mallon wrote:
>> If I read this correctly, you are making the NAND writeable when
>> starting (WPn is high).  Is there any way to write-protect the
>> device?
>>   
> Yes, that is correct. I have added comments to each of the NAND address
> bit defines and removed the unused SNAPPERCL15_NAND_CTRL one. I have
> also rewritten the above to assert SNAPPERCL15_NAND_WPN on each write,
> which gets rid of the first test. I have tested this and reading/writing
> to the device still works. The WPN line does allow the NAND to be made
> read-only, but we don't use this feature.
>
> Updated patch below. Can I still use your Acked-by?
>
> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>

Based on your changes below I have one more comment below.

[snip]

+#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + SZ_16M)
+
+#define SNAPPERCL15_NAND_WPN	(1 << 8)  /* Write protect (active low) */
+#define SNAPPERCL15_NAND_ALE	(1 << 9)  /* Address latch */
+#define SNAPPERCL15_NAND_CLE	(1 << 10) /* Command latch */
+#define SNAPPERCL15_NAND_CEN	(1 << 11) /* Chip enable (active low) */
+#define SNAPPERCL15_NAND_RDY	(1 << 14) /* Device ready */
+
+#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)
+
+static unsigned long nand_state;
+
+static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+				      unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd->priv;
+	unsigned set;
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
+
+		if (ctrl & NAND_NCE)
+			set &= ~SNAPPERCL15_NAND_CEN;
+		if (ctrl & NAND_CLE)
+			set |= SNAPPERCL15_NAND_CLE;
+		if (ctrl & NAND_ALE)
+			set |= SNAPPERCL15_NAND_ALE;
+
+		nand_state &= ~(SNAPPERCL15_NAND_CEN |
+				SNAPPERCL15_NAND_CLE |
+				SNAPPERCL15_NAND_ALE);
+		nand_state |= set;
+		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+	}
+
+	if (cmd != NAND_CMD_NONE)
+		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
+}

It's possible (though unlikely) for 'nand_state' to start off with an
unknown value.  The upper layers could call the function without 
NAND_CTRL_CHANGE set the first time.

You can use the gen_nand .probe callback to set the initial value.
This keeps you from having to keep the static 'first' variable that
used to be in the patch.

Regards,
Hartley

[PATCH] ep93xx: Add support for Snapper CL15 module

[H Hartley Sweeten]

On Monday, February 08, 2010 1:27 PM, H Hartley Sweeten wrote:
> +#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + SZ_16M)
> +
> +#define SNAPPERCL15_NAND_WPN	(1 << 8)  /* Write protect (active low) */
> +#define SNAPPERCL15_NAND_ALE	(1 << 9)  /* Address latch */
> +#define SNAPPERCL15_NAND_CLE	(1 << 10) /* Command latch */
> +#define SNAPPERCL15_NAND_CEN	(1 << 11) /* Chip enable (active low) */
> +#define SNAPPERCL15_NAND_RDY	(1 << 14) /* Device ready */
> +
> +#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)
> +
> +static unsigned long nand_state;
> +
> +static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
> +				      unsigned int ctrl)
> +{
> +	struct nand_chip *chip = mtd->priv;
> +	unsigned set;
> +
> +	if (ctrl & NAND_CTRL_CHANGE) {
> +		set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
> +
> +		if (ctrl & NAND_NCE)
> +			set &= ~SNAPPERCL15_NAND_CEN;
> +		if (ctrl & NAND_CLE)
> +			set |= SNAPPERCL15_NAND_CLE;
> +		if (ctrl & NAND_ALE)
> +			set |= SNAPPERCL15_NAND_ALE;
> +
> +		nand_state &= ~(SNAPPERCL15_NAND_CEN |
> +				SNAPPERCL15_NAND_CLE |
> +				SNAPPERCL15_NAND_ALE);
> +		nand_state |= set;
> +		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
> +	}
> +
> +	if (cmd != NAND_CMD_NONE)
> +		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
> +}
> 
> It's possible (though unlikely) for 'nand_state' to start off with an
> unknown value.  The upper layers could call the function without 
> NAND_CTRL_CHANGE set the first time.
> 
> You can use the gen_nand .probe callback to set the initial value.
> This keeps you from having to keep the static 'first' variable that
> used to be in the patch.

Actually, do you even need to save a cached value for 'nand_state'?

1) The write to NAND_CTRL_ADDR sets all the control lines.
2) The write to IO_ADDR_W 'writes' the command to the chip.

Do you really need to OR nand_state with the cmd?

Regards,
Hartley

[PATCH] ep93xx: Add support for Snapper CL15 module

[Ryan Mallon]

H Hartley Sweeten wrote:
> On Monday, February 08, 2010 1:27 PM, H Hartley Sweeten wrote:
>> +#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + SZ_16M)
>> +
>> +#define SNAPPERCL15_NAND_WPN	(1 << 8)  /* Write protect (active low) */
>> +#define SNAPPERCL15_NAND_ALE	(1 << 9)  /* Address latch */
>> +#define SNAPPERCL15_NAND_CLE	(1 << 10) /* Command latch */
>> +#define SNAPPERCL15_NAND_CEN	(1 << 11) /* Chip enable (active low) */
>> +#define SNAPPERCL15_NAND_RDY	(1 << 14) /* Device ready */
>> +
>> +#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)
>> +
>> +static unsigned long nand_state;
>> +
>> +static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
>> +				      unsigned int ctrl)
>> +{
>> +	struct nand_chip *chip = mtd->priv;
>> +	unsigned set;
>> +
>> +	if (ctrl & NAND_CTRL_CHANGE) {
>> +		set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
>> +
>> +		if (ctrl & NAND_NCE)
>> +			set &= ~SNAPPERCL15_NAND_CEN;
>> +		if (ctrl & NAND_CLE)
>> +			set |= SNAPPERCL15_NAND_CLE;
>> +		if (ctrl & NAND_ALE)
>> +			set |= SNAPPERCL15_NAND_ALE;
>> +
>> +		nand_state &= ~(SNAPPERCL15_NAND_CEN |
>> +				SNAPPERCL15_NAND_CLE |
>> +				SNAPPERCL15_NAND_ALE);
>> +		nand_state |= set;
>> +		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
>> +	}
>> +
>> +	if (cmd != NAND_CMD_NONE)
>> +		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
>> +}
>>
>> It's possible (though unlikely) for 'nand_state' to start off with an
>> unknown value.  The upper layers could call the function without 
>> NAND_CTRL_CHANGE set the first time.

I think the NAND sub-system guarantees this wont' happen.

>> You can use the gen_nand .probe callback to set the initial value.
>> This keeps you from having to keep the static 'first' variable that
>> used to be in the patch.

I could just change the initialisation of nand_state to:

  static unsigned long nand_state = SNAPPERCL15_NAND_WPN;

Rather than having a probe function. However, I don't think even this is
necessary.

> Actually, do you even need to save a cached value for 'nand_state'?
> 
> 1) The write to NAND_CTRL_ADDR sets all the control lines.
> 2) The write to IO_ADDR_W 'writes' the command to the chip.

I'm working based on a driver written for our 2.6.20 kernel (not by me),
and it uses the cached value there too. I tried making nand_state local
to the cmd_ctrl function but it doesn't work correctly. It correctly
identifies the chip, but then marks every block on the NAND as bad.

> Do you really need to OR nand_state with the cmd?

It appears so. Removing nand_state, or even replacing with just
SNAPPERCL15_NAND_WPN does not work.

~Ryan

-- 
Bluewater Systems Ltd - ARM Technology Solution Centre

Ryan Mallon         		5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com         	PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com	New Zealand
Phone: +64 3 3779127		Freecall: Australia 1800 148 751
Fax:   +64 3 3779135			  USA 1800 261 2934

[PATCH] ep93xx: Add support for Snapper CL15 module

[Ryan Mallon]

H Hartley Sweeten wrote:
>
> Actually, do you even need to save a cached value for 'nand_state'?
>
> 1) The write to NAND_CTRL_ADDR sets all the control lines.
> 2) The write to IO_ADDR_W 'writes' the command to the chip.
>
> Do you really need to OR nand_state with the cmd?
>
> Regards,
> Hartley
>   
How about this version. I have moved the static nand_state variable
inside the snappercl15_nand_cmd_ctrl function since that is the only
place it is used, and now initialise it to SNAPPERCL15_NAND_WPN. I have
also changed nand_state and set to u16 since they are used with
__raw_writew. This tests and works correctly.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
---

diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 9167c3d..5121ce4 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -161,6 +161,13 @@ config MACH_MICRO9S
 	  Say 'Y' here if you want your kernel to support the
 	  Contec Micro9-Slim board.
 
+config MACH_SNAPPER_CL15
+	bool "Support Bluewater Systems Snapper CL15 Module"
+	depends on EP93XX_SDCE0_PHYS_OFFSET
+	help
+	  Say 'Y' here if you want your kernel to support the Bluewater
+	  Systems Snapper CL15 Module.
+
 config MACH_TS72XX
 	bool "Support Technologic Systems TS-72xx SBC"
 	depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index eae6199..556028c 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_MACH_ADSSPHERE)	+= adssphere.o
 obj-$(CONFIG_MACH_EDB93XX)	+= edb93xx.o
 obj-$(CONFIG_MACH_GESBC9312)	+= gesbc9312.o
 obj-$(CONFIG_MACH_MICRO9)	+= micro9.o
+obj-$(CONFIG_MACH_SNAPPER_CL15)	+= snappercl15.o
 obj-$(CONFIG_MACH_TS72XX)	+= ts72xx.o
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
new file mode 100644
index 0000000..6f705e4
--- /dev/null
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -0,0 +1,175 @@
+/*
+ * arch/arm/mach-ep93xx/snappercl15.c
+ * Bluewater Systems Snapper CL15 system module
+ *
+ * Copyright (C) 2009 Bluewater Systems Ltd
+ * Author: Ryan Mallon <ryan@bluewatersys.com>
+ *
+ * NAND code adapted from driver by:
+ *   Andre Renaud <andre@bluewatersys.com>
+ *   James R. McKaskill
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/fb.h>
+
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+
+#include <mach/hardware.h>
+#include <mach/fb.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + SZ_16M)
+
+#define SNAPPERCL15_NAND_WPN	(1 << 8)  /* Write protect (active low) */
+#define SNAPPERCL15_NAND_ALE	(1 << 9)  /* Address latch */
+#define SNAPPERCL15_NAND_CLE	(1 << 10) /* Command latch */
+#define SNAPPERCL15_NAND_CEN	(1 << 11) /* Chip enable (active low) */
+#define SNAPPERCL15_NAND_RDY	(1 << 14) /* Device ready */
+
+#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)
+
+static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+				      unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd->priv;
+	static u16 nand_state = SNAPPERCL15_NAND_WPN;
+	u16 set;
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
+
+		if (ctrl & NAND_NCE)
+			set &= ~SNAPPERCL15_NAND_CEN;
+		if (ctrl & NAND_CLE)
+			set |= SNAPPERCL15_NAND_CLE;
+		if (ctrl & NAND_ALE)
+			set |= SNAPPERCL15_NAND_ALE;
+
+		nand_state &= ~(SNAPPERCL15_NAND_CEN |
+				SNAPPERCL15_NAND_CLE |
+				SNAPPERCL15_NAND_ALE);
+		nand_state |= set;
+		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+	}
+
+	if (cmd != NAND_CMD_NONE)
+		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
+}
+
+static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd->priv;
+
+	return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
+}
+
+static struct mtd_partition snappercl15_nand_partitions[] = {
+	{
+		.name		= "Kernel",
+		.offset		= 0,
+		.size		= SZ_2M,
+	},
+	{
+		.name		= "Filesystem",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= MTDPART_SIZ_FULL,
+	},
+};
+
+static void snappercl15_nand_set_parts(uint64_t size,
+				       struct platform_nand_chip *chip)
+{
+	chip->partitions = snappercl15_nand_partitions;
+	chip->nr_partitions = ARRAY_SIZE(snappercl15_nand_partitions);
+}
+
+static struct platform_nand_data snappercl15_nand_data = {
+	.chip = {
+		.nr_chips	= 1,
+		.set_parts	= snappercl15_nand_set_parts,
+		.options	= NAND_NO_AUTOINCR,
+		.chip_delay	= 25,
+	},
+	.ctrl = {
+		.dev_ready	= snappercl15_nand_dev_ready,
+		.cmd_ctrl	= snappercl15_nand_cmd_ctrl,
+	},
+};
+
+static struct resource snappercl15_nand_resource[] = {
+	{
+		.start		= SNAPPERCL15_NAND_BASE,
+		.end		= SNAPPERCL15_NAND_BASE + SZ_4K - 1,
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device snappercl15_nand_device = {
+	.name			= "gen_nand",
+	.id			= -1,
+	.dev.platform_data	= &snappercl15_nand_data,
+	.resource		= snappercl15_nand_resource,
+	.num_resources		= ARRAY_SIZE(snappercl15_nand_resource),
+};
+
+static struct ep93xx_eth_data snappercl15_eth_data = {
+	.phy_id			= 1,
+};
+
+static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = {
+	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,
+	.sda_is_open_drain	= 0,
+	.scl_pin		= EP93XX_GPIO_LINE_EECLK,
+	.scl_is_open_drain	= 0,
+	.udelay			= 0,
+	.timeout		= 0,
+};
+
+static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
+	{
+		/* Audio codec */
+		I2C_BOARD_INFO("tlv320aic23", 0x1a),
+	},
+};
+
+static struct ep93xxfb_mach_info snappercl15_fb_info = {
+	.num_modes		= EP93XXFB_USE_MODEDB,
+	.bpp			= 16,
+};
+
+static void __init snappercl15_init_machine(void)
+{
+	ep93xx_init_devices();
+	ep93xx_register_eth(&snappercl15_eth_data, 1);
+	ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
+			    ARRAY_SIZE(snappercl15_i2c_data));
+	ep93xx_register_fb(&snappercl15_fb_info);
+	platform_device_register(&snappercl15_nand_device);
+}
+
+MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
+	/* Maintainer: Ryan Mallon <ryan@bluewatersys.com> */
+	.phys_io	= EP93XX_APB_PHYS_BASE,
+	.io_pg_offst	= ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= EP93XX_SDCE0_PHYS_BASE + 0x100,
+	.map_io		= ep93xx_map_io,
+	.init_irq	= ep93xx_init_irq,
+	.timer 		= &ep93xx_timer,
+	.init_machine	= snappercl15_init_machine,
+MACHINE_END

[PATCH] ep93xx: Add support for Snapper CL15 module

[Ryan Mallon]

Updated version: Added support for command line NAND partitions, and
specify defaults partitions directly in nand_chip descriptor rather than
using set_parts callback.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
---

diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 9167c3d..5121ce4 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -161,6 +161,13 @@ config MACH_MICRO9S
 	  Say 'Y' here if you want your kernel to support the
 	  Contec Micro9-Slim board.
 
+config MACH_SNAPPER_CL15
+	bool "Support Bluewater Systems Snapper CL15 Module"
+	depends on EP93XX_SDCE0_PHYS_OFFSET
+	help
+	  Say 'Y' here if you want your kernel to support the Bluewater
+	  Systems Snapper CL15 Module.
+
 config MACH_TS72XX
 	bool "Support Technologic Systems TS-72xx SBC"
 	depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index eae6199..556028c 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_MACH_ADSSPHERE)	+= adssphere.o
 obj-$(CONFIG_MACH_EDB93XX)	+= edb93xx.o
 obj-$(CONFIG_MACH_GESBC9312)	+= gesbc9312.o
 obj-$(CONFIG_MACH_MICRO9)	+= micro9.o
+obj-$(CONFIG_MACH_SNAPPER_CL15)	+= snappercl15.o
 obj-$(CONFIG_MACH_TS72XX)	+= ts72xx.o
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
new file mode 100644
index 0000000..51134b0
--- /dev/null
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -0,0 +1,172 @@
+/*
+ * arch/arm/mach-ep93xx/snappercl15.c
+ * Bluewater Systems Snapper CL15 system module
+ *
+ * Copyright (C) 2009 Bluewater Systems Ltd
+ * Author: Ryan Mallon <ryan@bluewatersys.com>
+ *
+ * NAND code adapted from driver by:
+ *   Andre Renaud <andre@bluewatersys.com>
+ *   James R. McKaskill
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/fb.h>
+
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+
+#include <mach/hardware.h>
+#include <mach/fb.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + SZ_16M)
+
+#define SNAPPERCL15_NAND_WPN	(1 << 8)  /* Write protect (active low) */
+#define SNAPPERCL15_NAND_ALE	(1 << 9)  /* Address latch */
+#define SNAPPERCL15_NAND_CLE	(1 << 10) /* Command latch */
+#define SNAPPERCL15_NAND_CEN	(1 << 11) /* Chip enable (active low) */
+#define SNAPPERCL15_NAND_RDY	(1 << 14) /* Device ready */
+
+#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)
+
+static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+				      unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd->priv;
+	static u16 nand_state = SNAPPERCL15_NAND_WPN;
+	u16 set;
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
+
+		if (ctrl & NAND_NCE)
+			set &= ~SNAPPERCL15_NAND_CEN;
+		if (ctrl & NAND_CLE)
+			set |= SNAPPERCL15_NAND_CLE;
+		if (ctrl & NAND_ALE)
+			set |= SNAPPERCL15_NAND_ALE;
+
+		nand_state &= ~(SNAPPERCL15_NAND_CEN |
+				SNAPPERCL15_NAND_CLE |
+				SNAPPERCL15_NAND_ALE);
+		nand_state |= set;
+		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+	}
+
+	if (cmd != NAND_CMD_NONE)
+		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
+}
+
+static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd->priv;
+
+	return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
+}
+
+static const char *snappercl15_nand_part_probes[] = {"cmdlinepart", NULL};
+
+static struct mtd_partition snappercl15_nand_parts[] = {
+	{
+		.name		= "Kernel",
+		.offset		= 0,
+		.size		= SZ_2M,
+	},
+	{
+		.name		= "Filesystem",
+		.offset		= MTDPART_OFS_APPEND,
+		.size		= MTDPART_SIZ_FULL,
+	},
+};
+
+static struct platform_nand_data snappercl15_nand_data = {
+	.chip = {
+		.nr_chips		= 1,
+		.part_probe_types	= snappercl15_nand_part_probes,
+		.partitions		= snappercl15_nand_parts,
+		.nr_partitions		= ARRAY_SIZE(snappercl15_nand_parts),
+		.options		= NAND_NO_AUTOINCR,
+		.chip_delay		= 25,
+	},
+	.ctrl = {
+		.dev_ready		= snappercl15_nand_dev_ready,
+		.cmd_ctrl		= snappercl15_nand_cmd_ctrl,
+	},
+};
+
+static struct resource snappercl15_nand_resource[] = {
+	{
+		.start		= SNAPPERCL15_NAND_BASE,
+		.end		= SNAPPERCL15_NAND_BASE + SZ_4K - 1,
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device snappercl15_nand_device = {
+	.name			= "gen_nand",
+	.id			= -1,
+	.dev.platform_data	= &snappercl15_nand_data,
+	.resource		= snappercl15_nand_resource,
+	.num_resources		= ARRAY_SIZE(snappercl15_nand_resource),
+};
+
+static struct ep93xx_eth_data snappercl15_eth_data = {
+	.phy_id			= 1,
+};
+
+static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = {
+	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,
+	.sda_is_open_drain	= 0,
+	.scl_pin		= EP93XX_GPIO_LINE_EECLK,
+	.scl_is_open_drain	= 0,
+	.udelay			= 0,
+	.timeout		= 0,
+};
+
+static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
+	{
+		/* Audio codec */
+		I2C_BOARD_INFO("tlv320aic23", 0x1a),
+	},
+};
+
+static struct ep93xxfb_mach_info snappercl15_fb_info = {
+	.num_modes		= EP93XXFB_USE_MODEDB,
+	.bpp			= 16,
+};
+
+static void __init snappercl15_init_machine(void)
+{
+	ep93xx_init_devices();
+	ep93xx_register_eth(&snappercl15_eth_data, 1);
+	ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
+			    ARRAY_SIZE(snappercl15_i2c_data));
+	ep93xx_register_fb(&snappercl15_fb_info);
+	platform_device_register(&snappercl15_nand_device);
+}
+
+MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
+	/* Maintainer: Ryan Mallon <ryan@bluewatersys.com> */
+	.phys_io	= EP93XX_APB_PHYS_BASE,
+	.io_pg_offst	= ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= EP93XX_SDCE0_PHYS_BASE + 0x100,
+	.map_io		= ep93xx_map_io,
+	.init_irq	= ep93xx_init_irq,
+	.timer 		= &ep93xx_timer,
+	.init_machine	= snappercl15_init_machine,
+MACHINE_END

[PATCH] ep93xx: Add support for Snapper CL15 module

[H Hartley Sweeten]

On Tuesday, February 09, 2010 7:55 PM, Ryan Mallon wrote:
> Updated version: Added support for command line NAND partitions, and
> specify defaults partitions directly in nand_chip descriptor rather than
> using set_parts callback.
> 
> Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>

You need a proper commit message but other than that I'm happy with this.

Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>

> ---
> 
> diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
> index 9167c3d..5121ce4 100644
> --- a/arch/arm/mach-ep93xx/Kconfig
> +++ b/arch/arm/mach-ep93xx/Kconfig
> @@ -161,6 +161,13 @@ config MACH_MICRO9S
>  	  Say 'Y' here if you want your kernel to support the
>  	  Contec Micro9-Slim board.
>  
> +config MACH_SNAPPER_CL15
> +	bool "Support Bluewater Systems Snapper CL15 Module"
> +	depends on EP93XX_SDCE0_PHYS_OFFSET
> +	help
> +	  Say 'Y' here if you want your kernel to support the Bluewater
> +	  Systems Snapper CL15 Module.
> +
>  config MACH_TS72XX
>  	bool "Support Technologic Systems TS-72xx SBC"
>  	depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
> diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
> index eae6199..556028c 100644
> --- a/arch/arm/mach-ep93xx/Makefile
> +++ b/arch/arm/mach-ep93xx/Makefile
> @@ -10,4 +10,5 @@ obj-$(CONFIG_MACH_ADSSPHERE)	+= adssphere.o
>  obj-$(CONFIG_MACH_EDB93XX)	+= edb93xx.o
>  obj-$(CONFIG_MACH_GESBC9312)	+= gesbc9312.o
>  obj-$(CONFIG_MACH_MICRO9)	+= micro9.o
> +obj-$(CONFIG_MACH_SNAPPER_CL15)	+= snappercl15.o
>  obj-$(CONFIG_MACH_TS72XX)	+= ts72xx.o
> diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
> new file mode 100644
> index 0000000..51134b0
> --- /dev/null
> +++ b/arch/arm/mach-ep93xx/snappercl15.c
> @@ -0,0 +1,172 @@
> +/*
> + * arch/arm/mach-ep93xx/snappercl15.c
> + * Bluewater Systems Snapper CL15 system module
> + *
> + * Copyright (C) 2009 Bluewater Systems Ltd
> + * Author: Ryan Mallon <ryan@bluewatersys.com>
> + *
> + * NAND code adapted from driver by:
> + *   Andre Renaud <andre@bluewatersys.com>
> + *   James R. McKaskill
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or (at
> + * your option) any later version.
> + *
> + */
> +
> +#include <linux/platform_device.h>
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/gpio.h>
> +#include <linux/i2c.h>
> +#include <linux/i2c-gpio.h>
> +#include <linux/fb.h>
> +
> +#include <linux/mtd/partitions.h>
> +#include <linux/mtd/nand.h>
> +
> +#include <mach/hardware.h>
> +#include <mach/fb.h>
> +
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +
> +#define SNAPPERCL15_NAND_BASE	(EP93XX_CS7_PHYS_BASE + SZ_16M)
> +
> +#define SNAPPERCL15_NAND_WPN	(1 << 8)  /* Write protect (active low) */
> +#define SNAPPERCL15_NAND_ALE	(1 << 9)  /* Address latch */
> +#define SNAPPERCL15_NAND_CLE	(1 << 10) /* Command latch */
> +#define SNAPPERCL15_NAND_CEN	(1 << 11) /* Chip enable (active low) */
> +#define SNAPPERCL15_NAND_RDY	(1 << 14) /* Device ready */
> +
> +#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)
> +
> +static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
> +				      unsigned int ctrl)
> +{
> +	struct nand_chip *chip = mtd->priv;
> +	static u16 nand_state = SNAPPERCL15_NAND_WPN;
> +	u16 set;
> +
> +	if (ctrl & NAND_CTRL_CHANGE) {
> +		set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
> +
> +		if (ctrl & NAND_NCE)
> +			set &= ~SNAPPERCL15_NAND_CEN;
> +		if (ctrl & NAND_CLE)
> +			set |= SNAPPERCL15_NAND_CLE;
> +		if (ctrl & NAND_ALE)
> +			set |= SNAPPERCL15_NAND_ALE;
> +
> +		nand_state &= ~(SNAPPERCL15_NAND_CEN |
> +				SNAPPERCL15_NAND_CLE |
> +				SNAPPERCL15_NAND_ALE);
> +		nand_state |= set;
> +		__raw_writew(nand_state, NAND_CTRL_ADDR(chip));
> +	}
> +
> +	if (cmd != NAND_CMD_NONE)
> +		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
> +}
> +
> +static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
> +{
> +	struct nand_chip *chip = mtd->priv;
> +
> +	return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
> +}
> +
> +static const char *snappercl15_nand_part_probes[] = {"cmdlinepart", NULL};
> +
> +static struct mtd_partition snappercl15_nand_parts[] = {
> +	{
> +		.name		= "Kernel",
> +		.offset		= 0,
> +		.size		= SZ_2M,
> +	},
> +	{
> +		.name		= "Filesystem",
> +		.offset		= MTDPART_OFS_APPEND,
> +		.size		= MTDPART_SIZ_FULL,
> +	},
> +};
> +
> +static struct platform_nand_data snappercl15_nand_data = {
> +	.chip = {
> +		.nr_chips		= 1,
> +		.part_probe_types	= snappercl15_nand_part_probes,
> +		.partitions		= snappercl15_nand_parts,
> +		.nr_partitions		= ARRAY_SIZE(snappercl15_nand_parts),
> +		.options		= NAND_NO_AUTOINCR,
> +		.chip_delay		= 25,
> +	},
> +	.ctrl = {
> +		.dev_ready		= snappercl15_nand_dev_ready,
> +		.cmd_ctrl		= snappercl15_nand_cmd_ctrl,
> +	},
> +};
> +
> +static struct resource snappercl15_nand_resource[] = {
> +	{
> +		.start		= SNAPPERCL15_NAND_BASE,
> +		.end		= SNAPPERCL15_NAND_BASE + SZ_4K - 1,
> +		.flags		= IORESOURCE_MEM,
> +	},
> +};
> +
> +static struct platform_device snappercl15_nand_device = {
> +	.name			= "gen_nand",
> +	.id			= -1,
> +	.dev.platform_data	= &snappercl15_nand_data,
> +	.resource		= snappercl15_nand_resource,
> +	.num_resources		= ARRAY_SIZE(snappercl15_nand_resource),
> +};
> +
> +static struct ep93xx_eth_data snappercl15_eth_data = {
> +	.phy_id			= 1,
> +};
> +
> +static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = {
> +	.sda_pin		= EP93XX_GPIO_LINE_EEDAT,
> +	.sda_is_open_drain	= 0,
> +	.scl_pin		= EP93XX_GPIO_LINE_EECLK,
> +	.scl_is_open_drain	= 0,
> +	.udelay			= 0,
> +	.timeout		= 0,
> +};
> +
> +static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
> +	{
> +		/* Audio codec */
> +		I2C_BOARD_INFO("tlv320aic23", 0x1a),
> +	},
> +};
> +
> +static struct ep93xxfb_mach_info snappercl15_fb_info = {
> +	.num_modes		= EP93XXFB_USE_MODEDB,
> +	.bpp			= 16,
> +};
> +
> +static void __init snappercl15_init_machine(void)
> +{
> +	ep93xx_init_devices();
> +	ep93xx_register_eth(&snappercl15_eth_data, 1);
> +	ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
> +			    ARRAY_SIZE(snappercl15_i2c_data));
> +	ep93xx_register_fb(&snappercl15_fb_info);
> +	platform_device_register(&snappercl15_nand_device);
> +}
> +
> +MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
> +	/* Maintainer: Ryan Mallon <ryan@bluewatersys.com> */
> +	.phys_io	= EP93XX_APB_PHYS_BASE,
> +	.io_pg_offst	= ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
> +	.boot_params	= EP93XX_SDCE0_PHYS_BASE + 0x100,
> +	.map_io		= ep93xx_map_io,
> +	.init_irq	= ep93xx_init_irq,
> +	.timer 		= &ep93xx_timer,
> +	.init_machine	= snappercl15_init_machine,
> +MACHINE_END
> 
>