secondary processor initialization

secondary processor initialization

[Steve Muckle]

Hi,

The Scorpion CPU requires some low level initialization (like cache
timing registers). Currently we take care of that in the bootloader.
This seems to fit with what I've heard as a desire to keep CPU
implementation-specific initialization out of the kernel.

We are adding support for a dual core Scorpion target. The second core
will require some amount of initialization as well. If we take the
second core out of reset directly into the kernel, we would have to put
this initialization in the kernel.

Another option is having the secondary CPU(s) execute a portion of the
bootloader and come in through the main kernel entrypoint. This
simplifies things but would mean having to put a hook very early in the
primary boot path, compiled if SMP is configured, which checks the MPIDR
and reroutes secondary CPUs.

It would also be possible to somehow communicate the secondary CPU
entrypoint from CPU0 in the kernel to secondary CPUs in the bootloader,
but that seems uglier than the second option above IMO.

Any thoughts?

thanks,
Steve

secondary processor initialization

[Russell King - ARM Linux]

On Tue, Mar 09, 2010 at 11:33:12AM -0800, Steve Muckle wrote:
> We are adding support for a dual core Scorpion target. The second core
> will require some amount of initialization as well. If we take the
> second core out of reset directly into the kernel, we would have to put
> this initialization in the kernel.

Although we leave the secondary boot code completely up to the board,
we have to date no code in the kernel to deal with bringing a core out
of reset.

We assume that the secondary CPUs are being taken care of by the boot
loader, and we have to poke the address of the secondary CPU
initialization function to some register or memory location and signal
the boot loader.

> Another option is having the secondary CPU(s) execute a portion of the
> bootloader and come in through the main kernel entrypoint. This
> simplifies things but would mean having to put a hook very early in the
> primary boot path, compiled if SMP is configured, which checks the MPIDR
> and reroutes secondary CPUs.

I believe this is what everyone does.