[PATCH v2] ARM: Samsung: S5PC100 platform cleanup

[PATCH v2] ARM: Samsung: S5PC100 platform cleanup

[Marek Szyprowski]

Hello,

This patch series perform a general cleanup in Samsung S5PC100 SoC support.
This chip is moved from custom s5pc1xx platform framework to new plat-s5p
framework, so more common code can be easily reused in upcomming extensions
for S5PV210/S5PC110 SoCs.

This patch series is prepared against next-samsung tree, with assumption
that the "[PATCH v3] ARM: S5PC100: Pre-requisite clock patch for plat-s5pc1xx
to plat-s5p" has been applied.

I've tried to split my changes as much as possible to clearly show how the
transition from plat-s5pc1xx to plat-s5p is being done.

Changes since v1:
- bases on completely new clock code provided by Kukjin Kim
- added some plat-s5p fixes required for transition
- removed custom functions from gpiolib implementation (now uses common
  code from plat-samsung)
- restructured the changes to avoid breaking the functionality beteen the
  patches
- some other minor cleanups (mainly c1xx to c100 renames)

This patch series includes:

[PATCH 01/15] ARM: Samsung: fix broken timer irq base
[PATCH 02/15] ARM: Samsung: move common I2C0 device helpers to machine directories
[PATCH 03/15] ARM: Samsung: move driver strength gpio configuration helper to common dir
[PATCH 04/15] drivers: serial: S5PC100 serial driver cleanup
[PATCH 05/15] ARM: S5PC100: Use common functions for gpiolib implementation
[PATCH 06/15] ARM: S5PC100: Move gpio support from plat-s5pc1xx to mach-s5pc100
[PATCH 07/15] ARM: S5PC100: rename gpio registers from s5pc1xx to s5pc100
[PATCH 08/15] ARM: S5PC100: Move frame buffer helpers from plat-s5pc1xx to mach-s5pc100
[PATCH 09/15] ARM: S5PC100: Move i2c helpers from plat-s5pc1xx to mach-s5pc100
[PATCH 10/15] ARM: S5PC100: Move sdhci helpers from plat-s5pc1xx to mach-s5pc100
[PATCH 11/15] ARM: Samsung: move S5PC100 support from plat-s5pc1xx to plat-s5p framework
[PATCH 12/15] ARM: SMDKC100: fix frame buffer definitions
[PATCH 13/15] ARM: Samsung: Move external interrupts support from plat-s5pc1xx to plat-s5p
[PATCH 14/15] ARM: S5PC100: Add support for gpio interrupt
[PATCH 15/15] ARM: remove obsolete plat-s5pc1xx directory

[PATCH 01/15] ARM: Samsung: fix broken timer irq base

[Marek Szyprowski]

Timer interrupts range was defined as 43-47, what overlaps with VIC0 range
(32-64). This was caused probably by a typo while the common interrupts
definition was refactored. This patch moves timer interrupt range to safe
area of 11-15 (just before uart range).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/plat-s5p/include/plat/irqs.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 42e757f..9ff3d71 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -79,7 +79,7 @@
 #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
 #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
 
-#define S5P_TIMER_IRQ(x)	S5P_IRQ(11 + (x))
+#define S5P_TIMER_IRQ(x)	(11 + (x))
 
 #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
 #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
-- 
1.6.4

[PATCH 02/15] ARM: Samsung: move common I2C0 device helpers to machine directories

[Marek Szyprowski]

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5p6440/Makefile                   |    1 +
 arch/arm/{plat-s5p => mach-s5p6440}/setup-i2c0.c |    2 +-
 arch/arm/mach-s5p6442/Makefile                   |    1 +
 arch/arm/{plat-s5p => mach-s5p6442}/setup-i2c0.c |    2 +-
 arch/arm/mach-s5pv210/Makefile                   |    1 +
 arch/arm/{plat-s5p => mach-s5pv210}/setup-i2c0.c |   10 +++++-----
 arch/arm/plat-s5p/Makefile                       |    1 -
 7 files changed, 10 insertions(+), 8 deletions(-)
 copy arch/arm/{plat-s5p => mach-s5p6440}/setup-i2c0.c (92%)
 copy arch/arm/{plat-s5p => mach-s5p6442}/setup-i2c0.c (92%)
 rename arch/arm/{plat-s5p => mach-s5pv210}/setup-i2c0.c (69%)

diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
index 1ad894b..9646cdf 100644
--- a/arch/arm/mach-s5p6440/Makefile
+++ b/arch/arm/mach-s5p6440/Makefile
@@ -13,6 +13,7 @@ obj-				:=
 # Core support for S5P6440 system
 
 obj-$(CONFIG_CPU_S5P6440)	+= cpu.o init.o clock.o gpio.o
+obj-$(CONFIG_CPU_S5P6440)	+= setup-i2c0.o
 
 # machine support
 
diff --git a/arch/arm/plat-s5p/setup-i2c0.c b/arch/arm/mach-s5p6440/setup-i2c0.c
similarity index 92%
copy from arch/arm/plat-s5p/setup-i2c0.c
copy to arch/arm/mach-s5p6440/setup-i2c0.c
index 67a66e0..69e8a66 100644
--- a/arch/arm/plat-s5p/setup-i2c0.c
+++ b/arch/arm/mach-s5p6440/setup-i2c0.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/setup-i2c0.c
+/* linux/arch/arm/mach-s5p6440/setup-i2c0.c
  *
  * Copyright (c) 2009 Samsung Electronics Co., Ltd.
  *		http://www.samsung.com/
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
index dde39a6..4942c14 100644
--- a/arch/arm/mach-s5p6442/Makefile
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -13,6 +13,7 @@ obj-				:=
 # Core support for S5P6442 system
 
 obj-$(CONFIG_CPU_S5P6442)	+= cpu.o init.o clock.o
+obj-$(CONFIG_CPU_S5P6442)	+= setup-i2c0.o
 
 # machine support
 
diff --git a/arch/arm/plat-s5p/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c
similarity index 92%
copy from arch/arm/plat-s5p/setup-i2c0.c
copy to arch/arm/mach-s5p6442/setup-i2c0.c
index 67a66e0..662695d 100644
--- a/arch/arm/plat-s5p/setup-i2c0.c
+++ b/arch/arm/mach-s5p6442/setup-i2c0.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5p/setup-i2c0.c
+/* linux/arch/arm/mach-s5p6442/setup-i2c0.c
  *
  * Copyright (c) 2009 Samsung Electronics Co., Ltd.
  *		http://www.samsung.com/
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 8ebf51c..1a972a5 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -13,6 +13,7 @@ obj-				:=
 # Core support for S5PV210 system
 
 obj-$(CONFIG_CPU_S5PV210)	+= cpu.o init.o clock.o
+obj-$(CONFIG_CPU_S5PV210)	+= setup-i2c0.o
 
 # machine support
 
diff --git a/arch/arm/plat-s5p/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c
similarity index 69%
rename from arch/arm/plat-s5p/setup-i2c0.c
rename to arch/arm/mach-s5pv210/setup-i2c0.c
index 67a66e0..27de0c1 100644
--- a/arch/arm/plat-s5p/setup-i2c0.c
+++ b/arch/arm/mach-s5pv210/setup-i2c0.c
@@ -1,11 +1,11 @@
-/* linux/arch/arm/plat-s5p/setup-i2c0.c
+/*
+ * linux/arch/arm/mach-s5pv210/setup-i2c2.c
  *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com/
+ * Copyright 2009 Samsung Electronics Co.
  *
- * I2C0 GPIO configuration.
+ * Base S5PV210 I2C bus 0 gpio configuration
  *
- * Based on plat-s3c64xx/setup-i2c0.c
+ * Based on mach-s3c64xx/setup-i2c0.c
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index a7c54b3..0ec09a9 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -16,4 +16,3 @@ obj-y				+= dev-uart.o
 obj-y				+= cpu.o
 obj-y				+= clock.o
 obj-y				+= irq.o
-obj-y				+= setup-i2c0.o
-- 
1.6.4

[PATCH 03/15] ARM: Samsung: move driver strength gpio configuration helper to common dir

[Marek Szyprowski]

Driver strength parameter can be changed not only on S5PC100 but also
on S5PV210/S5PC110 platforms, so move the helper functions to the common
plat-samsung directory.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/plat-s5p/Kconfig                          |    1 +
 arch/arm/plat-s5pc1xx/Kconfig                      |    2 +-
 arch/arm/plat-s5pc1xx/Makefile                     |    1 -
 arch/arm/plat-s5pc1xx/gpio-config.c                |   62 --------------------
 .../plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h   |   32 ----------
 arch/arm/plat-s5pc1xx/setup-fb-24bpp.c             |    1 -
 arch/arm/plat-samsung/Kconfig                      |   12 ++--
 arch/arm/plat-samsung/gpio-config.c                |   48 +++++++++++++++
 arch/arm/plat-samsung/include/plat/gpio-cfg.h      |   30 ++++++++++
 9 files changed, 86 insertions(+), 103 deletions(-)
 delete mode 100644 arch/arm/plat-s5pc1xx/gpio-config.c
 delete mode 100644 arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h

diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index d400a6a..92bd756 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -13,6 +13,7 @@ config PLAT_S5P
 	select NO_IOPORT
 	select ARCH_REQUIRE_GPIOLIB
 	select S3C_GPIO_TRACK
+	select S5P_GPIO_DRVSTR
 	select SAMSUNG_GPIOLIB_4BIT
 	select S3C_GPIO_CFG_S3C64XX
 	select S3C_GPIO_PULL_UPDOWN
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index c7ccdf2..79d3be7 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -16,9 +16,9 @@ config PLAT_S5PC1XX
 	select SAMSUNG_IRQ_VIC_TIMER
 	select S3C_GPIO_TRACK
 	select S3C_GPIO_PULL_UPDOWN
+	select S5P_GPIO_DRVSTR
 	select S3C_GPIO_CFG_S3C24XX
 	select S3C_GPIO_CFG_S3C64XX
-	select S5P_GPIO_CFG_S5PC1XX
 	help
 	  Base platform code for any Samsung S5PC1XX device
 
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile
index 278f268..66a8f3e 100644
--- a/arch/arm/plat-s5pc1xx/Makefile
+++ b/arch/arm/plat-s5pc1xx/Makefile
@@ -24,7 +24,6 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK)	+= s5pc100-clock.o
 
 # Device setup
 
-obj-$(CONFIG_S5P_GPIO_CFG_S5PC1XX) += gpio-config.o
 obj-$(CONFIG_S5PC1XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
 obj-$(CONFIG_S5PC1XX_SETUP_I2C0) += setup-i2c0.o
 obj-$(CONFIG_S5PC1XX_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/plat-s5pc1xx/gpio-config.c b/arch/arm/plat-s5pc1xx/gpio-config.c
deleted file mode 100644
index a4f67e8..0000000
--- a/arch/arm/plat-s5pc1xx/gpio-config.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/* linux/arch/arm/plat-s5pc1xx/gpio-config.c
- *
- * Copyright 2009 Samsung Electronics
- *
- * S5PC1XX GPIO Configuration.
- *
- * Based on plat-s3c64xx/gpio-config.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
-#include <linux/io.h>
-
-#include <plat/gpio-core.h>
-#include <plat/gpio-cfg-s5pc1xx.h>
-
-s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off)
-{
-	struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
-	void __iomem *reg;
-	int shift = off * 2;
-	u32 drvstr;
-
-	if (!chip)
-		return -EINVAL;
-
-	reg = chip->base + 0x0C;
-
-	drvstr = __raw_readl(reg);
-	drvstr = 0xffff & (0x3 << shift);
-	drvstr = drvstr >> shift;
-
-	return (__force s5p_gpio_drvstr_t)drvstr;
-}
-EXPORT_SYMBOL(s5p_gpio_get_drvstr);
-
-int s5p_gpio_set_drvstr(unsigned int pin, unsigned int off,
-			s5p_gpio_drvstr_t drvstr)
-{
-	struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
-	void __iomem *reg;
-	int shift = off * 2;
-	u32 tmp;
-
-	if (!chip)
-		return -EINVAL;
-
-	reg = chip->base + 0x0C;
-
-	tmp = __raw_readl(reg);
-	tmp |= drvstr << shift;
-
-	__raw_writel(tmp, reg);
-
-	return 0;
-}
-EXPORT_SYMBOL(s5p_gpio_set_drvstr);
diff --git a/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h b/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h
deleted file mode 100644
index 72ad59f..0000000
--- a/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* linux/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg.h
- *
- * Copyright 2009 Samsung Electronic
- *
- * S5PC1XX Platform - GPIO pin configuration
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* This file contains the necessary definitions to get the basic gpio
- * pin configuration done such as setting a pin to input or output or
- * changing the pull-{up,down} configurations.
- */
-
-#ifndef __GPIO_CFG_S5PC1XX_H
-#define __GPIO_CFG_S5PC1XX_H __FILE__
-
-typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
-
-#define S5P_GPIO_DRVSTR_LV1	0x00
-#define S5P_GPIO_DRVSTR_LV2	0x01
-#define S5P_GPIO_DRVSTR_LV3	0x10
-#define S5P_GPIO_DRVSTR_LV4	0x11
-
-extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off);
-
-extern int s5p_gpio_set_drvstr(unsigned int pin, unsigned int off,
-			s5p_gpio_drvstr_t drvstr);
-
-#endif /* __GPIO_CFG_S5PC1XX_H */
diff --git a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c b/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
index 1a63768..b02c36f 100644
--- a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
+++ b/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
@@ -19,7 +19,6 @@
 #include <mach/map.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
-#include <plat/gpio-cfg-s5pc1xx.h>
 
 #define DISR_OFFSET	0x7008
 
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 287e6f7..6ccfd60 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -90,12 +90,6 @@ config S3C_GPIO_CFG_S3C64XX
 	  Internal configuration to enable S3C64XX style GPIO configuration
 	  functions.
 
-config S5P_GPIO_CFG_S5PC1XX
-	bool
-	help
-	  Internal configuration to enable S5PC1XX style GPIO configuration
-	  functions.
-
 config S3C_GPIO_PULL_UPDOWN
 	bool
 	help
@@ -111,6 +105,12 @@ config S3C_GPIO_PULL_UP
 	help
 	  Internal configuration to enable the correct GPIO pull helper
 
+config S5P_GPIO_DRVSTR
+	bool
+	help
+	  Internal configuration to get and set correct GPIO driver strength
+	  helper
+
 config SAMSUNG_GPIO_EXTRA
 	int "Number of additional GPIO pins"
 	default 0
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 3282db3..d0e67a2 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -261,3 +261,51 @@ s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
 }
 #endif /* CONFIG_S3C_GPIO_PULL_UP */
 
+#ifdef CONFIG_S5P_GPIO_DRVSTR
+s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
+{
+	struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
+	unsigned int off;
+	void __iomem *reg;
+	int shift;
+	u32 drvstr;
+
+	if (!chip)
+		return -EINVAL;
+
+	off = chip->chip.base - pin;
+	shift = off * 2;
+	reg = chip->base + 0x0C;
+
+	drvstr = __raw_readl(reg);
+	drvstr = 0xffff & (0x3 << shift);
+	drvstr = drvstr >> shift;
+
+	return (__force s5p_gpio_drvstr_t)drvstr;
+}
+EXPORT_SYMBOL(s5p_gpio_get_drvstr);
+
+int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr)
+{
+	struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
+	unsigned int off;
+	void __iomem *reg;
+	int shift;
+	u32 tmp;
+
+	if (!chip)
+		return -EINVAL;
+
+	off = chip->chip.base - pin;
+	shift = off * 2;
+	reg = chip->base + 0x0C;
+
+	tmp = __raw_readl(reg);
+	tmp |= drvstr << shift;
+
+	__raw_writel(tmp, reg);
+
+	return 0;
+}
+EXPORT_SYMBOL(s5p_gpio_set_drvstr);
+#endif	/* CONFIG_S5P_GPIO_DRVSTR */
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 8d01e85..34efdd2 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -25,6 +25,7 @@
 #define __PLAT_GPIO_CFG_H __FILE__
 
 typedef unsigned int __bitwise__ s3c_gpio_pull_t;
+typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
 
 /* forward declaration if gpio-core.h hasn't been included */
 struct s3c_gpio_chip;
@@ -118,4 +119,33 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
 */
 extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
 
+/* Define values for the drvstr available for each gpio pin.
+ *
+ * These values control the value of the output signal driver strength,
+ * configurable on most pins on the S5C series.
+ */
+#define S5P_GPIO_DRVSTR_LV1	((__force s5p_gpio_drvstr_t)0x00)
+#define S5P_GPIO_DRVSTR_LV2	((__force s5p_gpio_drvstr_t)0x01)
+#define S5P_GPIO_DRVSTR_LV3	((__force s5p_gpio_drvstr_t)0x10)
+#define S5P_GPIO_DRVSTR_LV4	((__force s5p_gpio_drvstr_t)0x11)
+
+/**
+ * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
+ * @pin: The pin number to get the settings for
+ *
+ * Read the driver streght value for the specified pin.
+*/
+extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
+
+/**
+ * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
+ * @pin: The pin number to configure the driver streght value
+ * @drvstr: The new value of the driver strength
+ *
+ * This function sets the driver strength value for the specified pin.
+ * It will return 0 if successfull, or a negative error code if the pin
+ * cannot support the requested setting.
+*/
+extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
+
 #endif /* __PLAT_GPIO_CFG_H */
-- 
1.6.4

[PATCH 04/15] drivers: serial: S5PC100 serial driver cleanup

[Marek Szyprowski]

Remove unnecessary Kconfig entry. S5PC100 has exactly the same driver as
S3C6400/S3C6410/S5P6440.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/serial/Kconfig  |   16 ++++------------
 drivers/serial/Makefile |    1 -
 2 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 5f3f03d..302836a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -534,21 +534,13 @@ config SERIAL_S3C24A0
 	  Serial port support for the Samsung S3C24A0 SoC
 
 config SERIAL_S3C6400
-	tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support"
-	depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440)
+	tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port support"
+	depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5PC100)
 	select SERIAL_SAMSUNG_UARTS_4
 	default y
 	help
-	  Serial port support for the Samsung S3C6400, S3C6410 and S5P6440
-	  SoCs
-
-config SERIAL_S5PC100
-	tristate "Samsung S5PC100 Serial port support"
-	depends on SERIAL_SAMSUNG && CPU_S5PC100
-	select SERIAL_SAMSUNG_UARTS_4
-	default y
-	help
-	  Serial port support for the Samsung S5PC100 SoCs
+	  Serial port support for the Samsung S3C6400, S3C6410, S5P6440
+	  and S5PC100 SoCs
 
 config SERIAL_S5PV210
 	tristate "Samsung S5PV210 Serial port support"
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 6aa4723..328f107 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -44,7 +44,6 @@ obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o
 obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
 obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
 obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
-obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
 obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
 obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
 obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
-- 
1.6.4

[PATCH 05/15] ARM: S5PC100: Use common functions for gpiolib implementation

[Marek Szyprowski]

GPIOlib helpers from plat-samsung already have functions for accessing
4bit gpio banks. This patch removes the duplicated functions from
plat-s5pc1xx/gpiolib.c.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/plat-s5pc1xx/Kconfig   |    1 +
 arch/arm/plat-s5pc1xx/gpiolib.c |   96 ++++-----------------------------------
 2 files changed, 10 insertions(+), 87 deletions(-)

diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index 79d3be7..98bbaf9 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -19,6 +19,7 @@ config PLAT_S5PC1XX
 	select S5P_GPIO_DRVSTR
 	select S3C_GPIO_CFG_S3C24XX
 	select S3C_GPIO_CFG_S3C64XX
+	select SAMSUNG_GPIOLIB_4BIT
 	help
 	  Base platform code for any Samsung S5PC1XX device
 
diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/plat-s5pc1xx/gpiolib.c
index 1ffc57a..5a97a8f 100644
--- a/arch/arm/plat-s5pc1xx/gpiolib.c
+++ b/arch/arm/plat-s5pc1xx/gpiolib.c
@@ -61,74 +61,6 @@
  * L3	8	4Bit	None
  */
 
-#define OFF_GPCON	(0x00)
-#define OFF_GPDAT	(0x04)
-
-#define con_4bit_shift(__off) ((__off) * 4)
-
-#if 1
-#define gpio_dbg(x...) do { } while (0)
-#else
-#define gpio_dbg(x...) printk(KERN_DEBUG x)
-#endif
-
-/* The s5pc1xx_gpiolib routines are to control the gpio banks where
- * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
- * following example:
- *
- * base + 0x00: Control register, 4 bits per gpio
- *	        gpio n: 4 bits starting at (4*n)
- *		0000 = input, 0001 = output, others mean special-function
- * base + 0x04: Data register, 1 bit per gpio
- *		bit n: data bit n
- *
- * Note, since the data register is one bit per gpio and is at base + 0x4
- * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
- * the output.
- */
-
-static int s5pc1xx_gpiolib_input(struct gpio_chip *chip, unsigned offset)
-{
-	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-	void __iomem *base = ourchip->base;
-	unsigned long con;
-
-	con = __raw_readl(base + OFF_GPCON);
-	con &= ~(0xf << con_4bit_shift(offset));
-	__raw_writel(con, base + OFF_GPCON);
-
-	gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
-
-	return 0;
-}
-
-static int s5pc1xx_gpiolib_output(struct gpio_chip *chip,
-				       unsigned offset, int value)
-{
-	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-	void __iomem *base = ourchip->base;
-	unsigned long con;
-	unsigned long dat;
-
-	con = __raw_readl(base + OFF_GPCON);
-	con &= ~(0xf << con_4bit_shift(offset));
-	con |= 0x1 << con_4bit_shift(offset);
-
-	dat = __raw_readl(base + OFF_GPDAT);
-	if (value)
-		dat |= 1 << offset;
-	else
-		dat &= ~(1 << offset);
-
-	__raw_writel(dat, base + OFF_GPDAT);
-	__raw_writel(con, base + OFF_GPCON);
-	__raw_writel(dat, base + OFF_GPDAT);
-
-	gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
-
-	return 0;
-}
-
 static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
 {
 	return S3C_IRQ_GPIO(chip->base + offset);
@@ -452,11 +384,8 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
 extern struct irq_chip s5pc1xx_gpioint;
 extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc);
 
-static __init void s5pc1xx_gpiolib_link(struct s3c_gpio_chip *chip)
+static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
 {
-	chip->chip.direction_input = s5pc1xx_gpiolib_input;
-	chip->chip.direction_output = s5pc1xx_gpiolib_output;
-	chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
 
 	/* Interrupt */
 	if (chip->config == &gpio_cfg) {
@@ -475,26 +404,19 @@ static __init void s5pc1xx_gpiolib_link(struct s3c_gpio_chip *chip)
 		chip->chip.to_irq = s5pc1xx_gpiolib_to_eint;
 }
 
-static __init void s5pc1xx_gpiolib_add(struct s3c_gpio_chip *chips,
-				       int nr_chips,
-				       void (*fn)(struct s3c_gpio_chip *))
-{
-	for (; nr_chips > 0; nr_chips--, chips++) {
-		if (fn)
-			(fn)(chips);
-		s3c_gpiolib_add(chips);
-	}
-}
-
 static __init int s5pc1xx_gpiolib_init(void)
 {
-	struct s3c_gpio_chip *chips;
+	struct s3c_gpio_chip *chip;
 	int nr_chips;
 
-		chips = s5pc100_gpio_chips;
-		nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
+	chip = s5pc100_gpio_chips;
+	nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
+
+	for (; nr_chips > 0; nr_chips--, chip++)
+		s5pc100_gpiolib_link(chip);
 
-	s5pc1xx_gpiolib_add(chips, nr_chips, s5pc1xx_gpiolib_link);
+	samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
+				       ARRAY_SIZE(s5pc100_gpio_chips));
 	/* Interrupt */
 	set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler);
 
-- 
1.6.4

[PATCH 06/15] ARM: S5PC100: Move gpio support from plat-s5pc1xx to mach-s5pc100

[Marek Szyprowski]

Move gpio-lib support from plat-s5pc1xx to mach-s5pc100. Only basic gpio
functionality is now supported. Gpio interrupts are disabled temporarly
and will be added later.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pc100/Makefile                     |    2 +-
 .../gpiolib.c => mach-s5pc100/gpio.c}              |   11 +++++++----
 .../plat => mach-s5pc100/include/mach}/regs-gpio.h |    0
 arch/arm/mach-s5pc100/mach-smdkc100.c              |    1 -
 arch/arm/plat-s5pc1xx/Makefile                     |    3 +--
 5 files changed, 9 insertions(+), 8 deletions(-)
 rename arch/arm/{plat-s5pc1xx/gpiolib.c => mach-s5pc100/gpio.c} (99%)
 rename arch/arm/{plat-s5pc1xx/include/plat => mach-s5pc100/include/mach}/regs-gpio.h (100%)

diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 809ff10..e1afdbf 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -11,7 +11,7 @@ obj-				:=
 
 # Core support for S5PC100 system
 
-obj-$(CONFIG_CPU_S5PC100)	+= cpu.o
+obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpio.o
 
 # Helper and device support
 
diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/mach-s5pc100/gpio.c
similarity index 99%
rename from arch/arm/plat-s5pc1xx/gpiolib.c
rename to arch/arm/mach-s5pc100/gpio.c
index 5a97a8f..c8e8336 100644
--- a/arch/arm/plat-s5pc1xx/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpio.c
@@ -17,11 +17,11 @@
 #include <linux/gpio.h>
 
 #include <mach/map.h>
+#include <mach/regs-gpio.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
-#include <plat/regs-gpio.h>
 
 /* S5PC100 GPIO bank summary:
  *
@@ -61,6 +61,7 @@
  * L3	8	4Bit	None
  */
 
+#if 0
 static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
 {
 	return S3C_IRQ_GPIO(chip->base + offset);
@@ -84,7 +85,7 @@ static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
 		return IRQ_EINT(24 + offset);
 	return -EINVAL;
 }
-
+#endif
 static struct s3c_gpio_cfg gpio_cfg = {
 	.set_config	= s3c_gpio_setcfg_s3c64xx_4bit,
 	.set_pull	= s3c_gpio_setpull_updown,
@@ -386,7 +387,7 @@ extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc)
 
 static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
 {
-
+#if 0
 	/* Interrupt */
 	if (chip->config == &gpio_cfg) {
 		int i, irq;
@@ -402,6 +403,7 @@ static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
 		}
 	} else if (chip->config == &gpio_cfg_eint)
 		chip->chip.to_irq = s5pc1xx_gpiolib_to_eint;
+#endif
 }
 
 static __init int s5pc1xx_gpiolib_init(void)
@@ -417,9 +419,10 @@ static __init int s5pc1xx_gpiolib_init(void)
 
 	samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
 				       ARRAY_SIZE(s5pc100_gpio_chips));
+#if 0
 	/* Interrupt */
 	set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler);
-
+#endif
 	return 0;
 }
 core_initcall(s5pc1xx_gpiolib_init);
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
similarity index 100%
rename from arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h
rename to arch/arm/mach-s5pc100/include/mach/regs-gpio.h
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index ae3c52c..bfe67db 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -35,7 +35,6 @@
 
 #include <plat/regs-serial.h>
 #include <plat/gpio-cfg.h>
-#include <plat/regs-gpio.h>
 
 #include <plat/clock.h>
 #include <plat/devs.h>
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile
index 66a8f3e..540fca5 100644
--- a/arch/arm/plat-s5pc1xx/Makefile
+++ b/arch/arm/plat-s5pc1xx/Makefile
@@ -13,9 +13,8 @@ obj-				:=
 
 obj-y				+= dev-uart.o
 obj-y				+= cpu.o
-obj-y				+= irq.o irq-gpio.o irq-eint.o
+obj-y				+= irq.o
 obj-y				+= clock.o
-obj-y				+= gpiolib.o
 
 # CPU support
 
-- 
1.6.4

[PATCH 07/15] ARM: S5PC100: rename gpio registers from s5pc1xx to s5pc100

[Marek Szyprowski]

This patch renames gpio related registers from s5pc1xx to s5pc100 to
better match the plat-s5p framework style.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pc100/include/mach/gpio.h      |   82 ++++++++++++------------
 arch/arm/mach-s5pc100/include/mach/regs-gpio.h |    8 +-
 2 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h
index 2c4cbe8..fb2f40a 100644
--- a/arch/arm/mach-s5pc100/include/mach/gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/gpio.h
@@ -65,50 +65,50 @@
  * change from one gpio bank to another can be caught.
 */
 
-#define S5PC1XX_GPIO_NEXT(__gpio) \
+#define S5PC100_GPIO_NEXT(__gpio) \
 	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
 
 enum s3c_gpio_number {
 	S5PC100_GPIO_A0_START	= 0,
-	S5PC100_GPIO_A1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A0),
-	S5PC100_GPIO_B_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A1),
-	S5PC100_GPIO_C_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_B),
-	S5PC100_GPIO_D_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_C),
-	S5PC100_GPIO_E0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_D),
-	S5PC100_GPIO_E1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E0),
-	S5PC100_GPIO_F0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E1),
-	S5PC100_GPIO_F1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F0),
-	S5PC100_GPIO_F2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F1),
-	S5PC100_GPIO_F3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F2),
-	S5PC100_GPIO_G0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F3),
-	S5PC100_GPIO_G1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G0),
-	S5PC100_GPIO_G2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G1),
-	S5PC100_GPIO_G3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G2),
-	S5PC100_GPIO_H0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G3),
-	S5PC100_GPIO_H1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H0),
-	S5PC100_GPIO_H2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H1),
-	S5PC100_GPIO_H3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H2),
-	S5PC100_GPIO_I_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H3),
-	S5PC100_GPIO_J0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_I),
-	S5PC100_GPIO_J1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J0),
-	S5PC100_GPIO_J2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J1),
-	S5PC100_GPIO_J3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J2),
-	S5PC100_GPIO_J4_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J3),
-	S5PC100_GPIO_K0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J4),
-	S5PC100_GPIO_K1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K0),
-	S5PC100_GPIO_K2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K1),
-	S5PC100_GPIO_K3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K2),
-	S5PC100_GPIO_L0_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K3),
-	S5PC100_GPIO_L1_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L0),
-	S5PC100_GPIO_L2_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L1),
-	S5PC100_GPIO_L3_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L2),
-	S5PC100_GPIO_L4_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L3),
-	S5PC100_GPIO_MP00_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L4),
-	S5PC100_GPIO_MP01_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP00),
-	S5PC100_GPIO_MP02_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP01),
-	S5PC100_GPIO_MP03_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP02),
-	S5PC100_GPIO_MP04_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP03),
-	S5PC100_GPIO_END	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP04),
+	S5PC100_GPIO_A1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_A0),
+	S5PC100_GPIO_B_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_A1),
+	S5PC100_GPIO_C_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_B),
+	S5PC100_GPIO_D_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_C),
+	S5PC100_GPIO_E0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_D),
+	S5PC100_GPIO_E1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_E0),
+	S5PC100_GPIO_F0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_E1),
+	S5PC100_GPIO_F1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_F0),
+	S5PC100_GPIO_F2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_F1),
+	S5PC100_GPIO_F3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_F2),
+	S5PC100_GPIO_G0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_F3),
+	S5PC100_GPIO_G1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_G0),
+	S5PC100_GPIO_G2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_G1),
+	S5PC100_GPIO_G3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_G2),
+	S5PC100_GPIO_H0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_G3),
+	S5PC100_GPIO_H1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H0),
+	S5PC100_GPIO_H2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H1),
+	S5PC100_GPIO_H3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H2),
+	S5PC100_GPIO_I_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H3),
+	S5PC100_GPIO_J0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_I),
+	S5PC100_GPIO_J1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J0),
+	S5PC100_GPIO_J2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J1),
+	S5PC100_GPIO_J3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J2),
+	S5PC100_GPIO_J4_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J3),
+	S5PC100_GPIO_K0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J4),
+	S5PC100_GPIO_K1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_K0),
+	S5PC100_GPIO_K2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_K1),
+	S5PC100_GPIO_K3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_K2),
+	S5PC100_GPIO_L0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_K3),
+	S5PC100_GPIO_L1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L0),
+	S5PC100_GPIO_L2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L1),
+	S5PC100_GPIO_L3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L2),
+	S5PC100_GPIO_L4_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L3),
+	S5PC100_GPIO_MP00_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L4),
+	S5PC100_GPIO_MP01_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_MP00),
+	S5PC100_GPIO_MP02_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_MP01),
+	S5PC100_GPIO_MP03_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_MP02),
+	S5PC100_GPIO_MP04_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_MP03),
+	S5PC100_GPIO_END	= S5PC100_GPIO_NEXT(S5PC100_GPIO_MP04),
 };
 
 /* S5PC100 GPIO number definitions. */
@@ -153,7 +153,7 @@ enum s3c_gpio_number {
 #define S5PC100_MP04(_nr)	(S5PC100_GPIO_MP04_START + (_nr))
 #define S5PC100_MP05(_nr)	(S5PC100_GPIO_MP05_START + (_nr))
 
-/* It used the end of the S5PC1XX gpios */
+/* It used the end of the S5PC100 gpios */
 #define S3C_GPIO_END		S5PC100_GPIO_END
 
 /* define the number of gpios we need to the one after the MP04() range */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
index 43c7bc8..6866691 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
@@ -3,11 +3,11 @@
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
- * S5PC1XX - GPIO register definitions
+ * S5PC100 - GPIO register definitions
  */
 
-#ifndef __ASM_PLAT_S5PC1XX_REGS_GPIO_H
-#define __ASM_PLAT_S5PC1XX_REGS_GPIO_H __FILE__
+#ifndef __ASM_MACH_S5PC100_REGS_GPIO_H
+#define __ASM_MACH_S5PC100_REGS_GPIO_H __FILE__
 
 #include <mach/map.h>
 
@@ -66,5 +66,5 @@
 #define S5PC100_GPx_OUTPUT(__gpio)	(0x1 << ((__gpio) * 4))
 #define S5PC100_GPx_CONMASK(__gpio)	(0xf << ((__gpio) * 4))
 
-#endif /* __ASM_PLAT_S5PC1XX_REGS_GPIO_H */
+#endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */
 
-- 
1.6.4

[PATCH 08/15] ARM: S5PC100: Move frame buffer helpers from plat-s5pc1xx to mach-s5pc100

[Marek Szyprowski]

Move frame buffer helpers from plat-s5pc1xx to mach-s5pc100.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pc100/Kconfig                      |    7 ++++++-
 arch/arm/mach-s5pc100/Makefile                     |    1 +
 .../setup-fb-24bpp.c                               |    4 ++--
 arch/arm/plat-s5pc1xx/Kconfig                      |    5 -----
 arch/arm/plat-s5pc1xx/Makefile                     |    1 -
 5 files changed, 9 insertions(+), 9 deletions(-)
 rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/setup-fb-24bpp.c (91%)

diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 27ec167..b24c66d 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -12,6 +12,11 @@ config CPU_S5PC100
 	help
 	  Enable S5PC100 CPU support
 
+config S5PC100_SETUP_FB_24BPP
+	bool
+	help
+          Common setup code for S5PC1XX with an 24bpp RGB display helper.
+
 config S5PC100_SETUP_SDHCI
         bool
         select S5PC1XX_SETUP_SDHCI_GPIO
@@ -28,7 +33,7 @@ config MACH_SMDKC100
 	select S3C_DEV_HSMMC2
 	select S5PC1XX_SETUP_I2C0
 	select S5PC1XX_SETUP_I2C1
-	select S5PC1XX_SETUP_FB_24BPP
+	select S5PC100_SETUP_FB_24BPP
 	select S5PC100_SETUP_SDHCI
 	help
 	  Machine support for the Samsung SMDKC100
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index e1afdbf..ccf0dca 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpio.o
 
 # Helper and device support
 
+obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)	+= setup-fb-24bpp.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
 
 # machine support
diff --git a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
similarity index 91%
rename from arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
rename to arch/arm/mach-s5pc100/setup-fb-24bpp.c
index b02c36f..6eba6cb 100644
--- a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
@@ -1,9 +1,9 @@
 /*
- * linux/arch/arm/plat-s5pc100/setup-fb-24bpp.c
+ * linux/arch/arm/mach-s5pc100/setup-fb-24bpp.c
  *
  * Copyright 2009 Samsung Electronics
  *
- * Base S5PC1XX setup information for 24bpp LCD framebuffer
+ * Base S5PC100 setup information for 24bpp LCD framebuffer
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index 98bbaf9..708f7a0 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -39,11 +39,6 @@ config CPU_S5PC100_CLOCK
 
 # platform specific device setup
 
-config S5PC1XX_SETUP_FB_24BPP
-	bool
-	help
-          Common setup code for S5PC1XX with an 24bpp RGB display helper.
-
 config S5PC1XX_SETUP_I2C0
 	bool
 	default y
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile
index 540fca5..a5b90c0 100644
--- a/arch/arm/plat-s5pc1xx/Makefile
+++ b/arch/arm/plat-s5pc1xx/Makefile
@@ -23,7 +23,6 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK)	+= s5pc100-clock.o
 
 # Device setup
 
-obj-$(CONFIG_S5PC1XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
 obj-$(CONFIG_S5PC1XX_SETUP_I2C0) += setup-i2c0.o
 obj-$(CONFIG_S5PC1XX_SETUP_I2C1) += setup-i2c1.o
 obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
-- 
1.6.4

[PATCH 09/15] ARM: S5PC100: Move i2c helpers from plat-s5pc1xx to mach-s5pc100

[Marek Szyprowski]

Move i2c helpers from plat-s5pc1xx to mach-s5pc100.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pc100/Kconfig                      |    8 ++++++--
 arch/arm/mach-s5pc100/Makefile                     |    2 ++
 .../{plat-s5pc1xx => mach-s5pc100}/setup-i2c0.c    |    4 ++--
 .../{plat-s5pc1xx => mach-s5pc100}/setup-i2c1.c    |    4 ++--
 arch/arm/plat-s5pc1xx/Kconfig                      |   14 --------------
 arch/arm/plat-s5pc1xx/Makefile                     |    2 --
 6 files changed, 12 insertions(+), 22 deletions(-)
 rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/setup-i2c0.c (89%)
 rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/setup-i2c1.c (89%)

diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index b24c66d..9b10541 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -23,6 +23,11 @@ config S5PC100_SETUP_SDHCI
         help
           Internal helper functions for S5PC100 based SDHCI systems
 
+config S5PC100_SETUP_I2C1
+	bool
+	help
+	  Common setup code for i2c bus 1.
+
 config MACH_SMDKC100
 	bool "SMDKC100"
 	select CPU_S5PC100
@@ -31,9 +36,8 @@ config MACH_SMDKC100
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_HSMMC2
-	select S5PC1XX_SETUP_I2C0
-	select S5PC1XX_SETUP_I2C1
 	select S5PC100_SETUP_FB_24BPP
+	select S5PC100_SETUP_I2C1
 	select S5PC100_SETUP_SDHCI
 	help
 	  Machine support for the Samsung SMDKC100
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index ccf0dca..741fba0 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -12,10 +12,12 @@ obj-				:=
 # Core support for S5PC100 system
 
 obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpio.o
+obj-$(CONFIG_CPU_S5PC100)	+= setup-i2c0.o
 
 # Helper and device support
 
 obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)	+= setup-fb-24bpp.o
+obj-$(CONFIG_S5PC100_SETUP_I2C1)	+= setup-i2c1.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
 
 # machine support
diff --git a/arch/arm/plat-s5pc1xx/setup-i2c0.c b/arch/arm/mach-s5pc100/setup-i2c0.c
similarity index 89%
rename from arch/arm/plat-s5pc1xx/setup-i2c0.c
rename to arch/arm/mach-s5pc100/setup-i2c0.c
index 5e4a7c3..dd3174e 100644
--- a/arch/arm/plat-s5pc1xx/setup-i2c0.c
+++ b/arch/arm/mach-s5pc100/setup-i2c0.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/plat-s5pc1xx/setup-i2c0.c
+/* linux/arch/arm/mach-s5pc100/setup-i2c0.c
  *
  * Copyright 2009 Samsung Electronics Co.
  *	Byungho Min <bhmin@samsung.com>
  *
- * Base S5PC1XX I2C bus 0 gpio configuration
+ * Base S5PC100 I2C bus 0 gpio configuration
  *
  * Based on plat-s3c64xx/setup-i2c0.c
  *
diff --git a/arch/arm/plat-s5pc1xx/setup-i2c1.c b/arch/arm/mach-s5pc100/setup-i2c1.c
similarity index 89%
rename from arch/arm/plat-s5pc1xx/setup-i2c1.c
rename to arch/arm/mach-s5pc100/setup-i2c1.c
index a0a8b4a..d1fec26 100644
--- a/arch/arm/plat-s5pc1xx/setup-i2c1.c
+++ b/arch/arm/mach-s5pc100/setup-i2c1.c
@@ -1,9 +1,9 @@
-/* linux/arch/arm/plat-s3c64xx/setup-i2c1.c
+/* linux/arch/arm/mach-s5pc100/setup-i2c1.c
  *
  * Copyright 2009 Samsung Electronics Co.
  *	Byungho Min <bhmin@samsung.com>
  *
- * Base S5PC1XX I2C bus 1 gpio configuration
+ * Base S5PC100 I2C bus 1 gpio configuration
  *
  * Based on plat-s3c64xx/setup-i2c1.c
  *
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index 708f7a0..c7bd2bb 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -39,20 +39,6 @@ config CPU_S5PC100_CLOCK
 
 # platform specific device setup
 
-config S5PC1XX_SETUP_I2C0
-	bool
-	default y
-	help
-	  Common setup code for i2c bus 0.
-
-	  Note, currently since i2c0 is always compiled, this setup helper
-	  is always compiled with it.
-
-config S5PC1XX_SETUP_I2C1
-	bool
-	help
-	  Common setup code for i2c bus 1.
-
 config S5PC1XX_SETUP_SDHCI_GPIO
 	bool
 	help
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile
index a5b90c0..9ce6409 100644
--- a/arch/arm/plat-s5pc1xx/Makefile
+++ b/arch/arm/plat-s5pc1xx/Makefile
@@ -23,6 +23,4 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK)	+= s5pc100-clock.o
 
 # Device setup
 
-obj-$(CONFIG_S5PC1XX_SETUP_I2C0) += setup-i2c0.o
-obj-$(CONFIG_S5PC1XX_SETUP_I2C1) += setup-i2c1.o
 obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
-- 
1.6.4

[PATCH 10/15] ARM: S5PC100: Move sdhci helpers from plat-s5pc1xx to mach-s5pc100

[Marek Szyprowski]

Move sdhci helpers from plat-s5pc1xx to mach-s5pc100.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pc100/Kconfig                      |   11 +++++++++++
 arch/arm/mach-s5pc100/Makefile                     |    1 +
 .../setup-sdhci-gpio.c                             |    4 ++--
 arch/arm/plat-s5pc1xx/Kconfig                      |    5 -----
 arch/arm/plat-s5pc1xx/Makefile                     |    1 -
 5 files changed, 14 insertions(+), 8 deletions(-)
 rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/setup-sdhci-gpio.c (95%)

diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 9b10541..176c9a1 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -28,6 +28,17 @@ config S5PC100_SETUP_I2C1
 	help
 	  Common setup code for i2c bus 1.
 
+config S5PC100_SETUP_SDHCI
+        bool
+        select S5PC100_SETUP_SDHCI_GPIO
+        help
+          Internal helper functions for S5PC100 based SDHCI systems
+
+config S5PC100_SETUP_SDHCI_GPIO
+	bool
+	help
+	  Common setup code for SDHCI gpio.
+
 config MACH_SMDKC100
 	bool "SMDKC100"
 	select CPU_S5PC100
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 741fba0..1e3180e 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_CPU_S5PC100)	+= setup-i2c0.o
 obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)	+= setup-fb-24bpp.o
 obj-$(CONFIG_S5PC100_SETUP_I2C1)	+= setup-i2c1.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
+obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
 
 # machine support
 obj-$(CONFIG_MACH_SMDKC100)	+= mach-smdkc100.o
diff --git a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
similarity index 95%
rename from arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c
rename to arch/arm/mach-s5pc100/setup-sdhci-gpio.c
index 185c894..7769c76 100644
--- a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
@@ -1,8 +1,8 @@
-/* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c
+/* linux/arch/arm/plat-s5pc100/setup-sdhci-gpio.c
  *
  * Copyright 2009 Samsung Eletronics
  *
- * S5PC1XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
+ * S5PC100 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index c7bd2bb..ab58758 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -39,9 +39,4 @@ config CPU_S5PC100_CLOCK
 
 # platform specific device setup
 
-config S5PC1XX_SETUP_SDHCI_GPIO
-	bool
-	help
-	  Common setup code for SDHCI gpio.
-
 endif
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile
index 9ce6409..d490543 100644
--- a/arch/arm/plat-s5pc1xx/Makefile
+++ b/arch/arm/plat-s5pc1xx/Makefile
@@ -23,4 +23,3 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK)	+= s5pc100-clock.o
 
 # Device setup
 
-obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
-- 
1.6.4

[PATCH 11/15] ARM: Samsung: move S5PC100 support from plat-s5pc1xx to plat-s5p framework

[Marek Szyprowski]

This patch moves S5PC100 SoC support to plat-s5p framework. Most
periperal support code has been already moved from plat-s5pc1xx to
mach-s5pc100.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/Kconfig                                   |    9 +-
 arch/arm/Makefile                                  |    3 +-
 arch/arm/mach-s5pc100/Kconfig                      |    7 +-
 arch/arm/mach-s5pc100/Makefile                     |    3 +-
 arch/arm/mach-s5pc100/cpu.c                        |   56 ++++---
 arch/arm/mach-s5pc100/gpio.c                       |   24 ++--
 arch/arm/mach-s5pc100/include/mach/debug-macro.S   |    6 +-
 arch/arm/mach-s5pc100/include/mach/entry-macro.S   |    8 +-
 arch/arm/mach-s5pc100/include/mach/irqs.h          |  101 +++++++++++++-
 arch/arm/mach-s5pc100/include/mach/map.h           |  156 +++++---------------
 arch/arm/mach-s5pc100/include/mach/regs-clock.h    |    6 +
 arch/arm/mach-s5pc100/include/mach/regs-gpio.h     |    6 +-
 arch/arm/mach-s5pc100/include/mach/regs-irq.h      |    7 +-
 arch/arm/mach-s5pc100/include/mach/system.h        |    9 +-
 arch/arm/mach-s5pc100/include/mach/tick.h          |    4 +-
 .../s5pc100-init.c => mach-s5pc100/init.c}         |    7 +-
 arch/arm/mach-s5pc100/mach-smdkc100.c              |   11 +-
 arch/arm/plat-s5p/Kconfig                          |    2 +-
 arch/arm/plat-s5p/cpu.c                            |   10 ++
 arch/arm/plat-s5p/include/plat/s5pc100.h           |   33 ++++
 arch/arm/plat-samsung/Kconfig                      |    2 +-
 21 files changed, 267 insertions(+), 203 deletions(-)
 rename arch/arm/{plat-s5pc1xx/s5pc100-init.c => mach-s5pc100/init.c} (68%)
 create mode 100644 arch/arm/plat-s5p/include/plat/s5pc100.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3f8718f..1cb098f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -699,14 +699,14 @@ config ARCH_S5P6442
 	help
 	  Samsung S5P6442 CPU based systems
 
-config ARCH_S5PC1XX
-	bool "Samsung S5PC1XX"
+config ARCH_S5PC100
+	bool "Samsung S5PC100"
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select CPU_V7
 	select ARM_L1_CACHE_SHIFT_6
 	help
-	  Samsung S5PC1XX series based systems
+	  Samsung S5PC100 series based systems
 
 config ARCH_S5PV210
 	bool "Samsung S5PV210/S5PC110"
@@ -890,7 +890,6 @@ source "arch/arm/mach-sa1100/Kconfig"
 source "arch/arm/plat-samsung/Kconfig"
 source "arch/arm/plat-s3c24xx/Kconfig"
 source "arch/arm/plat-s5p/Kconfig"
-source "arch/arm/plat-s5pc1xx/Kconfig"
 
 if ARCH_S3C2410
 source "arch/arm/mach-s3c2400/Kconfig"
@@ -909,9 +908,7 @@ source "arch/arm/mach-s5p6440/Kconfig"
 
 source "arch/arm/mach-s5p6442/Kconfig"
 
-if ARCH_S5PC1XX
 source "arch/arm/mach-s5pc100/Kconfig"
-endif
 
 source "arch/arm/mach-s5pv210/Kconfig"
 
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 9505a70..f7cb6d4 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -167,7 +167,7 @@ machine-$(CONFIG_ARCH_S3C24A0)		:= s3c24a0
 machine-$(CONFIG_ARCH_S3C64XX)		:= s3c64xx
 machine-$(CONFIG_ARCH_S5P6440)		:= s5p6440
 machine-$(CONFIG_ARCH_S5P6442)		:= s5p6442
-machine-$(CONFIG_ARCH_S5PC1XX)		:= s5pc100
+machine-$(CONFIG_ARCH_S5PC100)		:= s5pc100
 machine-$(CONFIG_ARCH_S5PV210)		:= s5pv210
 machine-$(CONFIG_ARCH_SA1100)		:= sa1100
 machine-$(CONFIG_ARCH_SHARK)		:= shark
@@ -192,7 +192,6 @@ plat-$(CONFIG_PLAT_NOMADIK)	:= nomadik
 plat-$(CONFIG_PLAT_ORION)	:= orion
 plat-$(CONFIG_PLAT_PXA)		:= pxa
 plat-$(CONFIG_PLAT_S3C24XX)	:= s3c24xx samsung
-plat-$(CONFIG_PLAT_S5PC1XX)	:= s5pc1xx samsung
 plat-$(CONFIG_PLAT_S5P)		:= s5p samsung
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 176c9a1..a6e21b2 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -5,10 +5,11 @@
 
 # Configuration options for the S5PC100 CPU
 
+if ARCH_S5PC100
+
 config CPU_S5PC100
 	bool
-	select CPU_S5PC100_INIT
-	select CPU_S5PC100_CLOCK
+	select PLAT_S5P
 	help
 	  Enable S5PC100 CPU support
 
@@ -52,3 +53,5 @@ config MACH_SMDKC100
 	select S5PC100_SETUP_SDHCI
 	help
 	  Machine support for the Samsung SMDKC100
+
+endif
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 1e3180e..c51b580 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -11,7 +11,7 @@ obj-				:=
 
 # Core support for S5PC100 system
 
-obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpio.o
+obj-$(CONFIG_CPU_S5PC100)	+= cpu.o init.o clock.o gpio.o
 obj-$(CONFIG_CPU_S5PC100)	+= setup-i2c0.o
 
 # Helper and device support
@@ -22,4 +22,5 @@ obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
 
 # machine support
+
 obj-$(CONFIG_MACH_SMDKC100)	+= mach-smdkc100.o
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c
index d79e757..d424a9f 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/cpu.c
@@ -22,47 +22,53 @@
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 
-#include <asm/proc-fns.h>
-
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <asm/proc-fns.h>
+
 #include <mach/hardware.h>
 #include <mach/map.h>
 #include <asm/irq.h>
 
-#include <plat/cpu-freq.h>
 #include <plat/regs-serial.h>
-#include <plat/regs-power.h>
+#include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
-#include <plat/sdhci.h>
 #include <plat/iic-core.h>
+#include <plat/sdhci.h>
 #include <plat/s5pc100.h>
 
 /* Initial IO mappings */
 
 static struct map_desc s5pc100_iodesc[] __initdata = {
+	{
+		.virtual	= (unsigned long)S5P_VA_SYSTIMER,
+		.pfn		= __phys_to_pfn(S5PC100_PA_SYSTIMER),
+		.length		= SZ_16K,
+		.type		= MT_DEVICE,
+	}, {
+		.virtual	= (unsigned long)VA_VIC2,
+		.pfn		= __phys_to_pfn(S5PC100_PA_VIC2),
+		.length		= SZ_16K,
+		.type		= MT_DEVICE,
+	}, {
+		.virtual	= (unsigned long)S5PC100_VA_OTHERS,
+		.pfn		= __phys_to_pfn(S5PC100_PA_OTHERS),
+		.length		= SZ_4K,
+		.type		= MT_DEVICE,
+	}
 };
 
 static void s5pc100_idle(void)
 {
-	unsigned long tmp;
-
-	tmp = __raw_readl(S5PC100_PWR_CFG);
-	tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE;
-	tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK;
-	tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE;
-	__raw_writel(tmp, S5PC100_PWR_CFG);
+	if (!need_resched())
+		cpu_do_idle();
 
-	tmp = __raw_readl(S5PC100_OTHERS);
-	tmp |= S5PC100_PMU_INT_DISABLE;
-	__raw_writel(tmp, S5PC100_OTHERS);
-
-	cpu_do_idle();
+	local_irq_enable();
 }
 
 /* s5pc100_map_io
@@ -86,22 +92,23 @@ void __init s5pc100_map_io(void)
 
 void __init s5pc100_init_clocks(int xtal)
 {
-	printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
+	printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
 	s3c24xx_register_baseclocks(xtal);
-	s5pc1xx_register_clocks();
+	s5p_register_clocks(xtal);
 	s5pc100_register_clocks();
 	s5pc100_setup_clocks();
 }
 
 void __init s5pc100_init_irq(void)
 {
-	u32 vic_valid[] = {~0, ~0, ~0};
+	u32 vic[] = {~0, ~0, ~0};
 
 	/* VIC0, VIC1, and VIC2 are fully populated. */
-	s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid));
+	s5p_init_irq(vic, ARRAY_SIZE(vic));
 }
 
-struct sysdev_class s5pc100_sysclass = {
+static struct sysdev_class s5pc100_sysclass = {
 	.name	= "s5pc100-core",
 };
 
@@ -118,9 +125,10 @@ core_initcall(s5pc100_core_init);
 
 int __init s5pc100_init(void)
 {
-	printk(KERN_DEBUG "S5PC100: Initialising architecture\n");
+	printk(KERN_INFO "S5PC100: Initializing architecture\n");
 
-	s5pc1xx_idle = s5pc100_idle;
+	/* set idle function */
+	pm_idle = s5pc100_idle;
 
 	return sysdev_register(&s5pc100_sysdev);
 }
diff --git a/arch/arm/mach-s5pc100/gpio.c b/arch/arm/mach-s5pc100/gpio.c
index c8e8336..494a53b 100644
--- a/arch/arm/mach-s5pc100/gpio.c
+++ b/arch/arm/mach-s5pc100/gpio.c
@@ -1,10 +1,10 @@
 /*
- * arch/arm/plat-s5pc1xx/gpiolib.c
+ * arch/arm/plat-s5pc100/gpiolib.c
  *
  *  Copyright 2009 Samsung Electronics Co
  *  Kyungmin Park <kyungmin.park@samsung.com>
  *
- * S5PC1XX - GPIOlib support
+ * S5PC100 - GPIOlib support
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -62,12 +62,12 @@
  */
 
 #if 0
-static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
+static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
 {
 	return S3C_IRQ_GPIO(chip->base + offset);
 }
 
-static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
+static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
 {
 	int base;
 
@@ -382,8 +382,8 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
 };
 
 /* FIXME move from irq-gpio.c */
-extern struct irq_chip s5pc1xx_gpioint;
-extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc);
+extern struct irq_chip s5pc100_gpioint;
+extern void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc);
 
 static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
 {
@@ -392,21 +392,21 @@ static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
 	if (chip->config == &gpio_cfg) {
 		int i, irq;
 
-		chip->chip.to_irq = s5pc1xx_gpiolib_to_irq;
+		chip->chip.to_irq = s5pc100_gpiolib_to_irq;
 
 		for (i = 0;  i < chip->chip.ngpio; i++) {
 			irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i;
-			set_irq_chip(irq, &s5pc1xx_gpioint);
+			set_irq_chip(irq, &s5pc100_gpioint);
 			set_irq_data(irq, &chip->chip);
 			set_irq_handler(irq, handle_level_irq);
 			set_irq_flags(irq, IRQF_VALID);
 		}
 	} else if (chip->config == &gpio_cfg_eint)
-		chip->chip.to_irq = s5pc1xx_gpiolib_to_eint;
+		chip->chip.to_irq = s5pc100_gpiolib_to_eint;
 #endif
 }
 
-static __init int s5pc1xx_gpiolib_init(void)
+static __init int s5pc100_gpiolib_init(void)
 {
 	struct s3c_gpio_chip *chip;
 	int nr_chips;
@@ -421,8 +421,8 @@ static __init int s5pc1xx_gpiolib_init(void)
 				       ARRAY_SIZE(s5pc100_gpio_chips));
 #if 0
 	/* Interrupt */
-	set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler);
+	set_irq_chained_handler(IRQ_GPIOINT, s5pc100_irq_gpioint_handler);
 #endif
 	return 0;
 }
-core_initcall(s5pc1xx_gpiolib_init);
+core_initcall(s5pc100_gpiolib_init);
diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
index e181f57..70e02e9 100644
--- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
@@ -22,12 +22,14 @@
 	 * aligned and add in the offset when we load the value here.
 	 */
 
-	.macro addruart, rx, tmp
+	.macro addruart, rx, rtmp
 		mrc	p15, 0, \rx, c1, c0
 		tst	\rx, #1
 		ldreq	\rx, = S3C_PA_UART
-		ldrne	\rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
+		ldrne	\rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
 		add	\rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
 	.endm
 
 /* include the reset of the code which will do the work, we're only
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index 6713193..ba76af0 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -20,7 +20,7 @@
 	.endm
 
 	.macro	get_irqnr_preamble, base, tmp
-	ldr	\base, =S3C_VA_VIC0
+	ldr	\base, =VA_VIC0
 	.endm
 
 	.macro	arch_ret_to_user, tmp1, tmp2
@@ -29,18 +29,18 @@
 	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
 
 	@ check the vic0
-	mov	\irqnr, # S3C_IRQ_OFFSET + 31
+	mov	\irqnr, # S5P_IRQ_OFFSET + 31
 	ldr	\irqstat, [ \base, # VIC_IRQ_STATUS ]
 	teq	\irqstat, #0
 
 	@ otherwise try vic1
-	addeq	\tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0)
+	addeq	\tmp, \base, #(VA_VIC1 - VA_VIC0)
 	addeq	\irqnr, \irqnr, #32
 	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
 	teqeq	\irqstat, #0
 
 	@ otherwise try vic2
-	addeq	\tmp, \base, #(S3C_VA_VIC2 - S3C_VA_VIC0)
+	addeq	\tmp, \base, #(VA_VIC2 - VA_VIC0)
 	addeq	\irqnr, \irqnr, #32
 	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
 	teqeq	\irqstat, #0
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index b53fa48..84c74ac 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -11,9 +11,106 @@
 
 #include <plat/irqs.h>
 
-/* LCD */
+/* VIC0: system, DMA, timer */
+#define IRQ_EINT16_31		S5P_IRQ_VIC0(16)
+#define IRQ_BATF		S5P_IRQ_VIC0(17)
+#define IRQ_MDMA		S5P_IRQ_VIC0(18)
+#define IRQ_PDMA0		S5P_IRQ_VIC0(19)
+#define IRQ_PDMA1		S5P_IRQ_VIC0(20)
+#define IRQ_TIMER0_VIC		S5P_IRQ_VIC0(21)
+#define IRQ_TIMER1_VIC		S5P_IRQ_VIC0(22)
+#define IRQ_TIMER2_VIC		S5P_IRQ_VIC0(23)
+#define IRQ_TIMER3_VIC		S5P_IRQ_VIC0(24)
+#define IRQ_TIMER4_VIC		S5P_IRQ_VIC0(25)
+#define IRQ_SYSTIMER		S5P_IRQ_VIC0(26)
+#define IRQ_WDT			S5P_IRQ_VIC0(27)
+#define IRQ_RTC_ALARM		S5P_IRQ_VIC0(28)
+#define IRQ_RTC_TIC		S5P_IRQ_VIC0(29)
+#define IRQ_GPIOINT		S5P_IRQ_VIC0(30)
+
+/* VIC1: ARM, power, memory, connectivity */
+#define IRQ_CORTEX0		S5P_IRQ_VIC1(0)
+#define IRQ_CORTEX1		S5P_IRQ_VIC1(1)
+#define IRQ_CORTEX2		S5P_IRQ_VIC1(2)
+#define IRQ_CORTEX3		S5P_IRQ_VIC1(3)
+#define IRQ_CORTEX4		S5P_IRQ_VIC1(4)
+#define IRQ_IEMAPC		S5P_IRQ_VIC1(5)
+#define IRQ_IEMIEC		S5P_IRQ_VIC1(6)
+#define IRQ_ONENAND		S5P_IRQ_VIC1(7)
+#define IRQ_NFC			S5P_IRQ_VIC1(8)
+#define IRQ_CFC			S5P_IRQ_VIC1(9)
+#define IRQ_UART0		S5P_IRQ_VIC1(10)
+#define IRQ_UART1		S5P_IRQ_VIC1(11)
+#define IRQ_UART2		S5P_IRQ_VIC1(12)
+#define IRQ_UART3		S5P_IRQ_VIC1(13)
+#define IRQ_IIC			S5P_IRQ_VIC1(14)
+#define IRQ_SPI0		S5P_IRQ_VIC1(15)
+#define IRQ_SPI1		S5P_IRQ_VIC1(16)
+#define IRQ_SPI2		S5P_IRQ_VIC1(17)
+#define IRQ_IRDA		S5P_IRQ_VIC1(18)
+#define IRQ_CAN0		S5P_IRQ_VIC1(19)
+#define IRQ_CAN1		S5P_IRQ_VIC1(20)
+#define IRQ_HSIRX		S5P_IRQ_VIC1(21)
+#define IRQ_HSITX		S5P_IRQ_VIC1(22)
+#define IRQ_UHOST		S5P_IRQ_VIC1(23)
+#define IRQ_OTG			S5P_IRQ_VIC1(24)
+#define IRQ_MSM			S5P_IRQ_VIC1(25)
+#define IRQ_HSMMC0		S5P_IRQ_VIC1(26)
+#define IRQ_HSMMC1		S5P_IRQ_VIC1(27)
+#define IRQ_HSMMC2		S5P_IRQ_VIC1(28)
+#define IRQ_MIPICSI		S5P_IRQ_VIC1(29)
+#define IRQ_MIPIDSI		S5P_IRQ_VIC1(30)
+
+/* VIC2: multimedia, audio, security */
+#define IRQ_LCD0		S5P_IRQ_VIC2(0)
+#define IRQ_LCD1		S5P_IRQ_VIC2(1)
+#define IRQ_LCD2		S5P_IRQ_VIC2(2)
+#define IRQ_LCD3		S5P_IRQ_VIC2(3)
+#define IRQ_ROTATOR		S5P_IRQ_VIC2(4)
+#define IRQ_FIMC0		S5P_IRQ_VIC2(5)
+#define IRQ_FIMC1		S5P_IRQ_VIC2(6)
+#define IRQ_FIMC2		S5P_IRQ_VIC2(7)
+#define IRQ_JPEG		S5P_IRQ_VIC2(8)
+#define IRQ_2D			S5P_IRQ_VIC2(9)
+#define IRQ_3D			S5P_IRQ_VIC2(10)
+#define IRQ_MIXER		S5P_IRQ_VIC2(11)
+#define IRQ_HDMI		S5P_IRQ_VIC2(12)
+#define IRQ_IIC1		S5P_IRQ_VIC2(13)
+#define IRQ_MFC			S5P_IRQ_VIC2(14)
+#define IRQ_TVENC		S5P_IRQ_VIC2(15)
+#define IRQ_I2S0		S5P_IRQ_VIC2(16)
+#define IRQ_I2S1		S5P_IRQ_VIC2(17)
+#define IRQ_I2S2		S5P_IRQ_VIC2(18)
+#define IRQ_AC97		S5P_IRQ_VIC2(19)
+#define IRQ_PCM0		S5P_IRQ_VIC2(20)
+#define IRQ_PCM1		S5P_IRQ_VIC2(21)
+#define IRQ_SPDIF		S5P_IRQ_VIC2(22)
+#define IRQ_ADC			S5P_IRQ_VIC2(23)
+#define IRQ_PENDN		S5P_IRQ_VIC2(24)
+#define IRQ_TC			IRQ_PENDN
+#define IRQ_KEYPAD		S5P_IRQ_VIC2(25)
+#define IRQ_CG			S5P_IRQ_VIC2(26)
+#define IRQ_SEC			S5P_IRQ_VIC2(27)
+#define IRQ_SECRX		S5P_IRQ_VIC2(28)
+#define IRQ_SECTX		S5P_IRQ_VIC2(29)
+#define IRQ_SDMIRQ		S5P_IRQ_VIC2(30)
+#define IRQ_SDMFIQ		S5P_IRQ_VIC2(31)
+#define IRQ_VIC_END		S5P_IRQ_VIC2(31)
+
+#define S5P_IRQ_EINT_BASE	(IRQ_VIC_END + 1)
+
+#define IRQ_EINT(x)             ((x) < 16 ? S5P_IRQ_VIC0(x) : \
+					(S5P_IRQ_EINT_BASE + (x)-16))
+
+#define S3C_IRQ_GPIO_BASE	(IRQ_EINT(31) + 1)
+#define S3C_IRQ_GPIO(x)		(S3C_IRQ_GPIO_BASE + (x))
+
+/* Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs */
+#define NR_IRQS		(S3C_IRQ_GPIO(320) + 1)
+
+/* Compatibility */
 #define IRQ_LCD_FIFO		IRQ_LCD0
 #define IRQ_LCD_VSYNC		IRQ_LCD1
 #define IRQ_LCD_SYSTEM		IRQ_LCD2
 
-#endif /* __ASM_ARCH_IRQ_H */
+#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 4681ebe..6428f48 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -3,9 +3,7 @@
  * Copyright 2009 Samsung Electronics Co.
  *	Byungho Min <bhmin@samsung.com>
  *
- * Based on mach-s3c6400/include/mach/map.h
- *
- * S5PC1XX - Memory map definitions
+ * S5PC100 - Memory map definitions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -16,135 +14,59 @@
 #define __ASM_ARCH_MAP_H __FILE__
 
 #include <plat/map-base.h>
+#include <plat/map-s5p.h>
 
-/*
- * map-base.h has already defined virtual memory address
- * S3C_VA_IRQ		S3C_ADDR(0x00000000)	irq controller(s)
- * S3C_VA_SYS		S3C_ADDR(0x00100000)	system control
- * S3C_VA_MEM		S3C_ADDR(0x00200000)	system control (not used)
- * S3C_VA_TIMER		S3C_ADDR(0x00300000)	timer block
- * S3C_VA_WATCHDOG	S3C_ADDR(0x00400000)	watchdog
- * S3C_VA_UART		S3C_ADDR(0x01000000)	UART
- *
- * S5PC100 specific virtual memory address can be defined here
- * S5PC1XX_VA_GPIO	S3C_ADDR(0x00500000)	GPIO
- *
- */
-
-/* Chip ID */
 #define S5PC100_PA_CHIPID	(0xE0000000)
-#define S5PC1XX_PA_CHIPID	S5PC100_PA_CHIPID
-#define S5PC1XX_VA_CHIPID	S3C_VA_SYS
-
-/* System */
-#define S5PC100_PA_CLK		(0xE0100000)
-#define S5PC100_PA_CLK_OTHER	(0xE0200000)
-#define S5PC100_PA_PWR		(0xE0108000)
-#define S5PC1XX_PA_CLK		S5PC100_PA_CLK
-#define S5PC1XX_PA_PWR		S5PC100_PA_PWR
-#define S5PC1XX_PA_CLK_OTHER	S5PC100_PA_CLK_OTHER
-#define S5PC1XX_VA_CLK		(S3C_VA_SYS + 0x10000)
-#define S5PC1XX_VA_PWR		(S3C_VA_SYS + 0x20000)
-#define S5PC1XX_VA_CLK_OTHER	(S3C_VA_SYS + 0x30000)
-
-/* GPIO */
+#define S5P_PA_CHIPID		S5PC100_PA_CHIPID
+
+#define S5PC100_PA_SYSCON	(0xE0100000)
+#define S5P_PA_SYSCON		S5PC100_PA_SYSCON
+
+#define S5PC100_PA_OTHERS	(0xE0200000)
+#define S5PC100_VA_OTHERS	(S3C_VA_SYS + 0x10000)
+
 #define S5PC100_PA_GPIO		(0xE0300000)
-#define S5PC1XX_PA_GPIO		S5PC100_PA_GPIO
-#define S5PC1XX_VA_GPIO		S3C_ADDR(0x00500000)
-
-/* Interrupt */
-#define S5PC100_PA_VIC		(0xE4000000)
-#define S5PC100_VA_VIC		S3C_VA_IRQ
-#define S5PC100_PA_VIC_OFFSET	0x100000
-#define S5PC100_VA_VIC_OFFSET	0x10000
-#define S5PC1XX_PA_VIC(x)	(S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
-#define S5PC1XX_VA_VIC(x)	(S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
-
-/* DMA */
-#define S5PC100_PA_MDMA		(0xE8100000)
-#define S5PC100_PA_PDMA0	(0xE9000000)
-#define S5PC100_PA_PDMA1	(0xE9200000)
-
-/* Timer */
-#define S5PC100_PA_TIMER	(0xEA000000)
-#define S5PC1XX_PA_TIMER	S5PC100_PA_TIMER
-#define S5PC1XX_VA_TIMER	S3C_VA_TIMER
+#define S5P_PA_GPIO		S5PC100_PA_GPIO
 
-/* RTC */
-#define S5PC100_PA_RTC		(0xEA300000)
+#define S5PC100_PA_VIC0		(0xE4000000)
+#define S5P_PA_VIC0		S5PC100_PA_VIC0
 
-/* UART */
-#define S5PC100_PA_UART		(0xEC000000)
-#define S5PC1XX_PA_UART		S5PC100_PA_UART
-#define S5PC1XX_VA_UART		S3C_VA_UART
+#define S5PC100_PA_VIC1		(0xE4100000)
+#define S5P_PA_VIC1		S5PC100_PA_VIC1
 
-/* I2C */
-#define S5PC100_PA_I2C		(0xEC100000)
-#define S5PC100_PA_I2C1		(0xEC200000)
+#define S5PC100_PA_VIC2		(0xE4200000)
+#define S5P_PA_VIC2		S5PC100_PA_VIC2
 
-/* USB HS OTG */
-#define S5PC100_PA_USB_HSOTG	(0xED200000)
-#define S5PC100_PA_USB_HSPHY	(0xED300000)
+#define S5PC100_PA_TIMER	(0xEA000000)
+#define S5P_PA_TIMER		S5PC100_PA_TIMER
 
-/* SD/MMC */
-#define S5PC100_PA_HSMMC(x)	(0xED800000 + ((x) * 0x100000))
-#define S5PC100_PA_HSMMC0	S5PC100_PA_HSMMC(0)
-#define S5PC100_PA_HSMMC1	S5PC100_PA_HSMMC(1)
-#define S5PC100_PA_HSMMC2	S5PC100_PA_HSMMC(2)
+#define S5PC100_PA_SYSTIMER	(0xEA100000)
 
-/* LCD */
-#define S5PC100_PA_FB		(0xEE000000)
+#define S5PC100_PA_UART		(0xEC000000)
 
-/* Multimedia */
-#define S5PC100_PA_G2D		(0xEE800000)
-#define S5PC100_PA_JPEG		(0xEE500000)
-#define S5PC100_PA_ROTATOR	(0xEE100000)
-#define S5PC100_PA_G3D		(0xEF000000)
+#define S5P_PA_UART0		(S5PC100_PA_UART + 0x0)
+#define S5P_PA_UART1		(S5PC100_PA_UART + 0x400)
+#define S5P_PA_UART2		(S5PC100_PA_UART + 0x800)
+#define S5P_PA_UART3		(S5PC100_PA_UART + 0xC00)
+#define S5P_SZ_UART		SZ_256
 
-/* I2S */
-#define S5PC100_PA_I2S0		(0xF2000000)
-#define S5PC100_PA_I2S1		(0xF2100000)
-#define S5PC100_PA_I2S2		(0xF2200000)
+#define S5PC100_PA_IIC0		(0xEC100000)
+#define S5PC100_PA_IIC1		(0xEC200000)
 
-/* KEYPAD */
-#define S5PC100_PA_KEYPAD	(0xF3100000)
+#define S5PC100_PA_FB		(0xEE000000)
 
-/* ADC & TouchScreen */
-#define S5PC100_PA_TSADC	(0xF3000000)
+#define S5PC100_PA_HSMMC(x)	(0xED800000 + ((x) * 0x100000))
 
-/* ETC */
 #define S5PC100_PA_SDRAM	(0x20000000)
-#define S5PC1XX_PA_SDRAM	S5PC100_PA_SDRAM
+#define S5P_PA_SDRAM		S5PC100_PA_SDRAM
 
-/* compatibility defines. */
-#define S3C_PA_RTC		S5PC100_PA_RTC
+/* compatibiltiy defines. */
 #define S3C_PA_UART		S5PC100_PA_UART
-#define S3C_PA_UART0		(S5PC100_PA_UART + 0x0)
-#define S3C_PA_UART1		(S5PC100_PA_UART + 0x400)
-#define S3C_PA_UART2		(S5PC100_PA_UART + 0x800)
-#define S3C_PA_UART3		(S5PC100_PA_UART + 0xC00)
-#define S3C_VA_UART0		(S3C_VA_UART + 0x0)
-#define S3C_VA_UART1		(S3C_VA_UART + 0x400)
-#define S3C_VA_UART2		(S3C_VA_UART + 0x800)
-#define S3C_VA_UART3		(S3C_VA_UART + 0xC00)
-#define S3C_UART_OFFSET		0x400
-#define S3C_VA_UARTx(x)		(S3C_VA_UART + ((x) * S3C_UART_OFFSET))
+#define S3C_PA_IIC		S5PC100_PA_IIC0
+#define S3C_PA_IIC1		S5PC100_PA_IIC1
 #define S3C_PA_FB		S5PC100_PA_FB
-#define S3C_PA_G2D		S5PC100_PA_G2D
-#define S3C_PA_G3D		S5PC100_PA_G3D
-#define S3C_PA_JPEG		S5PC100_PA_JPEG
-#define S3C_PA_ROTATOR		S5PC100_PA_ROTATOR
-#define S3C_VA_VIC0		(S3C_VA_IRQ + 0x0)
-#define S3C_VA_VIC1		(S3C_VA_IRQ + 0x10000)
-#define S3C_VA_VIC2		(S3C_VA_IRQ + 0x20000)
-#define S3C_PA_IIC		S5PC100_PA_I2C
-#define S3C_PA_IIC1		S5PC100_PA_I2C1
-#define S3C_PA_USB_HSOTG	S5PC100_PA_USB_HSOTG
-#define S3C_PA_USB_HSPHY	S5PC100_PA_USB_HSPHY
-#define S3C_PA_HSMMC0		S5PC100_PA_HSMMC0
-#define S3C_PA_HSMMC1		S5PC100_PA_HSMMC1
-#define S3C_PA_HSMMC2		S5PC100_PA_HSMMC2
-#define S3C_PA_KEYPAD		S5PC100_PA_KEYPAD
-#define S3C_PA_TSADC		S5PC100_PA_TSADC
-
-#endif /* __ASM_ARCH_C100_MAP_H */
+#define S3C_PA_HSMMC0		S5PC100_PA_HSMMC(0)
+#define S3C_PA_HSMMC1		S5PC100_PA_HSMMC(1)
+#define S3C_PA_HSMMC2		S5PC100_PA_HSMMC(2)
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
index f2283bd..5d27d28 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
@@ -17,6 +17,8 @@
 
 #define S5P_CLKREG(x)		(S3C_VA_SYS + (x))
 
+#define S5PC100_REG_OTHERS(x)	(S5PC100_VA_OTHERS + (x))
+
 #define S5P_APLL_LOCK		S5P_CLKREG(0x00)
 #define S5P_MPLL_LOCK		S5P_CLKREG(0x04)
 #define S5P_EPLL_LOCK		S5P_CLKREG(0x08)
@@ -68,4 +70,8 @@
 #define S5P_CLKDIV1_PCLKD1_MASK		(0x7<<16)
 #define S5P_CLKDIV1_PCLKD1_SHIFT	(16)
 
+#define S5PC100_SWRESET		S5PC100_REG_OTHERS(0x000)
+
+#define S5PC100_SWRESET_RESETVAL	0xc100
+
 #endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
index 6866691..cd6200a 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h
+/* linux/arch/arm/plat-s5pc100/include/plat/regs-gpio.h
  *
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
@@ -12,7 +12,7 @@
 #include <mach/map.h>
 
 /* S5PC100 */
-#define S5PC100_GPIO_BASE	S5PC1XX_VA_GPIO
+#define S5PC100_GPIO_BASE	S5P_VA_GPIO
 #define S5PC100_GPA0_BASE	(S5PC100_GPIO_BASE + 0x0000)
 #define S5PC100_GPA1_BASE	(S5PC100_GPIO_BASE + 0x0020)
 #define S5PC100_GPB_BASE	(S5PC100_GPIO_BASE + 0x0040)
@@ -60,7 +60,7 @@
 
 /* Common part */
 /* External interrupt base is same at both s5pc100 and s5pc110 */
-#define S5PC1XX_EINT_BASE	(S5PC100_EINT_BASE)
+#define S5P_EINT_BASE			(S5PC100_EINT_BASE)
 
 #define S5PC100_GPx_INPUT(__gpio)	(0x0 << ((__gpio) * 4))
 #define S5PC100_GPx_OUTPUT(__gpio)	(0x1 << ((__gpio) * 4))
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
index 751ac15..4d9036d 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
@@ -3,7 +3,7 @@
  * Copyright 2009 Samsung Electronics Co.
  *	Byungho Min <bhmin@samsung.com>
  *
- * S5PC1XX - IRQ register definitions
+ * S5PC100 - IRQ register definitions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -16,9 +16,4 @@
 #include <mach/map.h>
 #include <asm/hardware/vic.h>
 
-/* interrupt controller */
-#define S5PC1XX_VIC0REG(x)          		((x) + S5PC1XX_VA_VIC(0))
-#define S5PC1XX_VIC1REG(x)          		((x) + S5PC1XX_VA_VIC(1))
-#define S5PC1XX_VIC2REG(x)         		((x) + S5PC1XX_VA_VIC(2))
-
 #endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index f0d31a2..681f626 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -3,7 +3,7 @@
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
- * S5PC1XX - system implementation
+ * S5PC100 - system implementation
  *
  * Based on mach-s3c6400/include/mach/system.h
  */
@@ -13,14 +13,11 @@
 
 #include <linux/io.h>
 #include <mach/map.h>
-#include <plat/regs-clock.h>
-
-void (*s5pc1xx_idle)(void);
+#include <mach/regs-clock.h>
 
 static void arch_idle(void)
 {
-	if (s5pc1xx_idle)
-		s5pc1xx_idle();
+	/* nothing here yet */
 }
 
 static void arch_reset(char mode, const char *cmd)
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h
index f338c9e..20f6873 100644
--- a/arch/arm/mach-s5pc100/include/mach/tick.h
+++ b/arch/arm/mach-s5pc100/include/mach/tick.h
@@ -20,8 +20,8 @@
  */
 static inline u32 s3c24xx_ostimer_pending(void)
 {
-	u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
-	return pend & 1 << (IRQ_TIMER4_VIC - S5PC1XX_IRQ_VIC0(0));
+	u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
+	return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
 }
 
 #define TICK_MAX	(0xffffffff)
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-init.c b/arch/arm/mach-s5pc100/init.c
similarity index 68%
rename from arch/arm/plat-s5pc1xx/s5pc100-init.c
rename to arch/arm/mach-s5pc100/init.c
index c587108..19d7b52 100644
--- a/arch/arm/plat-s5pc1xx/s5pc100-init.c
+++ b/arch/arm/mach-s5pc100/init.c
@@ -1,9 +1,8 @@
-/* linux/arch/arm/plat-s5pc1xx/s5pc100-init.c
+/* linux/arch/arm/plat-s5pc100/s5pc100-init.c
  *
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
- * S5PC100 - CPU initialisation (common with other S5PC1XX chips)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -19,9 +18,7 @@
 #include <plat/s5pc100.h>
 
 /* uart registration process */
-
 void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
-	/* The driver name is s3c6400-uart to reuse s3c6400_serial_drv  */
-	s3c24xx_init_uartdevs("s3c6400-uart", s5pc1xx_uart_resources, cfg, no);
+	s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
 }
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index bfe67db..9155564 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -140,8 +140,6 @@ static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = {
 	.setup_gpio	= s5pc100_fb_gpio_setup_24bpp,
 };
 
-static struct map_desc smdkc100_iodesc[] = {};
-
 static struct platform_device *smdkc100_devices[] __initdata = {
 	&s3c_device_i2c0,
 	&s3c_device_i2c1,
@@ -154,7 +152,7 @@ static struct platform_device *smdkc100_devices[] __initdata = {
 
 static void __init smdkc100_map_io(void)
 {
-	s5pc1xx_init_io(smdkc100_iodesc, ARRAY_SIZE(smdkc100_iodesc));
+	s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 	s3c24xx_init_clocks(12000000);
 	s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs));
 }
@@ -178,10 +176,9 @@ static void __init smdkc100_machine_init(void)
 
 MACHINE_START(SMDKC100, "SMDKC100")
 	/* Maintainer: Byungho Min <bhmin@samsung.com> */
-	.phys_io	= S5PC100_PA_UART & 0xfff00000,
-	.io_pg_offst	= (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc,
-	.boot_params	= S5PC100_PA_SDRAM + 0x100,
-
+	.phys_io	= S3C_PA_UART & 0xfff00000,
+	.io_pg_offst	= (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+	.boot_params	= S5P_PA_SDRAM + 0x100,
 	.init_irq	= s5pc100_init_irq,
 	.map_io		= smdkc100_map_io,
 	.init_machine	= smdkc100_machine_init,
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 92bd756..189be6e 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,7 +7,7 @@
 
 config PLAT_S5P
 	bool
-	depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210)
+	depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210)
 	default y
 	select ARM_VIC
 	select NO_IOPORT
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index f92e5de..75cb8c3 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -19,12 +19,14 @@
 #include <plat/cpu.h>
 #include <plat/s5p6440.h>
 #include <plat/s5p6442.h>
+#include <plat/s5pc100.h>
 #include <plat/s5pv210.h>
 
 /* table of supported CPUs */
 
 static const char name_s5p6440[] = "S5P6440";
 static const char name_s5p6442[] = "S5P6442";
+static const char name_s5pc100[] = "S5PC100";
 static const char name_s5pv210[] = "S5PV210/S5PC110";
 
 static struct cpu_table cpu_ids[] __initdata = {
@@ -45,6 +47,14 @@ static struct cpu_table cpu_ids[] __initdata = {
 		.init		= s5p6442_init,
 		.name		= name_s5p6442,
 	}, {
+		.idcode		= 0x43100000,
+		.idmask		= 0xfffff000,
+		.map_io		= s5pc100_map_io,
+		.init_clocks	= s5pc100_init_clocks,
+		.init_uarts	= s5pc100_init_uarts,
+		.init		= s5pc100_init,
+		.name		= name_s5pc100,
+	}, {
 		.idcode		= 0x43110000,
 		.idmask		= 0xfffff000,
 		.map_io		= s5pv210_map_io,
diff --git a/arch/arm/plat-s5p/include/plat/s5pc100.h b/arch/arm/plat-s5p/include/plat/s5pc100.h
new file mode 100644
index 0000000..5f6099d
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5pc100.h
@@ -0,0 +1,33 @@
+/* arch/arm/plat-s5p/include/plat/s5pc100.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com/
+ *
+ * Header file for s5pc100 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S5PC100 related SoCs */
+
+extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s5pc100_register_clocks(void);
+extern void s5pc100_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5PC100
+
+extern  int s5pc100_init(void);
+extern void s5pc100_init_irq(void);
+extern void s5pc100_map_io(void);
+extern void s5pc100_init_clocks(int xtal);
+
+#define s5pc100_init_uarts s5pc100_common_init_uarts
+
+#else
+#define s5pc100_init_clocks NULL
+#define s5pc100_init_uarts NULL
+#define s5pc100_map_io NULL
+#define s5pc100_init NULL
+#endif
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 6ccfd60..2b1b938 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -6,7 +6,7 @@
 
 config PLAT_SAMSUNG
 	bool
-	depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX
+	depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
 	select NO_IOPORT
 	default y
 	help
-- 
1.6.4

[PATCH 12/15] ARM: SMDKC100: fix frame buffer definitions

[Marek Szyprowski]

Fix incorrectly defined pixel clock value for the default framebuffer
window.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pc100/mach-smdkc100.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 9155564..7df8ed0 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -118,8 +118,7 @@ static struct platform_device smdkc100_lcd_powerdev = {
 static struct s3c_fb_pd_win smdkc100_fb_win0 = {
 	/* this is to ensure we use win0 */
 	.win_mode	= {
-		.refresh	= 70,
-		.pixclock	= (8+13+3+800)*(7+5+1+480),
+		.pixclock = 1000000000000ULL / ((8+13+3+800)*(7+5+1+480)*80),
 		.left_margin	= 8,
 		.right_margin	= 13,
 		.upper_margin	= 7,
-- 
1.6.4

[PATCH 13/15] ARM: Samsung: Move external interrupts support from plat-s5pc1xx to plat-s5p

[Marek Szyprowski]

This patch moves external interrupts support code from plat-s5pc1xx to
plat-s5p and enables support for it on ARCH_S5PC100. This code can be easily
reused by S5PV210/S5PC110 and probably S5P6442.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pc100/Kconfig                  |    1 +
 arch/arm/mach-s5pc100/gpio.c                   |    8 ++--
 arch/arm/mach-s5pc100/include/mach/gpio.h      |    8 +++
 arch/arm/plat-s5p/Kconfig                      |    5 ++
 arch/arm/plat-s5p/Makefile                     |    1 +
 arch/arm/plat-s5p/include/plat/gpio-ext.h      |   44 ++++++++++++++++++
 arch/arm/{plat-s5pc1xx => plat-s5p}/irq-eint.c |   57 ++++++++++++------------
 arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h  |   44 ------------------
 8 files changed, 92 insertions(+), 76 deletions(-)
 create mode 100644 arch/arm/plat-s5p/include/plat/gpio-ext.h
 rename arch/arm/{plat-s5pc1xx => plat-s5p}/irq-eint.c (80%)
 delete mode 100644 arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h

diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index a6e21b2..86fe699 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -10,6 +10,7 @@ if ARCH_S5PC100
 config CPU_S5PC100
 	bool
 	select PLAT_S5P
+	select S5P_IRQ_EINT
 	help
 	  Enable S5PC100 CPU support
 
diff --git a/arch/arm/mach-s5pc100/gpio.c b/arch/arm/mach-s5pc100/gpio.c
index 494a53b..df539f6 100644
--- a/arch/arm/mach-s5pc100/gpio.c
+++ b/arch/arm/mach-s5pc100/gpio.c
@@ -61,7 +61,6 @@
  * L3	8	4Bit	None
  */
 
-#if 0
 static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
 {
 	return S3C_IRQ_GPIO(chip->base + offset);
@@ -85,7 +84,7 @@ static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
 		return IRQ_EINT(24 + offset);
 	return -EINVAL;
 }
-#endif
+
 static struct s3c_gpio_cfg gpio_cfg = {
 	.set_config	= s3c_gpio_setcfg_s3c64xx_4bit,
 	.set_pull	= s3c_gpio_setpull_updown,
@@ -401,9 +400,10 @@ static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
 			set_irq_handler(irq, handle_level_irq);
 			set_irq_flags(irq, IRQF_VALID);
 		}
-	} else if (chip->config == &gpio_cfg_eint)
-		chip->chip.to_irq = s5pc100_gpiolib_to_eint;
+	} else
 #endif
+	if (chip->config == &gpio_cfg_eint)
+		chip->chip.to_irq = s5pc100_gpiolib_to_eint;
 }
 
 static __init int s5pc100_gpiolib_init(void)
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h
index fb2f40a..057c47a 100644
--- a/arch/arm/mach-s5pc100/include/mach/gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/gpio.h
@@ -159,4 +159,12 @@ enum s3c_gpio_number {
 /* define the number of gpios we need to the one after the MP04() range */
 #define ARCH_NR_GPIOS		(S5PC100_GPIO_END + 1)
 
+/* Common compatibility defines */
+#define S5P_GPIO_EINT_SFN	S3C_GPIO_SFN(0x2)
+#define S5P_GPH0(n)		S5PC100_GPH0(n)
+#define S5P_GPH1(n)		S5PC100_GPH1(n)
+#define S5P_GPH2(n)		S5PC100_GPH2(n)
+#define S5P_GPH3(n)		S5PC100_GPH3(n)
+#define S5P_GPIO_INT_GROUP_END	S5PC100_GPIO_INT_GROUP_END
+
 #include <asm-generic/gpio.h>
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 189be6e..09d06a2 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -24,3 +24,8 @@ config PLAT_S5P
 	select SAMSUNG_IRQ_UART
 	help
 	  Base platform code for Samsung's S5P series SoC.
+
+config S5P_IRQ_EINT
+	bool
+	help
+	  Common initialisation code for the EINT support on S5P platform
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 0ec09a9..db4801f 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -16,3 +16,4 @@ obj-y				+= dev-uart.o
 obj-y				+= cpu.o
 obj-y				+= clock.o
 obj-y				+= irq.o
+obj-$(CONFIG_S5P_IRQ_EINT)	+= irq-eint.o
diff --git a/arch/arm/plat-s5p/include/plat/gpio-ext.h b/arch/arm/plat-s5p/include/plat/gpio-ext.h
new file mode 100644
index 0000000..b298335
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/gpio-ext.h
@@ -0,0 +1,44 @@
+/* linux/arch/arm/plat-s5p/include/plat/gpio-eint.h
+ *
+ * Copyright 2009 Samsung Electronics Co.
+ *
+ * External Interrupt (GPH0 ~ GPH3) control register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define S5P_WKUP_INT_CON0_7		(S5P_EINT_BASE + 0x0)
+#define S5P_WKUP_INT_CON8_15		(S5P_EINT_BASE + 0x4)
+#define S5P_WKUP_INT_CON16_23		(S5P_EINT_BASE + 0x8)
+#define S5P_WKUP_INT_CON24_31		(S5P_EINT_BASE + 0xC)
+#define S5P_WKUP_INT_CON(x)		(S5P_WKUP_INT_CON0_7 + (x * 0x4))
+
+#define S5P_WKUP_INT_FLTCON0_3		(S5P_EINT_BASE + 0x80)
+#define S5P_WKUP_INT_FLTCON4_7		(S5P_EINT_BASE + 0x84)
+#define S5P_WKUP_INT_FLTCON8_11		(S5P_EINT_BASE + 0x88)
+#define S5P_WKUP_INT_FLTCON12_15	(S5P_EINT_BASE + 0x8C)
+#define S5P_WKUP_INT_FLTCON16_19	(S5P_EINT_BASE + 0x90)
+#define S5P_WKUP_INT_FLTCON20_23	(S5P_EINT_BASE + 0x94)
+#define S5P_WKUP_INT_FLTCON24_27	(S5P_EINT_BASE + 0x98)
+#define S5P_WKUP_INT_FLTCON28_31	(S5P_EINT_BASE + 0x9C)
+#define S5P_WKUP_INT_FLTCON(x)		(S5P_WKUP_INT_FLTCON0_3 + (x * 0x4))
+
+#define S5P_WKUP_INT_MASK0_7		(S5P_EINT_BASE + 0x100)
+#define S5P_WKUP_INT_MASK8_15		(S5P_EINT_BASE + 0x104)
+#define S5P_WKUP_INT_MASK16_23		(S5P_EINT_BASE + 0x108)
+#define S5P_WKUP_INT_MASK24_31		(S5P_EINT_BASE + 0x10C)
+#define S5P_WKUP_INT_MASK(x)		(S5P_WKUP_INT_MASK0_7 + (x * 0x4))
+
+#define S5P_WKUP_INT_PEND0_7		(S5P_EINT_BASE + 0x140)
+#define S5P_WKUP_INT_PEND8_15		(S5P_EINT_BASE + 0x144)
+#define S5P_WKUP_INT_PEND16_23		(S5P_EINT_BASE + 0x148)
+#define S5P_WKUP_INT_PEND24_31		(S5P_EINT_BASE + 0x14C)
+#define S5P_WKUP_INT_PEND(x)		(S5P_WKUP_INT_PEND0_7 + (x * 0x4))
+
+#define S5P_WKUP_INT_LOWLEV		(0x00)
+#define S5P_WKUP_INT_HILEV		(0x01)
+#define S5P_WKUP_INT_FALLEDGE		(0x02)
+#define S5P_WKUP_INT_RISEEDGE		(0x03)
+#define S5P_WKUP_INT_BOTHEDGE		(0x04)
diff --git a/arch/arm/plat-s5pc1xx/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
similarity index 80%
rename from arch/arm/plat-s5pc1xx/irq-eint.c
rename to arch/arm/plat-s5p/irq-eint.c
index 373122f..f43aa47 100644
--- a/arch/arm/plat-s5pc1xx/irq-eint.c
+++ b/arch/arm/plat-s5p/irq-eint.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/plat-s5pc1xx/irq-eint.c
+ * linux/arch/arm/plat-s5p/irq-eint.c
  *
  *  Copyright 2009 Samsung Electronics Co.
  *  Byungho Min <bhmin@samsung.com>
@@ -7,7 +7,7 @@
  *
  * Based on plat-s3c64xx/irq-eint.c
  *
- * S5PC1XX - Interrupt handling for IRQ_EINT(x)
+ * S5P - Interrupt handling for IRQ_EINT(x)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -25,11 +25,12 @@
 #include <asm/hardware/vic.h>
 
 #include <mach/map.h>
+#include <mach/irqs.h>
+#include <mach/regs-gpio.h>
 
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-ext.h>
 #include <plat/pm.h>
-#include <plat/regs-gpio.h>
 #include <plat/regs-irqtype.h>
 
 /*
@@ -45,9 +46,9 @@ static inline int s3c_get_eint(unsigned int irq)
 	int real;
 
 	if (irq < IRQ_EINT16_31)
-		real = (irq - IRQ_EINT0);
+		real = (irq - IRQ_EINT(0));
 	else
-		real = (irq - S3C_IRQ_EINT_BASE) + IRQ_EINT16_31 - IRQ_EINT0;
+		real = (irq - S5P_IRQ_EINT_BASE) + IRQ_EINT16_31 - IRQ_EINT(0);
 
 	return real;
 }
@@ -72,9 +73,9 @@ static inline void s3c_irq_eint_mask(unsigned int irq)
 	u32 mask;
 	u32 bank = s3c_get_bank(irq);
 
-	mask = __raw_readl(S5PC1XX_WKUP_INT_MASK(bank));
+	mask = __raw_readl(S5P_WKUP_INT_MASK(bank));
 	mask |= s3c_eint_to_bit(irq);
-	__raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank));
+	__raw_writel(mask, S5P_WKUP_INT_MASK(bank));
 }
 
 static void s3c_irq_eint_unmask(unsigned int irq)
@@ -82,16 +83,16 @@ static void s3c_irq_eint_unmask(unsigned int irq)
 	u32 mask;
 	u32 bank = s3c_get_bank(irq);
 
-	mask = __raw_readl(S5PC1XX_WKUP_INT_MASK(bank));
+	mask = __raw_readl(S5P_WKUP_INT_MASK(bank));
 	mask &= ~(s3c_eint_to_bit(irq));
-	__raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank));
+	__raw_writel(mask, S5P_WKUP_INT_MASK(bank));
 }
 
 static inline void s3c_irq_eint_ack(unsigned int irq)
 {
 	u32 bank = s3c_get_bank(irq);
 
-	__raw_writel(s3c_eint_to_bit(irq), S5PC1XX_WKUP_INT_PEND(bank));
+	__raw_writel(s3c_eint_to_bit(irq), S5P_WKUP_INT_PEND(bank));
 }
 
 static void s3c_irq_eint_maskack(unsigned int irq)
@@ -114,23 +115,23 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
 		break;
 
 	case IRQ_TYPE_EDGE_RISING:
-		con = S5PC1XX_WKUP_INT_RISEEDGE;
+		con = S5P_WKUP_INT_RISEEDGE;
 		break;
 
 	case IRQ_TYPE_EDGE_FALLING:
-		con = S5PC1XX_WKUP_INT_FALLEDGE;
+		con = S5P_WKUP_INT_FALLEDGE;
 		break;
 
 	case IRQ_TYPE_EDGE_BOTH:
-		con = S5PC1XX_WKUP_INT_BOTHEDGE;
+		con = S5P_WKUP_INT_BOTHEDGE;
 		break;
 
 	case IRQ_TYPE_LEVEL_LOW:
-		con = S5PC1XX_WKUP_INT_LOWLEV;
+		con = S5P_WKUP_INT_LOWLEV;
 		break;
 
 	case IRQ_TYPE_LEVEL_HIGH:
-		con = S5PC1XX_WKUP_INT_HILEV;
+		con = S5P_WKUP_INT_HILEV;
 		break;
 
 	default:
@@ -141,29 +142,29 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
 	gpio = real & (8 - 1);
 	shift = gpio << 2;
 
-	ctrl = __raw_readl(S5PC1XX_WKUP_INT_CON(bank));
+	ctrl = __raw_readl(S5P_WKUP_INT_CON(bank));
 	ctrl &= ~(0x7 << shift);
 	ctrl |= con << shift;
-	__raw_writel(ctrl, S5PC1XX_WKUP_INT_CON(bank));
+	__raw_writel(ctrl, S5P_WKUP_INT_CON(bank));
 
 	switch (real) {
 	case 0 ... 7:
-			gpio = S5PC100_GPH0(gpio);
+			gpio = S5P_GPH0(gpio);
 		break;
 	case 8 ... 15:
-			gpio = S5PC100_GPH1(gpio);
+			gpio = S5P_GPH1(gpio);
 		break;
 	case 16 ... 23:
-			gpio = S5PC100_GPH2(gpio);
+			gpio = S5P_GPH2(gpio);
 		break;
 	case 24 ... 31:
-			gpio = S5PC100_GPH3(gpio);
+			gpio = S5P_GPH3(gpio);
 		break;
 	default:
 		return -EINVAL;
 	}
 
-	sfn = S3C_GPIO_SFN(0x2);
+	sfn = S5P_GPIO_EINT_SFN;
 	s3c_gpio_cfgpin(gpio, sfn);
 
 	return 0;
@@ -187,8 +188,8 @@ static struct irq_chip s3c_irq_eint = {
  */
 static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end)
 {
-	u32 status = __raw_readl(S5PC1XX_WKUP_INT_PEND((start >> 3)));
-	u32 mask = __raw_readl(S5PC1XX_WKUP_INT_MASK((start >> 3)));
+	u32 status = __raw_readl(S5P_WKUP_INT_PEND((start >> 3)));
+	u32 mask = __raw_readl(S5P_WKUP_INT_MASK((start >> 3)));
 	unsigned int irq;
 
 	status &= ~mask;
@@ -237,7 +238,7 @@ static inline void s3c_irq_vic_eint_ack(unsigned int irq)
 	u32 bank = s3c_get_bank(irq);
 
 	bit = s3c_eint_to_bit(irq);
-	__raw_writel(bit, S5PC1XX_WKUP_INT_PEND(bank));
+	__raw_writel(bit, S5P_WKUP_INT_PEND(bank));
 }
 
 static void s3c_irq_vic_eint_maskack(unsigned int irq)
@@ -257,11 +258,11 @@ static struct irq_chip s3c_irq_vic_eint = {
 	.set_wake	= s3c_irqext_wake,
 };
 
-static int __init s5pc1xx_init_irq_eint(void)
+static int __init s5p_init_irq_eint(void)
 {
 	int irq;
 
-	for (irq = IRQ_EINT0; irq <= IRQ_EINT15; irq++) {
+	for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++) {
 		set_irq_chip(irq, &s3c_irq_vic_eint);
 		set_irq_handler(irq, handle_level_irq);
 		set_irq_flags(irq, IRQF_VALID);
@@ -278,4 +279,4 @@ static int __init s5pc1xx_init_irq_eint(void)
 	return 0;
 }
 
-arch_initcall(s5pc1xx_init_irq_eint);
+arch_initcall(s5p_init_irq_eint);
diff --git a/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h b/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h
deleted file mode 100644
index 33ad267..0000000
--- a/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* linux/arch/arm/plat-s5pc1xx/include/plat/gpio-eint.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *
- * External Interrupt (GPH0 ~ GPH3) control register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#define S5PC1XX_WKUP_INT_CON0_7		(S5PC1XX_EINT_BASE + 0x0)
-#define S5PC1XX_WKUP_INT_CON8_15	(S5PC1XX_EINT_BASE + 0x4)
-#define S5PC1XX_WKUP_INT_CON16_23	(S5PC1XX_EINT_BASE + 0x8)
-#define S5PC1XX_WKUP_INT_CON24_31	(S5PC1XX_EINT_BASE + 0xC)
-#define S5PC1XX_WKUP_INT_CON(x)		(S5PC1XX_WKUP_INT_CON0_7 + (x * 0x4))
-
-#define S5PC1XX_WKUP_INT_FLTCON0_3	(S5PC1XX_EINT_BASE + 0x80)
-#define S5PC1XX_WKUP_INT_FLTCON4_7	(S5PC1XX_EINT_BASE + 0x84)
-#define S5PC1XX_WKUP_INT_FLTCON8_11	(S5PC1XX_EINT_BASE + 0x88)
-#define S5PC1XX_WKUP_INT_FLTCON12_15	(S5PC1XX_EINT_BASE + 0x8C)
-#define S5PC1XX_WKUP_INT_FLTCON16_19	(S5PC1XX_EINT_BASE + 0x90)
-#define S5PC1XX_WKUP_INT_FLTCON20_23	(S5PC1XX_EINT_BASE + 0x94)
-#define S5PC1XX_WKUP_INT_FLTCON24_27	(S5PC1XX_EINT_BASE + 0x98)
-#define S5PC1XX_WKUP_INT_FLTCON28_31	(S5PC1XX_EINT_BASE + 0x9C)
-#define S5PC1XX_WKUP_INT_FLTCON(x)	(S5PC1XX_WKUP_INT_FLTCON0_3 + (x * 0x4))
-
-#define S5PC1XX_WKUP_INT_MASK0_7	(S5PC1XX_EINT_BASE + 0x100)
-#define S5PC1XX_WKUP_INT_MASK8_15	(S5PC1XX_EINT_BASE + 0x104)
-#define S5PC1XX_WKUP_INT_MASK16_23	(S5PC1XX_EINT_BASE + 0x108)
-#define S5PC1XX_WKUP_INT_MASK24_31	(S5PC1XX_EINT_BASE + 0x10C)
-#define S5PC1XX_WKUP_INT_MASK(x)	(S5PC1XX_WKUP_INT_MASK0_7 + (x * 0x4))
-
-#define S5PC1XX_WKUP_INT_PEND0_7	(S5PC1XX_EINT_BASE + 0x140)
-#define S5PC1XX_WKUP_INT_PEND8_15	(S5PC1XX_EINT_BASE + 0x144)
-#define S5PC1XX_WKUP_INT_PEND16_23	(S5PC1XX_EINT_BASE + 0x148)
-#define S5PC1XX_WKUP_INT_PEND24_31	(S5PC1XX_EINT_BASE + 0x14C)
-#define S5PC1XX_WKUP_INT_PEND(x)	(S5PC1XX_WKUP_INT_PEND0_7 + (x * 0x4))
-
-#define S5PC1XX_WKUP_INT_LOWLEV		(0x00)
-#define S5PC1XX_WKUP_INT_HILEV		(0x01)
-#define S5PC1XX_WKUP_INT_FALLEDGE	(0x02)
-#define S5PC1XX_WKUP_INT_RISEEDGE	(0x03)
-#define S5PC1XX_WKUP_INT_BOTHEDGE	(0x04)
-- 
1.6.4

[PATCH 14/15] ARM: S5PC100: Add support for gpio interrupt

[Marek Szyprowski]

This patch moves support for gpio interrupts from plat-s5pc1xx to
mach-s5pc100 directory.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-s5pc100/Makefile                     |    2 +-
 arch/arm/mach-s5pc100/gpio.c                       |   10 +--
 arch/arm/{plat-s5pc1xx => mach-s5pc100}/irq-gpio.c |   78 ++++++++++----------
 3 files changed, 44 insertions(+), 46 deletions(-)
 rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/irq-gpio.c (72%)

diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index c51b580..9976269 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -11,7 +11,7 @@ obj-				:=
 
 # Core support for S5PC100 system
 
-obj-$(CONFIG_CPU_S5PC100)	+= cpu.o init.o clock.o gpio.o
+obj-$(CONFIG_CPU_S5PC100)	+= cpu.o init.o clock.o gpio.o irq-gpio.o
 obj-$(CONFIG_CPU_S5PC100)	+= setup-i2c0.o
 
 # Helper and device support
diff --git a/arch/arm/mach-s5pc100/gpio.c b/arch/arm/mach-s5pc100/gpio.c
index df539f6..0fab7f2 100644
--- a/arch/arm/mach-s5pc100/gpio.c
+++ b/arch/arm/mach-s5pc100/gpio.c
@@ -386,7 +386,6 @@ extern void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc)
 
 static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
 {
-#if 0
 	/* Interrupt */
 	if (chip->config == &gpio_cfg) {
 		int i, irq;
@@ -400,10 +399,9 @@ static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
 			set_irq_handler(irq, handle_level_irq);
 			set_irq_flags(irq, IRQF_VALID);
 		}
-	} else
-#endif
-	if (chip->config == &gpio_cfg_eint)
+	} else if (chip->config == &gpio_cfg_eint) {
 		chip->chip.to_irq = s5pc100_gpiolib_to_eint;
+	}
 }
 
 static __init int s5pc100_gpiolib_init(void)
@@ -419,10 +417,10 @@ static __init int s5pc100_gpiolib_init(void)
 
 	samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
 				       ARRAY_SIZE(s5pc100_gpio_chips));
-#if 0
+
 	/* Interrupt */
 	set_irq_chained_handler(IRQ_GPIOINT, s5pc100_irq_gpioint_handler);
-#endif
+
 	return 0;
 }
 core_initcall(s5pc100_gpiolib_init);
diff --git a/arch/arm/plat-s5pc1xx/irq-gpio.c b/arch/arm/mach-s5pc100/irq-gpio.c
similarity index 72%
rename from arch/arm/plat-s5pc1xx/irq-gpio.c
rename to arch/arm/mach-s5pc100/irq-gpio.c
index fecca7a..2bf86c1 100644
--- a/arch/arm/plat-s5pc1xx/irq-gpio.c
+++ b/arch/arm/mach-s5pc100/irq-gpio.c
@@ -1,9 +1,9 @@
 /*
- * arch/arm/plat-s5pc1xx/irq-gpio.c
+ * arch/arm/mach-s5pc100/irq-gpio.c
  *
  * Copyright (C) 2009 Samsung Electronics
  *
- * S5PC1XX - Interrupt handling for IRQ_GPIO${group}(x)
+ * S5PC100 - Interrupt handling for IRQ_GPIO${group}(x)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -19,7 +19,7 @@
 #include <mach/map.h>
 #include <plat/gpio-cfg.h>
 
-#define S5PC1XX_GPIOREG(x)		(S5PC1XX_VA_GPIO + (x))
+#define S5P_GPIOREG(x)		(S5P_VA_GPIO + (x))
 
 #define CON_OFFSET			0x700
 #define MASK_OFFSET			0x900
@@ -49,7 +49,7 @@ static int group_to_pend_offset(int group)
 	return group << 2;
 }
 
-static int s5pc1xx_get_start(unsigned int group)
+static int s5pc100_get_start(unsigned int group)
 {
 	switch (group) {
 	case 0: return S5PC100_GPIO_A0_START;
@@ -80,7 +80,7 @@ static int s5pc1xx_get_start(unsigned int group)
 	return -EINVAL;
 }
 
-static int s5pc1xx_get_group(unsigned int irq)
+static int s5pc100_get_group(unsigned int irq)
 {
 	irq -= S3C_IRQ_GPIO(0);
 
@@ -134,67 +134,67 @@ static int s5pc1xx_get_group(unsigned int irq)
 	return -EINVAL;
 }
 
-static int s5pc1xx_get_offset(unsigned int irq)
+static int s5pc100_get_offset(unsigned int irq)
 {
 	struct gpio_chip *chip = get_irq_data(irq);
 	return irq - S3C_IRQ_GPIO(chip->base);
 }
 
-static void s5pc1xx_gpioint_ack(unsigned int irq)
+static void s5pc100_gpioint_ack(unsigned int irq)
 {
 	int group, offset, pend_offset;
 	unsigned int value;
 
-	group = s5pc1xx_get_group(irq);
-	offset = s5pc1xx_get_offset(irq);
+	group = s5pc100_get_group(irq);
+	offset = s5pc100_get_offset(irq);
 	pend_offset = group_to_pend_offset(group);
 
-	value = __raw_readl(S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset);
+	value = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset);
 	value |= 1 << offset;
-	__raw_writel(value, S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset);
+	__raw_writel(value, S5P_GPIOREG(PEND_OFFSET) + pend_offset);
 }
 
-static void s5pc1xx_gpioint_mask(unsigned int irq)
+static void s5pc100_gpioint_mask(unsigned int irq)
 {
 	int group, offset, mask_offset;
 	unsigned int value;
 
-	group = s5pc1xx_get_group(irq);
-	offset = s5pc1xx_get_offset(irq);
+	group = s5pc100_get_group(irq);
+	offset = s5pc100_get_offset(irq);
 	mask_offset = group_to_mask_offset(group);
 
-	value = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset);
+	value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
 	value |= 1 << offset;
-	__raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset);
+	__raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset);
 }
 
-static void s5pc1xx_gpioint_unmask(unsigned int irq)
+static void s5pc100_gpioint_unmask(unsigned int irq)
 {
 	int group, offset, mask_offset;
 	unsigned int value;
 
-	group = s5pc1xx_get_group(irq);
-	offset = s5pc1xx_get_offset(irq);
+	group = s5pc100_get_group(irq);
+	offset = s5pc100_get_offset(irq);
 	mask_offset = group_to_mask_offset(group);
 
-	value = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset);
+	value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
 	value &= ~(1 << offset);
-	__raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset);
+	__raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset);
 }
 
-static void s5pc1xx_gpioint_mask_ack(unsigned int irq)
+static void s5pc100_gpioint_mask_ack(unsigned int irq)
 {
-	s5pc1xx_gpioint_mask(irq);
-	s5pc1xx_gpioint_ack(irq);
+	s5pc100_gpioint_mask(irq);
+	s5pc100_gpioint_ack(irq);
 }
 
-static int s5pc1xx_gpioint_set_type(unsigned int irq, unsigned int type)
+static int s5pc100_gpioint_set_type(unsigned int irq, unsigned int type)
 {
 	int group, offset, con_offset;
 	unsigned int value;
 
-	group = s5pc1xx_get_group(irq);
-	offset = s5pc1xx_get_offset(irq);
+	group = s5pc100_get_group(irq);
+	offset = s5pc100_get_offset(irq);
 	con_offset = group_to_con_offset(group);
 
 	switch (type) {
@@ -221,24 +221,24 @@ static int s5pc1xx_gpioint_set_type(unsigned int irq, unsigned int type)
 	}
 
 
-	value = __raw_readl(S5PC1XX_GPIOREG(CON_OFFSET) + con_offset);
+	value = __raw_readl(S5P_GPIOREG(CON_OFFSET) + con_offset);
 	value &= ~(0xf << (offset * 0x4));
 	value |= (type << (offset * 0x4));
-	__raw_writel(value, S5PC1XX_GPIOREG(CON_OFFSET) + con_offset);
+	__raw_writel(value, S5P_GPIOREG(CON_OFFSET) + con_offset);
 
 	return 0;
 }
 
-struct irq_chip s5pc1xx_gpioint = {
+struct irq_chip s5pc100_gpioint = {
 	.name		= "GPIO",
-	.ack		= s5pc1xx_gpioint_ack,
-	.mask		= s5pc1xx_gpioint_mask,
-	.mask_ack	= s5pc1xx_gpioint_mask_ack,
-	.unmask		= s5pc1xx_gpioint_unmask,
-	.set_type	= s5pc1xx_gpioint_set_type,
+	.ack		= s5pc100_gpioint_ack,
+	.mask		= s5pc100_gpioint_mask,
+	.mask_ack	= s5pc100_gpioint_mask_ack,
+	.unmask		= s5pc100_gpioint_unmask,
+	.set_type	= s5pc100_gpioint_set_type,
 };
 
-void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc)
+void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc)
 {
 	int group, offset, pend_offset, mask_offset;
 	int real_irq, group_end;
@@ -248,17 +248,17 @@ void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc)
 
 	for (group = 0; group < group_end; group++) {
 		pend_offset = group_to_pend_offset(group);
-		pend = __raw_readl(S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset);
+		pend = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset);
 		if (!pend)
 			continue;
 
 		mask_offset = group_to_mask_offset(group);
-		mask = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset);
+		mask = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
 		pend &= ~mask;
 
 		for (offset = 0; offset < 8; offset++) {
 			if (pend & (1 << offset)) {
-				real_irq = s5pc1xx_get_start(group) + offset;
+				real_irq = s5pc100_get_start(group) + offset;
 				generic_handle_irq(S3C_IRQ_GPIO(real_irq));
 			}
 		}
-- 
1.6.4

[PATCH 15/15] ARM: remove obsolete plat-s5pc1xx directory

[Marek Szyprowski]

This patch removes all obsolete files from plat-s5pc1xx. This directory is
no longer needed. S5PC100 SoC is now completely supported in plat-s5p
framework.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/plat-s5pc1xx/Kconfig                   |   42 --
 arch/arm/plat-s5pc1xx/Makefile                  |   25 -
 arch/arm/plat-s5pc1xx/clock.c                   |  709 ------------------
 arch/arm/plat-s5pc1xx/cpu.c                     |  122 ----
 arch/arm/plat-s5pc1xx/dev-uart.c                |  145 ----
 arch/arm/plat-s5pc1xx/include/plat/irqs.h       |  198 -----
 arch/arm/plat-s5pc1xx/include/plat/pll.h        |   38 -
 arch/arm/plat-s5pc1xx/include/plat/regs-clock.h |  252 -------
 arch/arm/plat-s5pc1xx/include/plat/regs-power.h |   84 ---
 arch/arm/plat-s5pc1xx/include/plat/s5pc100.h    |   64 --
 arch/arm/plat-s5pc1xx/irq.c                     |   75 --
 arch/arm/plat-s5pc1xx/s5pc100-clock.c           |  876 -----------------------
 12 files changed, 0 insertions(+), 2630 deletions(-)
 delete mode 100644 arch/arm/plat-s5pc1xx/Kconfig
 delete mode 100644 arch/arm/plat-s5pc1xx/Makefile
 delete mode 100644 arch/arm/plat-s5pc1xx/clock.c
 delete mode 100644 arch/arm/plat-s5pc1xx/cpu.c
 delete mode 100644 arch/arm/plat-s5pc1xx/dev-uart.c
 delete mode 100644 arch/arm/plat-s5pc1xx/include/plat/irqs.h
 delete mode 100644 arch/arm/plat-s5pc1xx/include/plat/pll.h
 delete mode 100644 arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
 delete mode 100644 arch/arm/plat-s5pc1xx/include/plat/regs-power.h
 delete mode 100644 arch/arm/plat-s5pc1xx/include/plat/s5pc100.h
 delete mode 100644 arch/arm/plat-s5pc1xx/irq.c
 delete mode 100644 arch/arm/plat-s5pc1xx/s5pc100-clock.c

diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
deleted file mode 100644
index ab58758..0000000
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ /dev/null
@@ -1,42 +0,0 @@
-# Copyright 2009 Samsung Electronics Co.
-#	Byungho Min <bhmin@samsung.com>
-#
-# Licensed under GPLv2
-
-config PLAT_S5PC1XX
-	bool
-	depends on ARCH_S5PC1XX
-	default y
-	select PLAT_S3C
-	select ARM_VIC
-	select NO_IOPORT
-	select ARCH_REQUIRE_GPIOLIB
-	select SAMSUNG_CLKSRC
-	select SAMSUNG_IRQ_UART
-	select SAMSUNG_IRQ_VIC_TIMER
-	select S3C_GPIO_TRACK
-	select S3C_GPIO_PULL_UPDOWN
-	select S5P_GPIO_DRVSTR
-	select S3C_GPIO_CFG_S3C24XX
-	select S3C_GPIO_CFG_S3C64XX
-	select SAMSUNG_GPIOLIB_4BIT
-	help
-	  Base platform code for any Samsung S5PC1XX device
-
-if PLAT_S5PC1XX
-
-# Configuration options shared by all S3C64XX implementations
-
-config CPU_S5PC100_INIT
-	bool
-	help
-	  Common initialisation code for the S5PC1XX
-
-config CPU_S5PC100_CLOCK
-	bool
-	help
-	  Common clock support code for the S5PC1XX
-
-# platform specific device setup
-
-endif
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile
deleted file mode 100644
index d490543..0000000
--- a/arch/arm/plat-s5pc1xx/Makefile
+++ /dev/null
@@ -1,25 +0,0 @@
-# arch/arm/plat-s5pc1xx/Makefile
-#
-# Copyright 2009 Samsung Electronics Co.
-#
-# Licensed under GPLv2
-
-obj-y				:=
-obj-m				:=
-obj-n				:= dummy.o
-obj-				:=
-
-# Core files
-
-obj-y				+= dev-uart.o
-obj-y				+= cpu.o
-obj-y				+= irq.o
-obj-y				+= clock.o
-
-# CPU support
-
-obj-$(CONFIG_CPU_S5PC100_INIT)	+= s5pc100-init.o
-obj-$(CONFIG_CPU_S5PC100_CLOCK)	+= s5pc100-clock.o
-
-# Device setup
-
diff --git a/arch/arm/plat-s5pc1xx/clock.c b/arch/arm/plat-s5pc1xx/clock.c
deleted file mode 100644
index 387f231..0000000
--- a/arch/arm/plat-s5pc1xx/clock.c
+++ /dev/null
@@ -1,709 +0,0 @@
-/* linux/arch/arm/plat-s5pc1xx/clock.c
- *
- * Copyright 2009 Samsung Electronics Co.
- *
- * S5PC1XX Base clock support
- *
- * Based on plat-s3c64xx/clock.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/regs-clock.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-
-struct clk clk_27m = {
-	.name		= "clk_27m",
-	.id		= -1,
-	.rate		= 27000000,
-};
-
-static int clk_48m_ctrl(struct clk *clk, int enable)
-{
-	unsigned long flags;
-	u32 val;
-
-	/* can't rely on clock lock, this register has other usages */
-	local_irq_save(flags);
-
-	val = __raw_readl(S5PC100_CLKSRC1);
-	if (enable)
-		val |= S5PC100_CLKSRC1_CLK48M_MASK;
-	else
-		val &= ~S5PC100_CLKSRC1_CLK48M_MASK;
-
-	__raw_writel(val, S5PC100_CLKSRC1);
-	local_irq_restore(flags);
-
-	return 0;
-}
-
-struct clk clk_48m = {
-	.name		= "clk_48m",
-	.id		= -1,
-	.rate		= 48000000,
-	.enable		= clk_48m_ctrl,
-};
-
-struct clk clk_54m = {
-	.name		= "clk_54m",
-	.id		= -1,
-	.rate		= 54000000,
-};
-
-struct clk clk_hd0 = {
-	.name		= "hclkd0",
-	.id		= -1,
-	.rate		= 0,
-	.parent		= NULL,
-	.ctrlbit	= 0,
-	.ops		= &clk_ops_def_setrate,
-};
-
-struct clk clk_pd0 = {
-	.name		= "pclkd0",
-	.id		= -1,
-	.rate		= 0,
-	.parent		= NULL,
-	.ctrlbit	= 0,
-	.ops		= &clk_ops_def_setrate,
-};
-
-static int s5pc1xx_clk_gate(void __iomem *reg, struct clk *clk, int enable)
-{
-	unsigned int ctrlbit = clk->ctrlbit;
-	u32 con;
-
-	con = __raw_readl(reg);
-	if (enable)
-		con |= ctrlbit;
-	else
-		con &= ~ctrlbit;
-	__raw_writel(con, reg);
-
-	return 0;
-}
-
-static int s5pc100_clk_d00_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D00, clk, enable);
-}
-
-static int s5pc100_clk_d01_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D01, clk, enable);
-}
-
-static int s5pc100_clk_d02_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D02, clk, enable);
-}
-
-static int s5pc100_clk_d10_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D10, clk, enable);
-}
-
-static int s5pc100_clk_d11_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D11, clk, enable);
-}
-
-static int s5pc100_clk_d12_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D12, clk, enable);
-}
-
-static int s5pc100_clk_d13_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D13, clk, enable);
-}
-
-static int s5pc100_clk_d14_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D14, clk, enable);
-}
-
-static int s5pc100_clk_d15_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D15, clk, enable);
-}
-
-static int s5pc100_clk_d20_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_CLKGATE_D20, clk, enable);
-}
-
-int s5pc100_sclk0_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_SCLKGATE0, clk, enable);
-}
-
-int s5pc100_sclk1_ctrl(struct clk *clk, int enable)
-{
-	return s5pc1xx_clk_gate(S5PC100_SCLKGATE1, clk, enable);
-}
-
-static struct clk s5pc100_init_clocks_disable[] = {
-	{
-		.name		= "dsi",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_DSI,
-	}, {
-		.name		= "csi",
-		.id		= -1,
-		.parent		= &clk_h,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_CSI,
-	}, {
-		.name		= "ccan",
-		.id		= 0,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_CCAN0,
-	}, {
-		.name		= "ccan",
-		.id		= 1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_CCAN1,
-	}, {
-		.name		= "keypad",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_KEYIF,
-	}, {
-		.name		= "hclkd2",
-		.id		= -1,
-		.parent		= NULL,
-		.enable		= s5pc100_clk_d20_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D20_HCLKD2,
-	}, {
-		.name		= "iis-d2",
-		.id		= -1,
-		.parent		= NULL,
-		.enable		= s5pc100_clk_d20_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D20_I2SD2,
-	},
-};
-
-static struct clk s5pc100_init_clocks[] = {
-	/* System1 (D0_0) devices */
-	{
-		.name		= "intc",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d00_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D00_INTC,
-	}, {
-		.name		= "tzic",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d00_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D00_TZIC,
-	}, {
-		.name		= "cf-ata",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d00_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D00_CFCON,
-	}, {
-		.name		= "mdma",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d00_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D00_MDMA,
-	}, {
-		.name		= "g2d",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d00_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D00_G2D,
-	}, {
-		.name		= "secss",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d00_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D00_SECSS,
-	}, {
-		.name		= "cssys",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d00_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D00_CSSYS,
-	},
-
-	/* Memory (D0_1) devices */
-	{
-		.name		= "dmc",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d01_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D01_DMC,
-	}, {
-		.name		= "sromc",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d01_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D01_SROMC,
-	}, {
-		.name		= "onenand",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d01_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D01_ONENAND,
-	}, {
-		.name		= "nand",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d01_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D01_NFCON,
-	}, {
-		.name		= "intmem",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d01_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D01_INTMEM,
-	}, {
-		.name		= "ebi",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d01_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D01_EBI,
-	},
-
-	/* System2 (D0_2) devices */
-	{
-		.name		= "seckey",
-		.id		= -1,
-		.parent		= &clk_pd0,
-		.enable		= s5pc100_clk_d02_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D02_SECKEY,
-	}, {
-		.name		= "sdm",
-		.id		= -1,
-		.parent		= &clk_hd0,
-		.enable		= s5pc100_clk_d02_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D02_SDM,
-	},
-
-	/* File (D1_0) devices */
-	{
-		.name		= "pdma",
-		.id		= 0,
-		.parent		= &clk_h,
-		.enable		= s5pc100_clk_d10_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D10_PDMA0,
-	}, {
-		.name		= "pdma",
-		.id		= 1,
-		.parent		= &clk_h,
-		.enable		= s5pc100_clk_d10_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D10_PDMA1,
-	}, {
-		.name		= "usb-host",
-		.id		= -1,
-		.parent		= &clk_h,
-		.enable		= s5pc100_clk_d10_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D10_USBHOST,
-	}, {
-		.name		= "otg",
-		.id		= -1,
-		.parent		= &clk_h,
-		.enable		= s5pc100_clk_d10_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D10_USBOTG,
-	}, {
-		.name		= "modem",
-		.id		= -1,
-		.parent		= &clk_h,
-		.enable		= s5pc100_clk_d10_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D10_MODEMIF,
-	}, {
-		.name		= "hsmmc",
-		.id		= 0,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_clk_d10_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D10_HSMMC0,
-	}, {
-		.name		= "hsmmc",
-		.id		= 1,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_clk_d10_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D10_HSMMC1,
-	}, {
-		.name		= "hsmmc",
-		.id		= 2,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_clk_d10_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D10_HSMMC2,
-	},
-
-	/* Multimedia1 (D1_1) devices */
-	{
-		.name		= "lcd",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_LCD,
-	}, {
-		.name		= "rotator",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_ROTATOR,
-	}, {
-		.name		= "fimc",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_FIMC0,
-	}, {
-		.name		= "fimc",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_FIMC1,
-	}, {
-		.name		= "fimc",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_FIMC2,
-	}, {
-		.name		= "jpeg",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_JPEG,
-	}, {
-		.name		= "g3d",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d11_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D11_G3D,
-	},
-
-	/* Multimedia2 (D1_2) devices */
-	{
-		.name		= "tv",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d12_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D12_TV,
-	}, {
-		.name		= "vp",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d12_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D12_VP,
-	}, {
-		.name		= "mixer",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d12_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D12_MIXER,
-	}, {
-		.name		= "hdmi",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d12_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D12_HDMI,
-	}, {
-		.name		= "mfc",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d12_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D12_MFC,
-	},
-
-	/* System (D1_3) devices */
-	{
-		.name		= "chipid",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d13_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D13_CHIPID,
-	}, {
-		.name		= "gpio",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d13_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D13_GPIO,
-	}, {
-		.name		= "apc",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d13_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D13_APC,
-	}, {
-		.name		= "iec",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d13_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D13_IEC,
-	}, {
-		.name		= "timers",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d13_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D13_PWM,
-	}, {
-		.name		= "systimer",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d13_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D13_SYSTIMER,
-	}, {
-		.name		= "watchdog",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d13_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D13_WDT,
-	}, {
-		.name		= "rtc",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d13_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D13_RTC,
-	},
-
-	/* Connectivity (D1_4) devices */
-	{
-		.name		= "uart",
-		.id		= 0,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_UART0,
-	}, {
-		.name		= "uart",
-		.id		= 1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_UART1,
-	}, {
-		.name		= "uart",
-		.id		= 2,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_UART2,
-	}, {
-		.name		= "uart",
-		.id		= 3,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_UART3,
-	}, {
-		.name		= "i2c",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_IIC,
-	}, {
-		.name		= "hdmi-i2c",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_HDMI_IIC,
-	}, {
-		.name		= "spi",
-		.id		= 0,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_SPI0,
-	}, {
-		.name		= "spi",
-		.id		= 1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_SPI1,
-	}, {
-		.name		= "spi",
-		.id		= 2,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_SPI2,
-	}, {
-		.name		= "irda",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_IRDA,
-	}, {
-		.name		= "hsitx",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_HSITX,
-	}, {
-		.name		= "hsirx",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d14_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D14_HSIRX,
-	},
-
-	/* Audio (D1_5) devices */
-	{
-		.name		= "iis",
-		.id		= 0,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_IIS0,
-	}, {
-		.name		= "iis",
-		.id		= 1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_IIS1,
-	}, {
-		.name		= "iis",
-		.id		= 2,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_IIS2,
-	}, {
-		.name		= "ac97",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_AC97,
-	}, {
-		.name		= "pcm",
-		.id		= 0,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_PCM0,
-	}, {
-		.name		= "pcm",
-		.id		= 1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_PCM1,
-	}, {
-		.name		= "spdif",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_SPDIF,
-	}, {
-		.name		= "adc",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_TSADC,
-	}, {
-		.name		= "cg",
-		.id		= -1,
-		.parent		= &clk_p,
-		.enable		= s5pc100_clk_d15_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_D15_CG,
-	},
-
-	/* Audio (D2_0) devices: all disabled */
-
-	/* Special Clocks 0 */
-	{
-		.name		= "sclk_hpm",
-		.id		= -1,
-		.parent		= NULL,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_SCLK0_HPM,
-	}, {
-		.name		= "sclk_onenand",
-		.id		= -1,
-		.parent		= NULL,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_SCLK0_ONENAND,
-	}, {
-		.name		= "spi_48",
-		.id		= 0,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_SCLK0_SPI0_48,
-	}, {
-		.name		= "spi_48",
-		.id		= 1,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_SCLK0_SPI1_48,
-	}, {
-		.name		= "spi_48",
-		.id		= 2,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_SCLK0_SPI2_48,
-	}, {
-		.name		= "mmc_48",
-		.id		= 0,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_SCLK0_MMC0_48,
-	}, {
-		.name		= "mmc_48",
-		.id		= 1,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_SCLK0_MMC1_48,
-	}, {
-		.name		= "mmc_48",
-		.id		= 2,
-		.parent		= &clk_48m,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= S5PC100_CLKGATE_SCLK0_MMC2_48,
-	},
-	/* Special Clocks 1 */
-};
-
-static struct clk *clks[] __initdata = {
-	&clk_ext,
-	&clk_epll,
-	&clk_pd0,
-	&clk_hd0,
-	&clk_27m,
-	&clk_48m,
-	&clk_54m,
-};
-
-void __init s5pc1xx_register_clocks(void)
-{
-	struct clk *clkp;
-	int ret;
-	int ptr;
-	int size;
-
-	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
-
-	s3c_register_clocks(s5pc100_init_clocks,
-			    ARRAY_SIZE(s5pc100_init_clocks));
-
-	clkp = s5pc100_init_clocks_disable;
-	size = ARRAY_SIZE(s5pc100_init_clocks_disable);
-
-	for (ptr = 0; ptr < size; ptr++, clkp++) {
-		ret = s3c24xx_register_clock(clkp);
-		if (ret < 0) {
-			printk(KERN_ERR "Failed to register clock %s (%d)\n",
-			       clkp->name, ret);
-		}
-
-		(clkp->enable)(clkp, 0);
-	}
-
-	s3c_pwmclk_init();
-}
diff --git a/arch/arm/plat-s5pc1xx/cpu.c b/arch/arm/plat-s5pc1xx/cpu.c
deleted file mode 100644
index 02baeaa..0000000
--- a/arch/arm/plat-s5pc1xx/cpu.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/* linux/arch/arm/plat-s5pc1xx/cpu.c
- *
- * Copyright 2009 Samsung Electronics Co.
- *	Byungho Min <bhmin@samsung.com>
- *
- * S5PC1XX CPU Support
- *
- * Based on plat-s3c64xx/cpu.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <asm/mach/map.h>
-
-#include <plat/regs-serial.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-
-#include <plat/s5pc100.h>
-
-/* table of supported CPUs */
-
-static const char name_s5pc100[] = "S5PC100";
-
-static struct cpu_table cpu_ids[] __initdata = {
-	{
-		.idcode		= 0x43100000,
-		.idmask		= 0xfffff000,
-		.map_io		= s5pc100_map_io,
-		.init_clocks	= s5pc100_init_clocks,
-		.init_uarts	= s5pc100_init_uarts,
-		.init		= s5pc100_init,
-		.name		= name_s5pc100,
-	},
-};
-/* minimal IO mapping */
-
-/* see notes on uart map in arch/arm/mach-s5pc100/include/mach/debug-macro.S */
-#define UART_OFFS (S3C_PA_UART & 0xffff)
-
-static struct map_desc s5pc1xx_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5PC1XX_VA_CLK_OTHER,
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_CLK_OTHER),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5PC1XX_VA_GPIO,
-		.pfn		= __phys_to_pfn(S5PC100_PA_GPIO),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5PC1XX_VA_CHIPID,
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_CHIPID),
-		.length		= SZ_16,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5PC1XX_VA_CLK,
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_CLK),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5PC1XX_VA_PWR,
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_PWR),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)(S5PC1XX_VA_UART),
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_UART),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5PC1XX_VA_VIC(0),
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_VIC(0)),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5PC1XX_VA_VIC(1),
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_VIC(1)),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5PC1XX_VA_VIC(2),
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_VIC(2)),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5PC1XX_VA_TIMER,
-		.pfn		= __phys_to_pfn(S5PC1XX_PA_TIMER),
-		.length		= SZ_256,
-		.type		= MT_DEVICE,
-	},
-};
-
-/* read cpu identification code */
-
-void __init s5pc1xx_init_io(struct map_desc *mach_desc, int size)
-{
-	unsigned long idcode;
-
-	/* initialise the io descriptors we need for initialisation */
-	iotable_init(s5pc1xx_iodesc, ARRAY_SIZE(s5pc1xx_iodesc));
-	iotable_init(mach_desc, size);
-
-	idcode = __raw_readl(S5PC1XX_VA_CHIPID);
-	s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
-}
diff --git a/arch/arm/plat-s5pc1xx/dev-uart.c b/arch/arm/plat-s5pc1xx/dev-uart.c
deleted file mode 100644
index 586c95c..0000000
--- a/arch/arm/plat-s5pc1xx/dev-uart.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* linux/arch/arm/plat-s5pc1xx/dev-uart.c
- *
- * Copyright 2009 Samsung Electronics Co.
- *	Byungho Min <bhmin@samsung.com>
- *
- * Based on plat-s3c64xx/dev-uart.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/irq.h>
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/devs.h>
-
-/* Serial port registrations */
-
-/* 64xx uarts are closer together */
-
-static struct resource s5pc1xx_uart0_resource[] = {
-	[0] = {
-		.start	= S3C_PA_UART0,
-		.end	= S3C_PA_UART0 + 0x100,
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= IRQ_S3CUART_RX0,
-		.end	= IRQ_S3CUART_RX0,
-		.flags	= IORESOURCE_IRQ,
-	},
-	[2] = {
-		.start	= IRQ_S3CUART_TX0,
-		.end	= IRQ_S3CUART_TX0,
-		.flags	= IORESOURCE_IRQ,
-
-	},
-	[3] = {
-		.start	= IRQ_S3CUART_ERR0,
-		.end	= IRQ_S3CUART_ERR0,
-		.flags	= IORESOURCE_IRQ,
-	}
-};
-
-static struct resource s5pc1xx_uart1_resource[] = {
-	[0] = {
-		.start = S3C_PA_UART1,
-		.end   = S3C_PA_UART1 + 0x100,
-		.flags = IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= IRQ_S3CUART_RX1,
-		.end	= IRQ_S3CUART_RX1,
-		.flags	= IORESOURCE_IRQ,
-	},
-	[2] = {
-		.start	= IRQ_S3CUART_TX1,
-		.end	= IRQ_S3CUART_TX1,
-		.flags	= IORESOURCE_IRQ,
-
-	},
-	[3] = {
-		.start	= IRQ_S3CUART_ERR1,
-		.end	= IRQ_S3CUART_ERR1,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct resource s5pc1xx_uart2_resource[] = {
-	[0] = {
-		.start = S3C_PA_UART2,
-		.end   = S3C_PA_UART2 + 0x100,
-		.flags = IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= IRQ_S3CUART_RX2,
-		.end	= IRQ_S3CUART_RX2,
-		.flags	= IORESOURCE_IRQ,
-	},
-	[2] = {
-		.start	= IRQ_S3CUART_TX2,
-		.end	= IRQ_S3CUART_TX2,
-		.flags	= IORESOURCE_IRQ,
-
-	},
-	[3] = {
-		.start	= IRQ_S3CUART_ERR2,
-		.end	= IRQ_S3CUART_ERR2,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct resource s5pc1xx_uart3_resource[] = {
-	[0] = {
-		.start = S3C_PA_UART3,
-		.end   = S3C_PA_UART3 + 0x100,
-		.flags = IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= IRQ_S3CUART_RX3,
-		.end	= IRQ_S3CUART_RX3,
-		.flags	= IORESOURCE_IRQ,
-	},
-	[2] = {
-		.start	= IRQ_S3CUART_TX3,
-		.end	= IRQ_S3CUART_TX3,
-		.flags	= IORESOURCE_IRQ,
-
-	},
-	[3] = {
-		.start	= IRQ_S3CUART_ERR3,
-		.end	= IRQ_S3CUART_ERR3,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-
-struct s3c24xx_uart_resources s5pc1xx_uart_resources[] __initdata = {
-	[0] = {
-		.resources	= s5pc1xx_uart0_resource,
-		.nr_resources	= ARRAY_SIZE(s5pc1xx_uart0_resource),
-	},
-	[1] = {
-		.resources	= s5pc1xx_uart1_resource,
-		.nr_resources	= ARRAY_SIZE(s5pc1xx_uart1_resource),
-	},
-	[2] = {
-		.resources	= s5pc1xx_uart2_resource,
-		.nr_resources	= ARRAY_SIZE(s5pc1xx_uart2_resource),
-	},
-	[3] = {
-		.resources	= s5pc1xx_uart3_resource,
-		.nr_resources	= ARRAY_SIZE(s5pc1xx_uart3_resource),
-	},
-};
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h
deleted file mode 100644
index 409c804..0000000
--- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h
+++ /dev/null
@@ -1,198 +0,0 @@
-/* linux/arch/arm/plat-s5pc1xx/include/plat/irqs.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- * S5PC1XX - Common IRQ support
- *
- * Based on plat-s3c64xx/include/plat/irqs.h
- */
-
-#ifndef __ASM_PLAT_S5PC1XX_IRQS_H
-#define __ASM_PLAT_S5PC1XX_IRQS_H __FILE__
-
-/* we keep the first set of CPU IRQs out of the range of
- * the ISA space, so that the PC104 has them to itself
- * and we don't end up having to do horrible things to the
- * standard ISA drivers....
- *
- * note, since we're using the VICs, our start must be a
- * mulitple of 32 to allow the common code to work
- */
-
-#define S3C_IRQ_OFFSET		(32)
-
-#define S3C_IRQ(x)		((x) + S3C_IRQ_OFFSET)
-
-#define S3C_VIC0_BASE		S3C_IRQ(0)
-#define S3C_VIC1_BASE		S3C_IRQ(32)
-#define S3C_VIC2_BASE		S3C_IRQ(64)
-
-/* UART interrupts, each UART has 4 intterupts per channel so
- * use the space between the ISA and S3C main interrupts. Note, these
- * are not in the same order as the S3C24XX series! */
-
-#define IRQ_S3CUART_BASE0	(16)
-#define IRQ_S3CUART_BASE1	(20)
-#define IRQ_S3CUART_BASE2	(24)
-#define IRQ_S3CUART_BASE3	(28)
-
-#define UART_IRQ_RXD		(0)
-#define UART_IRQ_ERR		(1)
-#define UART_IRQ_TXD		(2)
-#define UART_IRQ_MODEM		(3)
-
-#define IRQ_S3CUART_RX0		(IRQ_S3CUART_BASE0 + UART_IRQ_RXD)
-#define IRQ_S3CUART_TX0		(IRQ_S3CUART_BASE0 + UART_IRQ_TXD)
-#define IRQ_S3CUART_ERR0	(IRQ_S3CUART_BASE0 + UART_IRQ_ERR)
-
-#define IRQ_S3CUART_RX1		(IRQ_S3CUART_BASE1 + UART_IRQ_RXD)
-#define IRQ_S3CUART_TX1		(IRQ_S3CUART_BASE1 + UART_IRQ_TXD)
-#define IRQ_S3CUART_ERR1	(IRQ_S3CUART_BASE1 + UART_IRQ_ERR)
-
-#define IRQ_S3CUART_RX2		(IRQ_S3CUART_BASE2 + UART_IRQ_RXD)
-#define IRQ_S3CUART_TX2		(IRQ_S3CUART_BASE2 + UART_IRQ_TXD)
-#define IRQ_S3CUART_ERR2	(IRQ_S3CUART_BASE2 + UART_IRQ_ERR)
-
-#define IRQ_S3CUART_RX3		(IRQ_S3CUART_BASE3 + UART_IRQ_RXD)
-#define IRQ_S3CUART_TX3		(IRQ_S3CUART_BASE3 + UART_IRQ_TXD)
-#define IRQ_S3CUART_ERR3	(IRQ_S3CUART_BASE3 + UART_IRQ_ERR)
-
-/* VIC based IRQs */
-
-#define S5PC1XX_IRQ_VIC0(x)	(S3C_VIC0_BASE + (x))
-#define S5PC1XX_IRQ_VIC1(x)	(S3C_VIC1_BASE + (x))
-#define S5PC1XX_IRQ_VIC2(x)	(S3C_VIC2_BASE + (x))
-
-/*
- * VIC0: system, DMA, timer
- */
-#define IRQ_EINT0		S5PC1XX_IRQ_VIC0(0)
-#define IRQ_EINT1		S5PC1XX_IRQ_VIC0(1)
-#define IRQ_EINT2		S5PC1XX_IRQ_VIC0(2)
-#define IRQ_EINT3		S5PC1XX_IRQ_VIC0(3)
-#define IRQ_EINT4		S5PC1XX_IRQ_VIC0(4)
-#define IRQ_EINT5		S5PC1XX_IRQ_VIC0(5)
-#define IRQ_EINT6		S5PC1XX_IRQ_VIC0(6)
-#define IRQ_EINT7		S5PC1XX_IRQ_VIC0(7)
-#define IRQ_EINT8		S5PC1XX_IRQ_VIC0(8)
-#define IRQ_EINT9		S5PC1XX_IRQ_VIC0(9)
-#define IRQ_EINT10		S5PC1XX_IRQ_VIC0(10)
-#define IRQ_EINT11		S5PC1XX_IRQ_VIC0(11)
-#define IRQ_EINT12		S5PC1XX_IRQ_VIC0(12)
-#define IRQ_EINT13		S5PC1XX_IRQ_VIC0(13)
-#define IRQ_EINT14		S5PC1XX_IRQ_VIC0(14)
-#define IRQ_EINT15		S5PC1XX_IRQ_VIC0(15)
-#define IRQ_EINT16_31		S5PC1XX_IRQ_VIC0(16)
-#define IRQ_BATF		S5PC1XX_IRQ_VIC0(17)
-#define IRQ_MDMA		S5PC1XX_IRQ_VIC0(18)
-#define IRQ_PDMA0		S5PC1XX_IRQ_VIC0(19)
-#define IRQ_PDMA1		S5PC1XX_IRQ_VIC0(20)
-#define IRQ_TIMER0_VIC		S5PC1XX_IRQ_VIC0(21)
-#define IRQ_TIMER1_VIC		S5PC1XX_IRQ_VIC0(22)
-#define IRQ_TIMER2_VIC		S5PC1XX_IRQ_VIC0(23)
-#define IRQ_TIMER3_VIC		S5PC1XX_IRQ_VIC0(24)
-#define IRQ_TIMER4_VIC		S5PC1XX_IRQ_VIC0(25)
-#define IRQ_SYSTIMER		S5PC1XX_IRQ_VIC0(26)
-#define IRQ_WDT			S5PC1XX_IRQ_VIC0(27)
-#define IRQ_RTC_ALARM		S5PC1XX_IRQ_VIC0(28)
-#define IRQ_RTC_TIC		S5PC1XX_IRQ_VIC0(29)
-#define IRQ_GPIOINT		S5PC1XX_IRQ_VIC0(30)
-
-/*
- * VIC1: ARM, power, memory, connectivity
- */
-#define IRQ_CORTEX0		S5PC1XX_IRQ_VIC1(0)
-#define IRQ_CORTEX1		S5PC1XX_IRQ_VIC1(1)
-#define IRQ_CORTEX2		S5PC1XX_IRQ_VIC1(2)
-#define IRQ_CORTEX3		S5PC1XX_IRQ_VIC1(3)
-#define IRQ_CORTEX4		S5PC1XX_IRQ_VIC1(4)
-#define IRQ_IEMAPC		S5PC1XX_IRQ_VIC1(5)
-#define IRQ_IEMIEC		S5PC1XX_IRQ_VIC1(6)
-#define IRQ_ONENAND		S5PC1XX_IRQ_VIC1(7)
-#define IRQ_NFC			S5PC1XX_IRQ_VIC1(8)
-#define IRQ_CFC			S5PC1XX_IRQ_VIC1(9)
-#define IRQ_UART0		S5PC1XX_IRQ_VIC1(10)
-#define IRQ_UART1		S5PC1XX_IRQ_VIC1(11)
-#define IRQ_UART2		S5PC1XX_IRQ_VIC1(12)
-#define IRQ_UART3		S5PC1XX_IRQ_VIC1(13)
-#define IRQ_IIC			S5PC1XX_IRQ_VIC1(14)
-#define IRQ_SPI0		S5PC1XX_IRQ_VIC1(15)
-#define IRQ_SPI1		S5PC1XX_IRQ_VIC1(16)
-#define IRQ_SPI2		S5PC1XX_IRQ_VIC1(17)
-#define IRQ_IRDA		S5PC1XX_IRQ_VIC1(18)
-#define IRQ_CAN0		S5PC1XX_IRQ_VIC1(19)
-#define IRQ_CAN1		S5PC1XX_IRQ_VIC1(20)
-#define IRQ_HSIRX		S5PC1XX_IRQ_VIC1(21)
-#define IRQ_HSITX		S5PC1XX_IRQ_VIC1(22)
-#define IRQ_UHOST		S5PC1XX_IRQ_VIC1(23)
-#define IRQ_OTG			S5PC1XX_IRQ_VIC1(24)
-#define IRQ_MSM			S5PC1XX_IRQ_VIC1(25)
-#define IRQ_HSMMC0		S5PC1XX_IRQ_VIC1(26)
-#define IRQ_HSMMC1		S5PC1XX_IRQ_VIC1(27)
-#define IRQ_HSMMC2		S5PC1XX_IRQ_VIC1(28)
-#define IRQ_MIPICSI		S5PC1XX_IRQ_VIC1(29)
-#define IRQ_MIPIDSI		S5PC1XX_IRQ_VIC1(30)
-
-/*
- * VIC2: multimedia, audio, security
- */
-#define IRQ_LCD0		S5PC1XX_IRQ_VIC2(0)
-#define IRQ_LCD1		S5PC1XX_IRQ_VIC2(1)
-#define IRQ_LCD2		S5PC1XX_IRQ_VIC2(2)
-#define IRQ_LCD3		S5PC1XX_IRQ_VIC2(3)
-#define IRQ_ROTATOR		S5PC1XX_IRQ_VIC2(4)
-#define IRQ_FIMC0		S5PC1XX_IRQ_VIC2(5)
-#define IRQ_FIMC1		S5PC1XX_IRQ_VIC2(6)
-#define IRQ_FIMC2		S5PC1XX_IRQ_VIC2(7)
-#define IRQ_JPEG		S5PC1XX_IRQ_VIC2(8)
-#define IRQ_2D			S5PC1XX_IRQ_VIC2(9)
-#define IRQ_3D			S5PC1XX_IRQ_VIC2(10)
-#define IRQ_MIXER		S5PC1XX_IRQ_VIC2(11)
-#define IRQ_HDMI		S5PC1XX_IRQ_VIC2(12)
-#define IRQ_IIC1		S5PC1XX_IRQ_VIC2(13)
-#define IRQ_MFC			S5PC1XX_IRQ_VIC2(14)
-#define IRQ_TVENC		S5PC1XX_IRQ_VIC2(15)
-#define IRQ_I2S0		S5PC1XX_IRQ_VIC2(16)
-#define IRQ_I2S1		S5PC1XX_IRQ_VIC2(17)
-#define IRQ_I2S2		S5PC1XX_IRQ_VIC2(18)
-#define IRQ_AC97		S5PC1XX_IRQ_VIC2(19)
-#define IRQ_PCM0		S5PC1XX_IRQ_VIC2(20)
-#define IRQ_PCM1		S5PC1XX_IRQ_VIC2(21)
-#define IRQ_SPDIF		S5PC1XX_IRQ_VIC2(22)
-#define IRQ_ADC			S5PC1XX_IRQ_VIC2(23)
-#define IRQ_PENDN		S5PC1XX_IRQ_VIC2(24)
-#define IRQ_TC			IRQ_PENDN
-#define IRQ_KEYPAD		S5PC1XX_IRQ_VIC2(25)
-#define IRQ_CG			S5PC1XX_IRQ_VIC2(26)
-#define IRQ_SEC			S5PC1XX_IRQ_VIC2(27)
-#define IRQ_SECRX		S5PC1XX_IRQ_VIC2(28)
-#define IRQ_SECTX		S5PC1XX_IRQ_VIC2(29)
-#define IRQ_SDMIRQ		S5PC1XX_IRQ_VIC2(30)
-#define IRQ_SDMFIQ		S5PC1XX_IRQ_VIC2(31)
-
-#define IRQ_TIMER(x)		(IRQ_SDMFIQ + 1 + (x))
-#define IRQ_TIMER0		IRQ_TIMER(0)
-#define IRQ_TIMER1		IRQ_TIMER(1)
-#define IRQ_TIMER2		IRQ_TIMER(2)
-#define IRQ_TIMER3		IRQ_TIMER(3)
-#define IRQ_TIMER4		IRQ_TIMER(4)
-
-/* External interrupt */
-#define S3C_IRQ_EINT_BASE	(IRQ_SDMFIQ + 6)
-
-#define S3C_EINT(x)		(S3C_IRQ_EINT_BASE + (x - 16))
-#define IRQ_EINT(x)		(x < 16 ? IRQ_EINT0 + x : S3C_EINT(x))
-#define IRQ_EINT_BIT(x)		(x < IRQ_EINT16_31 ? x - IRQ_EINT0 : x - S3C_EINT(0))
-
-/* GPIO interrupt */
-#define S3C_IRQ_GPIO_BASE	(IRQ_EINT(31) + 1)
-#define S3C_IRQ_GPIO(x)		(S3C_IRQ_GPIO_BASE + (x))
-
-/*
- * Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs
- */
-#define NR_IRQS			(S3C_IRQ_GPIO(320) + 1)
-
-#endif /* __ASM_PLAT_S5PC1XX_IRQS_H */
-
diff --git a/arch/arm/plat-s5pc1xx/include/plat/pll.h b/arch/arm/plat-s5pc1xx/include/plat/pll.h
deleted file mode 100644
index 21afef1..0000000
--- a/arch/arm/plat-s5pc1xx/include/plat/pll.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* arch/arm/plat-s5pc1xx/include/plat/pll.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *	Byungho Min <bhmin@samsung.com>
- *
- * S5PC1XX PLL code
- *
- * Based on plat-s3c64xx/include/plat/pll.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#define S5P_PLL_MDIV_MASK	((1 << (25-16+1)) - 1)
-#define S5P_PLL_PDIV_MASK	((1 << (13-8+1)) - 1)
-#define S5P_PLL_SDIV_MASK	((1 << (2-0+1)) - 1)
-#define S5P_PLL_MDIV_SHIFT	(16)
-#define S5P_PLL_PDIV_SHIFT	(8)
-#define S5P_PLL_SDIV_SHIFT	(0)
-
-#include <asm/div64.h>
-
-static inline unsigned long s5pc1xx_get_pll(unsigned long baseclk,
-					    u32 pllcon)
-{
-	u32 mdiv, pdiv, sdiv;
-	u64 fvco = baseclk;
-
-	mdiv = (pllcon >> S5P_PLL_MDIV_SHIFT) & S5P_PLL_MDIV_MASK;
-	pdiv = (pllcon >> S5P_PLL_PDIV_SHIFT) & S5P_PLL_PDIV_MASK;
-	sdiv = (pllcon >> S5P_PLL_SDIV_SHIFT) & S5P_PLL_SDIV_MASK;
-
-	fvco *= mdiv;
-	do_div(fvco, (pdiv << sdiv));
-
-	return (unsigned long)fvco;
-}
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
deleted file mode 100644
index 24dec4e..0000000
--- a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
+++ /dev/null
@@ -1,252 +0,0 @@
-/* arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *	Byungho Min <bhmin@samsung.com>
- *
- * S5PC1XX clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __PLAT_REGS_CLOCK_H
-#define __PLAT_REGS_CLOCK_H __FILE__
-
-#define S5PC100_CLKREG(x)		(S5PC1XX_VA_CLK + (x))
-#define S5PC100_CLKREG_OTHER(x)		(S5PC1XX_VA_CLK_OTHER + (x))
-
-/* s5pc100 register for clock */
-#define S5PC100_APLL_LOCK		S5PC100_CLKREG(0x00)
-#define S5PC100_MPLL_LOCK		S5PC100_CLKREG(0x04)
-#define S5PC100_EPLL_LOCK		S5PC100_CLKREG(0x08)
-#define S5PC100_HPLL_LOCK		S5PC100_CLKREG(0x0C)
-
-#define S5PC100_APLL_CON		S5PC100_CLKREG(0x100)
-#define S5PC100_MPLL_CON		S5PC100_CLKREG(0x104)
-#define S5PC100_EPLL_CON		S5PC100_CLKREG(0x108)
-#define S5PC100_HPLL_CON		S5PC100_CLKREG(0x10C)
-
-#define S5PC100_CLKSRC0			S5PC100_CLKREG(0x200)
-#define S5PC100_CLKSRC1			S5PC100_CLKREG(0x204)
-#define S5PC100_CLKSRC2			S5PC100_CLKREG(0x208)
-#define S5PC100_CLKSRC3			S5PC100_CLKREG(0x20C)
-
-#define S5PC100_CLKDIV0			S5PC100_CLKREG(0x300)
-#define S5PC100_CLKDIV1			S5PC100_CLKREG(0x304)
-#define S5PC100_CLKDIV2			S5PC100_CLKREG(0x308)
-#define S5PC100_CLKDIV3			S5PC100_CLKREG(0x30C)
-#define S5PC100_CLKDIV4			S5PC100_CLKREG(0x310)
-
-#define S5PC100_CLK_OUT			S5PC100_CLKREG(0x400)
-
-#define S5PC100_CLKGATE_D00		S5PC100_CLKREG(0x500)
-#define S5PC100_CLKGATE_D01		S5PC100_CLKREG(0x504)
-#define S5PC100_CLKGATE_D02		S5PC100_CLKREG(0x508)
-
-#define S5PC100_CLKGATE_D10		S5PC100_CLKREG(0x520)
-#define S5PC100_CLKGATE_D11		S5PC100_CLKREG(0x524)
-#define S5PC100_CLKGATE_D12		S5PC100_CLKREG(0x528)
-#define S5PC100_CLKGATE_D13		S5PC100_CLKREG(0x52C)
-#define S5PC100_CLKGATE_D14		S5PC100_CLKREG(0x530)
-#define S5PC100_CLKGATE_D15		S5PC100_CLKREG(0x534)
-
-#define S5PC100_CLKGATE_D20		S5PC100_CLKREG(0x540)
-
-#define S5PC100_SCLKGATE0		S5PC100_CLKREG(0x560)
-#define S5PC100_SCLKGATE1		S5PC100_CLKREG(0x564)
-
-/* EPLL_CON */
-#define S5PC100_EPLL_EN			(1<<31)
-#define S5PC100_EPLL_MASK		0xffffffff
-#define S5PC100_EPLLVAL(_m, _p, _s)	((_m) << 16 | ((_p) << 8) | ((_s)))
-
-/* CLKSRC0..CLKSRC3 -> mostly removed due to clksrc updates */
-#define S5PC100_CLKSRC1_CLK48M_MASK	(0x1<<24)
-#define S5PC100_CLKSRC1_CLK48M_SHIFT	(24)
-
-/* CLKDIV0 */
-#define S5PC100_CLKDIV0_APLL_MASK		(0x1<<0)
-#define S5PC100_CLKDIV0_APLL_SHIFT		(0)
-#define S5PC100_CLKDIV0_ARM_MASK		(0x7<<4)
-#define S5PC100_CLKDIV0_ARM_SHIFT		(4)
-#define S5PC100_CLKDIV0_D0_MASK		(0x7<<8)
-#define S5PC100_CLKDIV0_D0_SHIFT		(8)
-#define S5PC100_CLKDIV0_PCLKD0_MASK		(0x7<<12)
-#define S5PC100_CLKDIV0_PCLKD0_SHIFT	(12)
-#define S5PC100_CLKDIV0_SECSS_MASK		(0x7<<16)
-#define S5PC100_CLKDIV0_SECSS_SHIFT		(16)
-
-/* CLKDIV1 (OneNAND clock only used in one place, removed) */
-#define S5PC100_CLKDIV1_APLL2_MASK		(0x7<<0)
-#define S5PC100_CLKDIV1_APLL2_SHIFT		(0)
-#define S5PC100_CLKDIV1_MPLL_MASK		(0x3<<4)
-#define S5PC100_CLKDIV1_MPLL_SHIFT		(4)
-#define S5PC100_CLKDIV1_MPLL2_MASK		(0x1<<8)
-#define S5PC100_CLKDIV1_MPLL2_SHIFT		(8)
-#define S5PC100_CLKDIV1_D1_MASK		(0x7<<12)
-#define S5PC100_CLKDIV1_D1_SHIFT		(12)
-#define S5PC100_CLKDIV1_PCLKD1_MASK		(0x7<<16)
-#define S5PC100_CLKDIV1_PCLKD1_SHIFT	(16)
-#define S5PC100_CLKDIV1_CAM_MASK		(0x1F<<24)
-#define S5PC100_CLKDIV1_CAM_SHIFT		(24)
-
-/* CLKDIV2 => removed in clksrc update */
-/* CLKDIV3 => removed in clksrc update, or not needed */
-/* CLKDIV4 => removed in clksrc update, or not needed */
-
-/* HCLKD0/PCLKD0 Clock Gate 0 Registers */
-#define S5PC100_CLKGATE_D00_INTC		(1<<0)
-#define S5PC100_CLKGATE_D00_TZIC		(1<<1)
-#define S5PC100_CLKGATE_D00_CFCON		(1<<2)
-#define S5PC100_CLKGATE_D00_MDMA		(1<<3)
-#define S5PC100_CLKGATE_D00_G2D		(1<<4)
-#define S5PC100_CLKGATE_D00_SECSS		(1<<5)
-#define S5PC100_CLKGATE_D00_CSSYS		(1<<6)
-
-/* HCLKD0/PCLKD0 Clock Gate 1 Registers */
-#define S5PC100_CLKGATE_D01_DMC		(1<<0)
-#define S5PC100_CLKGATE_D01_SROMC		(1<<1)
-#define S5PC100_CLKGATE_D01_ONENAND		(1<<2)
-#define S5PC100_CLKGATE_D01_NFCON		(1<<3)
-#define S5PC100_CLKGATE_D01_INTMEM		(1<<4)
-#define S5PC100_CLKGATE_D01_EBI		(1<<5)
-
-/* PCLKD0 Clock Gate 2 Registers */
-#define S5PC100_CLKGATE_D02_SECKEY		(1<<1)
-#define S5PC100_CLKGATE_D02_SDM		(1<<2)
-
-/* HCLKD1/PCLKD1 Clock Gate 0 Registers */
-#define S5PC100_CLKGATE_D10_PDMA0		(1<<0)
-#define S5PC100_CLKGATE_D10_PDMA1		(1<<1)
-#define S5PC100_CLKGATE_D10_USBHOST		(1<<2)
-#define S5PC100_CLKGATE_D10_USBOTG		(1<<3)
-#define S5PC100_CLKGATE_D10_MODEMIF		(1<<4)
-#define S5PC100_CLKGATE_D10_HSMMC0		(1<<5)
-#define S5PC100_CLKGATE_D10_HSMMC1		(1<<6)
-#define S5PC100_CLKGATE_D10_HSMMC2		(1<<7)
-
-/* HCLKD1/PCLKD1 Clock Gate 1 Registers */
-#define S5PC100_CLKGATE_D11_LCD		(1<<0)
-#define S5PC100_CLKGATE_D11_ROTATOR		(1<<1)
-#define S5PC100_CLKGATE_D11_FIMC0		(1<<2)
-#define S5PC100_CLKGATE_D11_FIMC1		(1<<3)
-#define S5PC100_CLKGATE_D11_FIMC2		(1<<4)
-#define S5PC100_CLKGATE_D11_JPEG		(1<<5)
-#define S5PC100_CLKGATE_D11_DSI		(1<<6)
-#define S5PC100_CLKGATE_D11_CSI		(1<<7)
-#define S5PC100_CLKGATE_D11_G3D		(1<<8)
-
-/* HCLKD1/PCLKD1 Clock Gate 2 Registers */
-#define S5PC100_CLKGATE_D12_TV		(1<<0)
-#define S5PC100_CLKGATE_D12_VP		(1<<1)
-#define S5PC100_CLKGATE_D12_MIXER		(1<<2)
-#define S5PC100_CLKGATE_D12_HDMI		(1<<3)
-#define S5PC100_CLKGATE_D12_MFC		(1<<4)
-
-/* HCLKD1/PCLKD1 Clock Gate 3 Registers */
-#define S5PC100_CLKGATE_D13_CHIPID		(1<<0)
-#define S5PC100_CLKGATE_D13_GPIO		(1<<1)
-#define S5PC100_CLKGATE_D13_APC		(1<<2)
-#define S5PC100_CLKGATE_D13_IEC		(1<<3)
-#define S5PC100_CLKGATE_D13_PWM		(1<<6)
-#define S5PC100_CLKGATE_D13_SYSTIMER	(1<<7)
-#define S5PC100_CLKGATE_D13_WDT		(1<<8)
-#define S5PC100_CLKGATE_D13_RTC		(1<<9)
-
-/* HCLKD1/PCLKD1 Clock Gate 4 Registers */
-#define S5PC100_CLKGATE_D14_UART0		(1<<0)
-#define S5PC100_CLKGATE_D14_UART1		(1<<1)
-#define S5PC100_CLKGATE_D14_UART2		(1<<2)
-#define S5PC100_CLKGATE_D14_UART3		(1<<3)
-#define S5PC100_CLKGATE_D14_IIC		(1<<4)
-#define S5PC100_CLKGATE_D14_HDMI_IIC	(1<<5)
-#define S5PC100_CLKGATE_D14_SPI0		(1<<6)
-#define S5PC100_CLKGATE_D14_SPI1		(1<<7)
-#define S5PC100_CLKGATE_D14_SPI2		(1<<8)
-#define S5PC100_CLKGATE_D14_IRDA		(1<<9)
-#define S5PC100_CLKGATE_D14_CCAN0		(1<<10)
-#define S5PC100_CLKGATE_D14_CCAN1		(1<<11)
-#define S5PC100_CLKGATE_D14_HSITX		(1<<12)
-#define S5PC100_CLKGATE_D14_HSIRX		(1<<13)
-
-/* HCLKD1/PCLKD1 Clock Gate 5 Registers */
-#define S5PC100_CLKGATE_D15_IIS0		(1<<0)
-#define S5PC100_CLKGATE_D15_IIS1		(1<<1)
-#define S5PC100_CLKGATE_D15_IIS2		(1<<2)
-#define S5PC100_CLKGATE_D15_AC97		(1<<3)
-#define S5PC100_CLKGATE_D15_PCM0		(1<<4)
-#define S5PC100_CLKGATE_D15_PCM1		(1<<5)
-#define S5PC100_CLKGATE_D15_SPDIF		(1<<6)
-#define S5PC100_CLKGATE_D15_TSADC		(1<<7)
-#define S5PC100_CLKGATE_D15_KEYIF		(1<<8)
-#define S5PC100_CLKGATE_D15_CG		(1<<9)
-
-/* HCLKD2 Clock Gate 0 Registers */
-#define S5PC100_CLKGATE_D20_HCLKD2		(1<<0)
-#define S5PC100_CLKGATE_D20_I2SD2		(1<<1)
-
-/* Special Clock Gate 0 Registers */
-#define	S5PC100_CLKGATE_SCLK0_HPM		(1<<0)
-#define	S5PC100_CLKGATE_SCLK0_PWI		(1<<1)
-#define	S5PC100_CLKGATE_SCLK0_ONENAND	(1<<2)
-#define	S5PC100_CLKGATE_SCLK0_UART		(1<<3)
-#define	S5PC100_CLKGATE_SCLK0_SPI0		(1<<4)
-#define	S5PC100_CLKGATE_SCLK0_SPI1		(1<<5)
-#define	S5PC100_CLKGATE_SCLK0_SPI2		(1<<6)
-#define	S5PC100_CLKGATE_SCLK0_SPI0_48	(1<<7)
-#define	S5PC100_CLKGATE_SCLK0_SPI1_48	(1<<8)
-#define	S5PC100_CLKGATE_SCLK0_SPI2_48	(1<<9)
-#define	S5PC100_CLKGATE_SCLK0_IRDA		(1<<10)
-#define	S5PC100_CLKGATE_SCLK0_USBHOST	(1<<11)
-#define	S5PC100_CLKGATE_SCLK0_MMC0		(1<<12)
-#define	S5PC100_CLKGATE_SCLK0_MMC1		(1<<13)
-#define	S5PC100_CLKGATE_SCLK0_MMC2		(1<<14)
-#define	S5PC100_CLKGATE_SCLK0_MMC0_48	(1<<15)
-#define	S5PC100_CLKGATE_SCLK0_MMC1_48	(1<<16)
-#define	S5PC100_CLKGATE_SCLK0_MMC2_48	(1<<17)
-
-/* Special Clock Gate 1 Registers */
-#define	S5PC100_CLKGATE_SCLK1_LCD		(1<<0)
-#define	S5PC100_CLKGATE_SCLK1_FIMC0		(1<<1)
-#define	S5PC100_CLKGATE_SCLK1_FIMC1		(1<<2)
-#define	S5PC100_CLKGATE_SCLK1_FIMC2		(1<<3)
-#define	S5PC100_CLKGATE_SCLK1_TV54		(1<<4)
-#define	S5PC100_CLKGATE_SCLK1_VDAC54	(1<<5)
-#define	S5PC100_CLKGATE_SCLK1_MIXER		(1<<6)
-#define	S5PC100_CLKGATE_SCLK1_HDMI		(1<<7)
-#define	S5PC100_CLKGATE_SCLK1_AUDIO0	(1<<8)
-#define	S5PC100_CLKGATE_SCLK1_AUDIO1	(1<<9)
-#define	S5PC100_CLKGATE_SCLK1_AUDIO2	(1<<10)
-#define	S5PC100_CLKGATE_SCLK1_SPDIF		(1<<11)
-#define	S5PC100_CLKGATE_SCLK1_CAM		(1<<12)
-
-#define S5PC100_SWRESET		S5PC100_CLKREG_OTHER(0x000)
-#define S5PC100_OND_SWRESET	S5PC100_CLKREG_OTHER(0x008)
-#define S5PC100_GEN_CTRL	S5PC100_CLKREG_OTHER(0x100)
-#define S5PC100_GEN_STATUS	S5PC100_CLKREG_OTHER(0x104)
-#define S5PC100_MEM_SYS_CFG	S5PC100_CLKREG_OTHER(0x200)
-#define S5PC100_CAM_MUX_SEL	S5PC100_CLKREG_OTHER(0x300)
-#define S5PC100_MIXER_OUT_SEL	S5PC100_CLKREG_OTHER(0x304)
-#define S5PC100_LPMP_MODE_SEL	S5PC100_CLKREG_OTHER(0x308)
-#define S5PC100_MIPI_PHY_CON0	S5PC100_CLKREG_OTHER(0x400)
-#define S5PC100_MIPI_PHY_CON1	S5PC100_CLKREG_OTHER(0x414)
-#define S5PC100_HDMI_PHY_CON0	S5PC100_CLKREG_OTHER(0x420)
-
-#define S5PC100_SWRESET_RESETVAL	0xc100
-#define S5PC100_OTHER_SYS_INT	24
-#define S5PC100_OTHER_STA_TYPE	23
-#define STA_TYPE_EXPON		0
-#define STA_TYPE_SFR		1
-
-#define S5PC100_SLEEP_CFG_OSC_EN	0
-
-/* OTHERS Resgister */
-#define S5PC100_OTHERS_USB_SIG_MASK	(1 << 16)
-#define S5PC100_OTHERS_MIPI_DPHY_EN		(1 << 28)
-
-/* MIPI D-PHY Control Register 0 */
-#define S5PC100_MIPI_PHY_CON0_M_RESETN	(1 << 1)
-#define S5PC100_MIPI_PHY_CON0_S_RESETN	(1 << 0)
-
-#endif /* _PLAT_REGS_CLOCK_H */
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-power.h b/arch/arm/plat-s5pc1xx/include/plat/regs-power.h
deleted file mode 100644
index 02ffa49..0000000
--- a/arch/arm/plat-s5pc1xx/include/plat/regs-power.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/* arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *	Jongse Won <jongse.won@samsung.com>
- *
- * S5PC1XX clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARM_REGS_PWR
-#define __ASM_ARM_REGS_PWR __FILE__
-
-#define S5PC1XX_PWRREG(x)			(S5PC1XX_VA_PWR + (x))
-
-/* s5pc100 (0xE0108000) register for power management */
-#define S5PC100_PWR_CFG				S5PC1XX_PWRREG(0x0)
-#define S5PC100_EINT_WAKEUP_MASK		S5PC1XX_PWRREG(0x4)
-#define S5PC100_NORMAL_CFG			S5PC1XX_PWRREG(0x10)
-#define S5PC100_STOP_CFG			S5PC1XX_PWRREG(0x14)
-#define S5PC100_SLEEP_CFG			S5PC1XX_PWRREG(0x18)
-#define S5PC100_STOP_MEM_CFG			S5PC1XX_PWRREG(0x1C)
-#define S5PC100_OSC_FREQ			S5PC1XX_PWRREG(0x100)
-#define S5PC100_OSC_STABLE			S5PC1XX_PWRREG(0x104)
-#define S5PC100_PWR_STABLE			S5PC1XX_PWRREG(0x108)
-#define S5PC100_MTC_STABLE			S5PC1XX_PWRREG(0x110)
-#define S5PC100_CLAMP_STABLE			S5PC1XX_PWRREG(0x114)
-#define S5PC100_OTHERS				S5PC1XX_PWRREG(0x200)
-#define S5PC100_RST_STAT			S5PC1XX_PWRREG(0x300)
-#define S5PC100_WAKEUP_STAT			S5PC1XX_PWRREG(0x304)
-#define S5PC100_BLK_PWR_STAT			S5PC1XX_PWRREG(0x308)
-#define S5PC100_INFORM0				S5PC1XX_PWRREG(0x400)
-#define S5PC100_INFORM1				S5PC1XX_PWRREG(0x404)
-#define S5PC100_INFORM2				S5PC1XX_PWRREG(0x408)
-#define S5PC100_INFORM3				S5PC1XX_PWRREG(0x40C)
-#define S5PC100_INFORM4				S5PC1XX_PWRREG(0x410)
-#define S5PC100_INFORM5				S5PC1XX_PWRREG(0x414)
-#define S5PC100_INFORM6				S5PC1XX_PWRREG(0x418)
-#define S5PC100_INFORM7				S5PC1XX_PWRREG(0x41C)
-#define S5PC100_DCGIDX_MAP0			S5PC1XX_PWRREG(0x500)
-#define S5PC100_DCGIDX_MAP1			S5PC1XX_PWRREG(0x504)
-#define S5PC100_DCGIDX_MAP2			S5PC1XX_PWRREG(0x508)
-#define S5PC100_DCGPERF_MAP0			S5PC1XX_PWRREG(0x50C)
-#define S5PC100_DCGPERF_MAP1			S5PC1XX_PWRREG(0x510)
-#define S5PC100_DVCIDX_MAP			S5PC1XX_PWRREG(0x514)
-#define S5PC100_FREQ_CPU			S5PC1XX_PWRREG(0x518)
-#define S5PC100_FREQ_DPM			S5PC1XX_PWRREG(0x51C)
-#define S5PC100_DVSEMCLK_EN			S5PC1XX_PWRREG(0x520)
-#define S5PC100_APLL_CON_L8			S5PC1XX_PWRREG(0x600)
-#define S5PC100_APLL_CON_L7			S5PC1XX_PWRREG(0x604)
-#define S5PC100_APLL_CON_L6			S5PC1XX_PWRREG(0x608)
-#define S5PC100_APLL_CON_L5			S5PC1XX_PWRREG(0x60C)
-#define S5PC100_APLL_CON_L4			S5PC1XX_PWRREG(0x610)
-#define S5PC100_APLL_CON_L3			S5PC1XX_PWRREG(0x614)
-#define S5PC100_APLL_CON_L2			S5PC1XX_PWRREG(0x618)
-#define S5PC100_APLL_CON_L1			S5PC1XX_PWRREG(0x61C)
-#define S5PC100_IEM_CONTROL			S5PC1XX_PWRREG(0x620)
-#define S5PC100_CLKDIV_IEM_L8			S5PC1XX_PWRREG(0x700)
-#define S5PC100_CLKDIV_IEM_L7			S5PC1XX_PWRREG(0x704)
-#define S5PC100_CLKDIV_IEM_L6			S5PC1XX_PWRREG(0x708)
-#define S5PC100_CLKDIV_IEM_L5			S5PC1XX_PWRREG(0x70C)
-#define S5PC100_CLKDIV_IEM_L4			S5PC1XX_PWRREG(0x710)
-#define S5PC100_CLKDIV_IEM_L3			S5PC1XX_PWRREG(0x714)
-#define S5PC100_CLKDIV_IEM_L2			S5PC1XX_PWRREG(0x718)
-#define S5PC100_CLKDIV_IEM_L1			S5PC1XX_PWRREG(0x71C)
-#define S5PC100_IEM_HPMCLK_DIV			S5PC1XX_PWRREG(0x724)
-
-/* PWR_CFG */
-#define S5PC100_PWRCFG_CFG_DEEP_IDLE		(1 << 31)
-#define S5PC100_PWRCFG_CFG_WFI_MASK		(3 << 5)
-#define S5PC100_PWRCFG_CFG_WFI_IDLE		(0 << 5)
-#define S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE	(1 << 5)
-#define S5PC100_PWRCFG_CFG_WFI_STOP		(2 << 5)
-#define S5PC100_PWRCFG_CFG_WFI_SLEEP		(3 << 5)
-
-/* SLEEP_CFG */
-#define S5PC100_SLEEP_OSC_EN_SLEEP		(1 << 0)
-
-/* OTHERS */
-#define S5PC100_PMU_INT_DISABLE			(1 << 24)
-
-#endif /* __ASM_ARM_REGS_PWR */
diff --git a/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h b/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h
deleted file mode 100644
index 2531f34..0000000
--- a/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/* arch/arm/plat-s5pc1xx/include/plat/s5pc100.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *	Byungho Min <bhmin@samsung.com>
- *
- * Header file for s5pc100 cpu support
- *
- * Based on plat-s3c64xx/include/plat/s3c6400.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S5PC100 related SoCs */
-extern  int s5pc100_init(void);
-extern void s5pc100_map_io(void);
-extern void s5pc100_init_clocks(int xtal);
-extern  int s5pc100_register_baseclocks(unsigned long xtal);
-extern void s5pc100_init_irq(void);
-extern void s5pc100_init_io(struct map_desc *mach_desc, int size);
-extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s5pc100_register_clocks(void);
-extern void s5pc100_setup_clocks(void);
-extern struct sysdev_class s5pc100_sysclass;
-
-#define s5pc100_init_uarts s5pc100_common_init_uarts
-
-/* Some day, belows will be moved to plat-s5pc/include/plat/cpu.h */
-extern void s5pc1xx_init_irq(u32 *vic_valid, int num);
-extern void s5pc1xx_init_io(struct map_desc *mach_desc, int size);
-
-/* Some day, belows will be moved to plat-s5pc/include/plat/clock.h */
-extern struct clk clk_hpll;
-extern struct clk clk_hd0;
-extern struct clk clk_pd0;
-extern struct clk clk_54m;
-extern void s5pc1xx_register_clocks(void);
-extern int s5pc100_sclk0_ctrl(struct clk *clk, int enable);
-extern int s5pc100_sclk1_ctrl(struct clk *clk, int enable);
-
-/* Some day, belows will be moved to plat-s5pc/include/plat/devs.h */
-extern struct s3c24xx_uart_resources s5pc1xx_uart_resources[];
-extern struct platform_device s3c_device_g2d;
-extern struct platform_device s3c_device_g3d;
-extern struct platform_device s3c_device_vpp;
-extern struct platform_device s3c_device_tvenc;
-extern struct platform_device s3c_device_tvscaler;
-extern struct platform_device s3c_device_rotator;
-extern struct platform_device s3c_device_jpeg;
-extern struct platform_device s3c_device_onenand;
-extern struct platform_device s3c_device_usb_otghcd;
-extern struct platform_device s3c_device_keypad;
-extern struct platform_device s3c_device_ts;
-extern struct platform_device s3c_device_g3d;
-extern struct platform_device s3c_device_smc911x;
-extern struct platform_device s3c_device_fimc0;
-extern struct platform_device s3c_device_fimc1;
-extern struct platform_device s3c_device_mfc;
-extern struct platform_device s3c_device_ac97;
-extern struct platform_device s3c_device_fimc0;
-extern struct platform_device s3c_device_fimc1;
-extern struct platform_device s3c_device_fimc2;
-
diff --git a/arch/arm/plat-s5pc1xx/irq.c b/arch/arm/plat-s5pc1xx/irq.c
deleted file mode 100644
index bfc5248..0000000
--- a/arch/arm/plat-s5pc1xx/irq.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/* arch/arm/plat-s5pc1xx/irq.c
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- * S5PC1XX - Interrupt handling
- *
- * Based on plat-s3c64xx/irq.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <asm/hardware/vic.h>
-
-#include <mach/map.h>
-#include <plat/irq-vic-timer.h>
-#include <plat/irq-uart.h>
-#include <plat/cpu.h>
-
-/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
- * are consecutive when looking up the interrupt in the demux routines.
- */
-static struct s3c_uart_irq uart_irqs[] = {
-	[0] = {
-		.regs		= (void *)S3C_VA_UART0,
-		.base_irq	= IRQ_S3CUART_BASE0,
-		.parent_irq	= IRQ_UART0,
-	},
-	[1] = {
-		.regs		= (void *)S3C_VA_UART1,
-		.base_irq	= IRQ_S3CUART_BASE1,
-		.parent_irq	= IRQ_UART1,
-	},
-	[2] = {
-		.regs		= (void *)S3C_VA_UART2,
-		.base_irq	= IRQ_S3CUART_BASE2,
-		.parent_irq	= IRQ_UART2,
-	},
-	[3] = {
-		.regs		= (void *)S3C_VA_UART3,
-		.base_irq	= IRQ_S3CUART_BASE3,
-		.parent_irq	= IRQ_UART3,
-	},
-};
-
-void __init s5pc1xx_init_irq(u32 *vic_valid, int num)
-{
-	int i;
-
-	printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
-
-	/* initialise the pair of VICs */
-	for (i = 0; i < num; i++)
-		vic_init((void *)S5PC1XX_VA_VIC(i), S3C_IRQ(i * S3C_IRQ_OFFSET),
-				vic_valid[i], 0);
-
-	/* add the timer sub-irqs */
-
-	s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
-	s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
-	s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
-	s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
-	s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
-
-	s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
-}
-
-
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-clock.c b/arch/arm/plat-s5pc1xx/s5pc100-clock.c
deleted file mode 100644
index 2bf6c57..0000000
--- a/arch/arm/plat-s5pc1xx/s5pc100-clock.c
+++ /dev/null
@@ -1,876 +0,0 @@
-/* linux/arch/arm/plat-s5pc1xx/s5pc100-clock.c
- *
- * Copyright 2009 Samsung Electronics, Co.
- *	Byungho Min <bhmin@samsung.com>
- *
- * S5PC100 based common clock support
- *
- * Based on plat-s3c64xx/s3c6400-clock.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/sysdev.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/cpu-freq.h>
-
-#include <plat/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/clock-clksrc.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-#include <plat/devs.h>
-#include <plat/s5pc100.h>
-
-/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
- * ext_xtal_mux for want of an actual name from the manual.
-*/
-
-static struct clk clk_ext_xtal_mux = {
-	.name		= "ext_xtal",
-	.id		= -1,
-};
-
-#define clk_fin_apll clk_ext_xtal_mux
-#define clk_fin_mpll clk_ext_xtal_mux
-#define clk_fin_epll clk_ext_xtal_mux
-#define clk_fin_hpll clk_ext_xtal_mux
-
-#define clk_fout_mpll	clk_mpll
-#define clk_vclk_54m	clk_54m
-
-/* APLL */
-static struct clk clk_fout_apll = {
-	.name		= "fout_apll",
-	.id		= -1,
-	.rate		= 27000000,
-};
-
-static struct clk *clk_src_apll_list[] = {
-	[0] = &clk_fin_apll,
-	[1] = &clk_fout_apll,
-};
-
-static struct clksrc_sources clk_src_apll = {
-	.sources	= clk_src_apll_list,
-	.nr_sources	= ARRAY_SIZE(clk_src_apll_list),
-};
-
-static struct clksrc_clk clk_mout_apll = {
-	.clk	= {
-		.name		= "mout_apll",
-		.id		= -1,
-	},
-	.sources	= &clk_src_apll,
-	.reg_src = { .reg = S5PC100_CLKSRC0, .shift = 0, .size = 1, },
-};
-
-static unsigned long s5pc100_clk_dout_apll_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_APLL_MASK;
-	ratio >>= S5PC100_CLKDIV0_APLL_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_apll = {
-	.name		= "dout_apll",
-	.id		= -1,
-	.parent		= &clk_mout_apll.clk,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_apll_get_rate,
-	},
-};
-
-static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_ARM_MASK;
-	ratio >>= S5PC100_CLKDIV0_ARM_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static unsigned long s5pc100_clk_arm_round_rate(struct clk *clk,
-						unsigned long rate)
-{
-	unsigned long parent = clk_get_rate(clk->parent);
-	u32 div;
-
-	if (parent < rate)
-		return rate;
-
-	div = (parent / rate) - 1;
-	if (div > S5PC100_CLKDIV0_ARM_MASK)
-		div = S5PC100_CLKDIV0_ARM_MASK;
-
-	return parent / (div + 1);
-}
-
-static int s5pc100_clk_arm_set_rate(struct clk *clk, unsigned long rate)
-{
-	unsigned long parent = clk_get_rate(clk->parent);
-	u32 div;
-	u32 val;
-
-	if (rate < parent / (S5PC100_CLKDIV0_ARM_MASK + 1))
-		return -EINVAL;
-
-	rate = clk_round_rate(clk, rate);
-	div = clk_get_rate(clk->parent) / rate;
-
-	val = __raw_readl(S5PC100_CLKDIV0);
-	val &= S5PC100_CLKDIV0_ARM_MASK;
-	val |= (div - 1);
-	__raw_writel(val, S5PC100_CLKDIV0);
-
-	return 0;
-}
-
-static struct clk clk_arm = {
-	.name		= "armclk",
-	.id		= -1,
-	.parent		= &clk_dout_apll,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_arm_get_rate,
-		.set_rate	= s5pc100_clk_arm_set_rate,
-		.round_rate	= s5pc100_clk_arm_round_rate,
-	},
-};
-
-static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_D0_MASK;
-	ratio >>= S5PC100_CLKDIV0_D0_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_d0_bus = {
-	.name		= "dout_d0_bus",
-	.id		= -1,
-	.parent		= &clk_arm,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_d0_bus_get_rate,
-	},
-};
-
-static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_PCLKD0_MASK;
-	ratio >>= S5PC100_CLKDIV0_PCLKD0_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_pclkd0 = {
-	.name		= "dout_pclkd0",
-	.id		= -1,
-	.parent		= &clk_dout_d0_bus,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_pclkd0_get_rate,
-	},
-};
-
-static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_APLL2_MASK;
-	ratio >>= S5PC100_CLKDIV1_APLL2_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_apll2 = {
-	.name		= "dout_apll2",
-	.id		= -1,
-	.parent		= &clk_mout_apll.clk,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_apll2_get_rate,
-	},
-};
-
-/* MPLL */
-static struct clk *clk_src_mpll_list[] = {
-	[0] = &clk_fin_mpll,
-	[1] = &clk_fout_mpll,
-};
-
-static struct clksrc_sources clk_src_mpll = {
-	.sources	= clk_src_mpll_list,
-	.nr_sources	= ARRAY_SIZE(clk_src_mpll_list),
-};
-
-static struct clksrc_clk clk_mout_mpll = {
-	.clk = {
-		.name		= "mout_mpll",
-		.id		= -1,
-	},
-	.sources	= &clk_src_mpll,
-	.reg_src = { .reg = S5PC100_CLKSRC0, .shift = 4, .size = 1, },
-};
-
-static struct clk *clkset_am_list[] = {
-	[0] = &clk_mout_mpll.clk,
-	[1] = &clk_dout_apll2,
-};
-
-static struct clksrc_sources clk_src_am = {
-	.sources	= clkset_am_list,
-	.nr_sources	= ARRAY_SIZE(clkset_am_list),
-};
-
-static struct clksrc_clk clk_mout_am = {
-	.clk = {
-		.name		= "mout_am",
-		.id		= -1,
-	},
-	.sources	= &clk_src_am,
-	.reg_src = { .reg = S5PC100_CLKSRC0, .shift = 16, .size = 1, },
-};
-
-static unsigned long s5pc100_clk_dout_d1_bus_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
-
-	ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_D1_MASK;
-	ratio >>= S5PC100_CLKDIV1_D1_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_d1_bus = {
-	.name		= "dout_d1_bus",
-	.id		= -1,
-	.parent		= &clk_mout_am.clk,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_d1_bus_get_rate,
-	},
-};
-
-static struct clk *clkset_onenand_list[] = {
-	[0] = &clk_dout_d0_bus,
-	[1] = &clk_dout_d1_bus,
-};
-
-static struct clksrc_sources clk_src_onenand = {
-	.sources	= clkset_onenand_list,
-	.nr_sources	= ARRAY_SIZE(clkset_onenand_list),
-};
-
-static struct clksrc_clk clk_mout_onenand = {
-	.clk = {
-		.name		= "mout_onenand",
-		.id		= -1,
-	},
-	.sources	= &clk_src_onenand,
-	.reg_src = { .reg = S5PC100_CLKSRC0, .shift = 24, .size = 1, },
-};
-
-static unsigned long s5pc100_clk_dout_pclkd1_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
-
-	ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_PCLKD1_MASK;
-	ratio >>= S5PC100_CLKDIV1_PCLKD1_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_pclkd1 = {
-	.name		= "dout_pclkd1",
-	.id		= -1,
-	.parent		= &clk_dout_d1_bus,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_pclkd1_get_rate,
-	},
-};
-
-static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
-
-	ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_MPLL2_MASK;
-	ratio >>= S5PC100_CLKDIV1_MPLL2_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_mpll2 = {
-	.name		= "dout_mpll2",
-	.id		= -1,
-	.parent		= &clk_mout_am.clk,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_mpll2_get_rate,
-	},
-};
-
-static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
-
-	ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_CAM_MASK;
-	ratio >>= S5PC100_CLKDIV1_CAM_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_cam = {
-	.name		= "dout_cam",
-	.id		= -1,
-	.parent		= &clk_dout_mpll2,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_cam_get_rate,
-	},
-};
-
-static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	unsigned int ratio;
-
-	printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
-
-	ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_MPLL_MASK;
-	ratio >>= S5PC100_CLKDIV1_MPLL_SHIFT;
-
-	return rate / (ratio + 1);
-}
-
-static struct clk clk_dout_mpll = {
-	.name		= "dout_mpll",
-	.id		= -1,
-	.parent		= &clk_mout_am.clk,
-	.ops		= &(struct clk_ops) {
-		.get_rate	= s5pc100_clk_dout_mpll_get_rate,
-	},
-};
-
-/* EPLL */
-static struct clk clk_fout_epll = {
-	.name		= "fout_epll",
-	.id		= -1,
-};
-
-static struct clk *clk_src_epll_list[] = {
-	[0] = &clk_fin_epll,
-	[1] = &clk_fout_epll,
-};
-
-static struct clksrc_sources clk_src_epll = {
-	.sources	= clk_src_epll_list,
-	.nr_sources	= ARRAY_SIZE(clk_src_epll_list),
-};
-
-static struct clksrc_clk clk_mout_epll = {
-	.clk	= {
-		.name		= "mout_epll",
-		.id		= -1,
-	},
-	.sources = &clk_src_epll,
-	.reg_src = { .reg = S5PC100_CLKSRC0, .shift = 8, .size = 1, },
-};
-
-/* HPLL */
-static struct clk clk_fout_hpll = {
-	.name		= "fout_hpll",
-	.id		= -1,
-};
-
-static struct clk *clk_src_hpll_list[] = {
-	[0] = &clk_27m,
-	[1] = &clk_fout_hpll,
-};
-
-static struct clksrc_sources clk_src_hpll = {
-	.sources	= clk_src_hpll_list,
-	.nr_sources	= ARRAY_SIZE(clk_src_hpll_list),
-};
-
-static struct clksrc_clk clk_mout_hpll = {
-	.clk	= {
-		.name		= "mout_hpll",
-		.id		= -1,
-	},
-	.sources = &clk_src_hpll,
-	.reg_src = { .reg = S5PC100_CLKSRC0, .shift = 12, .size = 1, },
-};
-
-/* Peripherals */
-/*
- * The peripheral clocks are all controlled via clocksource followed
- * by an optional divider and gate stage. We currently roll this into
- * one clock which hides the intermediate clock from the mux.
- *
- * Note, the JPEG clock can only be an even divider...
- *
- * The scaler and LCD clocks depend on the S5PC100 version, and also
- * have a common parent divisor so are not included here.
- */
-
-static struct clk clk_iis_cd0 = {
-	.name		= "iis_cdclk0",
-	.id		= -1,
-};
-
-static struct clk clk_iis_cd1 = {
-	.name		= "iis_cdclk1",
-	.id		= -1,
-};
-
-static struct clk clk_iis_cd2 = {
-	.name		= "iis_cdclk2",
-	.id		= -1,
-};
-
-static struct clk clk_pcm_cd0 = {
-	.name		= "pcm_cdclk0",
-	.id		= -1,
-};
-
-static struct clk clk_pcm_cd1 = {
-	.name		= "pcm_cdclk1",
-	.id		= -1,
-};
-
-static struct clk *clkset_audio0_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll,
-	&clk_fin_epll,
-	&clk_iis_cd0,
-	&clk_pcm_cd0,
-	&clk_mout_hpll.clk,
-};
-
-static struct clksrc_sources clkset_audio0 = {
-	.sources	= clkset_audio0_list,
-	.nr_sources	= ARRAY_SIZE(clkset_audio0_list),
-};
-
-static struct clk *clkset_spi_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll2,
-	&clk_fin_epll,
-	&clk_mout_hpll.clk,
-};
-
-static struct clksrc_sources clkset_spi = {
-	.sources	= clkset_spi_list,
-	.nr_sources	= ARRAY_SIZE(clkset_spi_list),
-};
-
-static struct clk *clkset_uart_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll,
-};
-
-static struct clksrc_sources clkset_uart = {
-	.sources	= clkset_uart_list,
-	.nr_sources	= ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clk *clkset_audio1_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll,
-	&clk_fin_epll,
-	&clk_iis_cd1,
-	&clk_pcm_cd1,
-	&clk_mout_hpll.clk,
-};
-
-static struct clksrc_sources clkset_audio1 = {
-	.sources	= clkset_audio1_list,
-	.nr_sources	= ARRAY_SIZE(clkset_audio1_list),
-};
-
-static struct clk *clkset_audio2_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll,
-	&clk_fin_epll,
-	&clk_iis_cd2,
-	&clk_mout_hpll.clk,
-};
-
-static struct clksrc_sources clkset_audio2 = {
-	.sources	= clkset_audio2_list,
-	.nr_sources	= ARRAY_SIZE(clkset_audio2_list),
-};
-
-static struct clksrc_clk clksrc_audio[] = {
-	{
-		.clk	= {
-			.name		= "audio-bus",
-			.id		= 0,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK1_AUDIO0,
-			.enable		= s5pc100_sclk1_ctrl,
-		},
-		.sources = &clkset_audio0,
-		.reg_div = { .reg = S5PC100_CLKDIV4, .shift = 12, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC3, .shift = 12, .size = 3, },
-	}, {
-		.clk	= {
-			.name		= "audio-bus",
-			.id		= 1,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK1_AUDIO1,
-			.enable		= s5pc100_sclk1_ctrl,
-		},
-		.sources = &clkset_audio1,
-		.reg_div = { .reg = S5PC100_CLKDIV4, .shift = 16, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC3, .shift = 16, .size = 3, },
-	}, {
-		.clk	= {
-			.name		= "audio-bus",
-			.id		= 2,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK1_AUDIO2,
-			.enable		= s5pc100_sclk1_ctrl,
-		},
-		.sources = &clkset_audio2,
-		.reg_div = { .reg = S5PC100_CLKDIV4, .shift = 20, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC3, .shift = 20, .size = 3, },
-	},
-};
-
-static struct clk *clkset_spdif_list[] = {
-	&clksrc_audio[0].clk,
-	&clksrc_audio[1].clk,
-	&clksrc_audio[2].clk,
-};
-
-static struct clksrc_sources clkset_spdif = {
-	.sources	= clkset_spdif_list,
-	.nr_sources	= ARRAY_SIZE(clkset_spdif_list),
-};
-
-static struct clk *clkset_lcd_fimc_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll,
-	&clk_mout_hpll.clk,
-	&clk_vclk_54m,
-};
-
-static struct clksrc_sources clkset_lcd_fimc = {
-	.sources	= clkset_lcd_fimc_list,
-	.nr_sources	= ARRAY_SIZE(clkset_lcd_fimc_list),
-};
-
-static struct clk *clkset_mmc_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll,
-	&clk_fin_epll,
-	&clk_mout_hpll.clk ,
-};
-
-static struct clksrc_sources clkset_mmc = {
-	.sources	= clkset_mmc_list,
-	.nr_sources	= ARRAY_SIZE(clkset_mmc_list),
-};
-
-static struct clk *clkset_usbhost_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll,
-	&clk_mout_hpll.clk,
-	&clk_48m,
-};
-
-static struct clksrc_sources clkset_usbhost = {
-	.sources	= clkset_usbhost_list,
-	.nr_sources	= ARRAY_SIZE(clkset_usbhost_list),
-};
-
-static struct clksrc_clk clksrc_clks[] = {
-	{
-		.clk	= {
-			.name		= "spi_bus",
-			.id		= 0,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK0_SPI0,
-			.enable		= s5pc100_sclk0_ctrl,
-
-		},
-		.sources = &clkset_spi,
-		.reg_div = { .reg = S5PC100_CLKDIV2, .shift = 4, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC1, .shift = 4, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "spi_bus",
-			.id		= 1,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK0_SPI1,
-			.enable		= s5pc100_sclk0_ctrl,
-		},
-		.sources = &clkset_spi,
-		.reg_div = { .reg = S5PC100_CLKDIV2, .shift = 8, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC1, .shift = 8, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "spi_bus",
-			.id		= 2,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK0_SPI2,
-			.enable		= s5pc100_sclk0_ctrl,
-		},
-		.sources = &clkset_spi,
-		.reg_div = { .reg = S5PC100_CLKDIV2, .shift = 12, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC1, .shift = 12, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "uclk1",
-			.id		= -1,
-			.ctrlbit        = S5PC100_CLKGATE_SCLK0_UART,
-			.enable		= s5pc100_sclk0_ctrl,
-		},
-		.sources = &clkset_uart,
-		.reg_div = { .reg = S5PC100_CLKDIV2, .shift = 0, .size = 3, },
-		.reg_src = { .reg = S5PC100_CLKSRC1, .shift = 0, .size = 1, },
-	}, {
-		.clk	= {
-			.name		= "spdif",
-			.id		= -1,
-		},
-		.sources	= &clkset_spdif,
-		.reg_src = { .reg = S5PC100_CLKSRC3, .shift = 24, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "lcd",
-			.id		= -1,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK1_LCD,
-			.enable		= s5pc100_sclk1_ctrl,
-		},
-		.sources = &clkset_lcd_fimc,
-		.reg_div = { .reg = S5PC100_CLKDIV3, .shift = 12, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC2, .shift = 12, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "fimc",
-			.id		= 0,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK1_FIMC0,
-			.enable		= s5pc100_sclk1_ctrl,
-		},
-		.sources = &clkset_lcd_fimc,
-		.reg_div = { .reg = S5PC100_CLKDIV3, .shift = 16, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC2, .shift = 16, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "fimc",
-			.id		= 1,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK1_FIMC1,
-			.enable		= s5pc100_sclk1_ctrl,
-		},
-		.sources	= &clkset_lcd_fimc,
-		.reg_div = { .reg = S5PC100_CLKDIV3, .shift = 20, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC2, .shift = 20, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "fimc",
-			.id		= 2,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK1_FIMC2,
-			.enable		= s5pc100_sclk1_ctrl,
-		},
-		.sources = &clkset_lcd_fimc,
-		.reg_div = { .reg = S5PC100_CLKDIV3, .shift = 24, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC2, .shift = 24, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "mmc_bus",
-			.id		= 0,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK0_MMC0,
-			.enable		= s5pc100_sclk0_ctrl,
-		},
-		.sources = &clkset_mmc,
-		.reg_div = { .reg = S5PC100_CLKDIV3, .shift = 0, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC2, .shift = 0, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "mmc_bus",
-			.id		= 1,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK0_MMC1,
-			.enable		= s5pc100_sclk0_ctrl,
-		},
-		.sources = &clkset_mmc,
-		.reg_div = { .reg = S5PC100_CLKDIV3, .shift = 4, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC2, .shift = 4, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "mmc_bus",
-			.id		= 2,
-			.ctrlbit	= S5PC100_CLKGATE_SCLK0_MMC2,
-			.enable		= s5pc100_sclk0_ctrl,
-		},
-		.sources	= &clkset_mmc,
-		.reg_div = { .reg = S5PC100_CLKDIV3, .shift = 8, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC2, .shift = 8, .size = 2, },
-	}, {
-		.clk	= {
-			.name		= "usbhost",
-			.id		= -1,
-			.ctrlbit        = S5PC100_CLKGATE_SCLK0_USBHOST,
-			.enable		= s5pc100_sclk0_ctrl,
-		},
-		.sources = &clkset_usbhost,
-		.reg_div = { .reg = S5PC100_CLKDIV2, .shift = 20, .size = 4, },
-		.reg_src = { .reg = S5PC100_CLKSRC1, .shift = 20, .size = 2, },
-	}
-};
-
-/* Clock initialisation code */
-
-static struct clksrc_clk *init_parents[] = {
-	&clk_mout_apll,
-	&clk_mout_mpll,
-	&clk_mout_am,
-	&clk_mout_onenand,
-	&clk_mout_epll,
-	&clk_mout_hpll,
-};
-
-#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
-
-void __init_or_cpufreq s5pc100_setup_clocks(void)
-{
-	struct clk *xtal_clk;
-	unsigned long xtal;
-	unsigned long armclk;
-	unsigned long hclkd0;
-	unsigned long hclk;
-	unsigned long pclkd0;
-	unsigned long pclk;
-	unsigned long apll, mpll, epll, hpll;
-	unsigned int ptr;
-	u32 clkdiv0, clkdiv1;
-
-	printk(KERN_DEBUG "%s: registering clocks\n", __func__);
-
-	clkdiv0 = __raw_readl(S5PC100_CLKDIV0);
-	clkdiv1 = __raw_readl(S5PC100_CLKDIV1);
-
-	printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n", __func__, clkdiv0, clkdiv1);
-
-	xtal_clk = clk_get(NULL, "xtal");
-	BUG_ON(IS_ERR(xtal_clk));
-
-	xtal = clk_get_rate(xtal_clk);
-	clk_put(xtal_clk);
-
-	printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
-
-	apll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_APLL_CON));
-	mpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_MPLL_CON));
-	epll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_EPLL_CON));
-	hpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_HPLL_CON));
-
-	printk(KERN_INFO "S5PC100: Apll=%ld.%03ld Mhz, Mpll=%ld.%03ld Mhz"
-		", Epll=%ld.%03ld Mhz, Hpll=%ld.%03ld Mhz\n",
-		print_mhz(apll), print_mhz(mpll),
-		print_mhz(epll), print_mhz(hpll));
-
-	armclk = apll / GET_DIV(clkdiv0, S5PC100_CLKDIV0_APLL);
-	armclk = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_ARM);
-	hclkd0 = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_D0);
-	pclkd0 = hclkd0 / GET_DIV(clkdiv0, S5PC100_CLKDIV0_PCLKD0);
-	hclk = mpll / GET_DIV(clkdiv1, S5PC100_CLKDIV1_D1);
-	pclk = hclk / GET_DIV(clkdiv1, S5PC100_CLKDIV1_PCLKD1);
-
-	printk(KERN_INFO "S5PC100: ARMCLK=%ld.%03ld MHz, HCLKD0=%ld.%03ld MHz,"
-		" PCLKD0=%ld.%03ld MHz\n, HCLK=%ld.%03ld MHz,"
-		" PCLK=%ld.%03ld MHz\n",
-		print_mhz(armclk), print_mhz(hclkd0),
-		print_mhz(pclkd0), print_mhz(hclk), print_mhz(pclk));
-
-	clk_fout_apll.rate = apll;
-	clk_fout_mpll.rate = mpll;
-	clk_fout_epll.rate = epll;
-	clk_fout_hpll.rate = hpll;
-
-	clk_h.rate = hclk;
-	clk_p.rate = pclk;
-	clk_f.rate = armclk;
-
-	for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
-		s3c_set_clksrc(init_parents[ptr], true);
-
-	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_audio); ptr++)
-		s3c_set_clksrc(clksrc_audio + ptr, true);
-
-	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++)
-		s3c_set_clksrc(clksrc_clks + ptr, true);
-}
-
-static struct clk *clks[] __initdata = {
-	&clk_ext_xtal_mux,
-	&clk_dout_apll,
-	&clk_dout_d0_bus,
-	&clk_dout_pclkd0,
-	&clk_dout_apll2,
-	&clk_mout_apll.clk,
-	&clk_mout_mpll.clk,
-	&clk_mout_epll.clk,
-	&clk_mout_hpll.clk,
-	&clk_mout_am.clk,
-	&clk_dout_d1_bus,
-	&clk_mout_onenand.clk,
-	&clk_dout_pclkd1,
-	&clk_dout_mpll2,
-	&clk_dout_cam,
-	&clk_dout_mpll,
-	&clk_fout_epll,
-	&clk_iis_cd0,
-	&clk_iis_cd1,
-	&clk_iis_cd2,
-	&clk_pcm_cd0,
-	&clk_pcm_cd1,
-	&clk_arm,
-};
-
-void __init s5pc100_register_clocks(void)
-{
-	struct clk *clkp;
-	int ret;
-	int ptr;
-
-	for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
-		clkp = clks[ptr];
-		ret = s3c24xx_register_clock(clkp);
-		if (ret < 0) {
-			printk(KERN_ERR "Failed to register clock %s (%d)\n",
-			       clkp->name, ret);
-		}
-	}
-
-	s3c_register_clksrc(clksrc_audio, ARRAY_SIZE(clksrc_audio));
-	s3c_register_clksrc(clksrc_clks, ARRAY_SIZE(clksrc_clks));
-}
-- 
1.6.4

[PATCH 04/15] drivers: serial: S5PC100 serial driver cleanup

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Remove unnecessary Kconfig entry. S5PC100 has exactly the same driver as
> S3C6400/S3C6410/S5P6440.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  drivers/serial/Kconfig  |   16 ++++------------
>  drivers/serial/Makefile |    1 -
>  2 files changed, 4 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 5f3f03d..302836a 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -534,21 +534,13 @@ config SERIAL_S3C24A0
>  	  Serial port support for the Samsung S3C24A0 SoC
> 
>  config SERIAL_S3C6400
> -	tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support"
> -	depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 ||
> CPU_S5P6440)
> +	tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port
> support"
> +	depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 ||
> CPU_S5P6440 || CPU_S5PC100)
>  	select SERIAL_SAMSUNG_UARTS_4
>  	default y
>  	help
> -	  Serial port support for the Samsung S3C6400, S3C6410 and S5P6440
> -	  SoCs
> -
> -config SERIAL_S5PC100
> -	tristate "Samsung S5PC100 Serial port support"
> -	depends on SERIAL_SAMSUNG && CPU_S5PC100
> -	select SERIAL_SAMSUNG_UARTS_4
> -	default y
> -	help
> -	  Serial port support for the Samsung S5PC100 SoCs
> +	  Serial port support for the Samsung S3C6400, S3C6410, S5P6440
> +	  and S5PC100 SoCs
> 
>  config SERIAL_S5PV210
>  	tristate "Samsung S5PV210 Serial port support"
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 6aa4723..328f107 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -44,7 +44,6 @@ obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o
>  obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
>  obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
>  obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
> -obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
>  obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
>  obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
>  obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
> --

Ok, updated the list of supported devices.

Looks good.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 05/15] ARM: S5PC100: Use common functions for gpiolib implementation

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> GPIOlib helpers from plat-samsung already have functions for accessing
> 4bit gpio banks. This patch removes the duplicated functions from
> plat-s5pc1xx/gpiolib.c.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/plat-s5pc1xx/Kconfig   |    1 +
>  arch/arm/plat-s5pc1xx/gpiolib.c |   96
++++-----------------------------------
>  2 files changed, 10 insertions(+), 87 deletions(-)
> 
> diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
> index 79d3be7..98bbaf9 100644
> --- a/arch/arm/plat-s5pc1xx/Kconfig
> +++ b/arch/arm/plat-s5pc1xx/Kconfig
> @@ -19,6 +19,7 @@ config PLAT_S5PC1XX
>  	select S5P_GPIO_DRVSTR
>  	select S3C_GPIO_CFG_S3C24XX
>  	select S3C_GPIO_CFG_S3C64XX
> +	select SAMSUNG_GPIOLIB_4BIT
>  	help
>  	  Base platform code for any Samsung S5PC1XX device
> 
> diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c
b/arch/arm/plat-s5pc1xx/gpiolib.c
> index 1ffc57a..5a97a8f 100644
> --- a/arch/arm/plat-s5pc1xx/gpiolib.c
> +++ b/arch/arm/plat-s5pc1xx/gpiolib.c
> @@ -61,74 +61,6 @@
>   * L3	8	4Bit	None
>   */
> 
> -#define OFF_GPCON	(0x00)
> -#define OFF_GPDAT	(0x04)
> -
> -#define con_4bit_shift(__off) ((__off) * 4)
> -
> -#if 1
> -#define gpio_dbg(x...) do { } while (0)
> -#else
> -#define gpio_dbg(x...) printk(KERN_DEBUG x)
> -#endif
> -
> -/* The s5pc1xx_gpiolib routines are to control the gpio banks where
> - * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
> - * following example:
> - *
> - * base + 0x00: Control register, 4 bits per gpio
> - *	        gpio n: 4 bits starting at (4*n)
> - *		0000 = input, 0001 = output, others mean special-function
> - * base + 0x04: Data register, 1 bit per gpio
> - *		bit n: data bit n
> - *
> - * Note, since the data register is one bit per gpio and is at base + 0x4
> - * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
> - * the output.
> - */
> -
> -static int s5pc1xx_gpiolib_input(struct gpio_chip *chip, unsigned offset)
> -{
> -	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
> -	void __iomem *base = ourchip->base;
> -	unsigned long con;
> -
> -	con = __raw_readl(base + OFF_GPCON);
> -	con &= ~(0xf << con_4bit_shift(offset));
> -	__raw_writel(con, base + OFF_GPCON);
> -
> -	gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
> -
> -	return 0;
> -}
> -
> -static int s5pc1xx_gpiolib_output(struct gpio_chip *chip,
> -				       unsigned offset, int value)
> -{
> -	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
> -	void __iomem *base = ourchip->base;
> -	unsigned long con;
> -	unsigned long dat;
> -
> -	con = __raw_readl(base + OFF_GPCON);
> -	con &= ~(0xf << con_4bit_shift(offset));
> -	con |= 0x1 << con_4bit_shift(offset);
> -
> -	dat = __raw_readl(base + OFF_GPDAT);
> -	if (value)
> -		dat |= 1 << offset;
> -	else
> -		dat &= ~(1 << offset);
> -
> -	__raw_writel(dat, base + OFF_GPDAT);
> -	__raw_writel(con, base + OFF_GPCON);
> -	__raw_writel(dat, base + OFF_GPDAT);
> -
> -	gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
> -
> -	return 0;
> -}
> -
>  static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int
offset)
>  {
>  	return S3C_IRQ_GPIO(chip->base + offset);

The following is from 137th line in the same file.
static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int
offset)
{
...

Really need above function in this file?
How about handling gpio external interrupt to other file?

And the following is from 175th line in the same file.
static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
	{
		.base	= S5PC100_GPA0_BASE,
		.config	= &gpio_cfg,
		.chip	= {
			.base	= S5PC100_GPA0(0),
			.ngpio	= S5PC100_GPIO_A0_NR,
			.label	= "GPA0",
		},
...

1. the &gpio_cfg is default, it means any null config setting to gpio_cfg.

2. avoid a whole pile of defines in the plat-s5pc1xx/include/plat/regs-gpio.h
The S5PC100_GPxx_BASE defines look like they could be defined as offset from
a base and each bank given its own index. 

> @@ -452,11 +384,8 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
>  extern struct irq_chip s5pc1xx_gpioint;
>  extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc
*desc);
> 
> -static __init void s5pc1xx_gpiolib_link(struct s3c_gpio_chip *chip)
> +static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
>  {
> -	chip->chip.direction_input = s5pc1xx_gpiolib_input;
> -	chip->chip.direction_output = s5pc1xx_gpiolib_output;
> -	chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
> 
>  	/* Interrupt */
>  	if (chip->config == &gpio_cfg) {
> @@ -475,26 +404,19 @@ static __init void s5pc1xx_gpiolib_link(struct
> s3c_gpio_chip *chip)
>  		chip->chip.to_irq = s5pc1xx_gpiolib_to_eint;
>  }
> 
> -static __init void s5pc1xx_gpiolib_add(struct s3c_gpio_chip *chips,
> -				       int nr_chips,
> -				       void (*fn)(struct s3c_gpio_chip *))
> -{
> -	for (; nr_chips > 0; nr_chips--, chips++) {
> -		if (fn)
> -			(fn)(chips);
> -		s3c_gpiolib_add(chips);
> -	}
> -}
> -
>  static __init int s5pc1xx_gpiolib_init(void)
>  {
> -	struct s3c_gpio_chip *chips;
> +	struct s3c_gpio_chip *chip;
>  	int nr_chips;
> 
> -		chips = s5pc100_gpio_chips;
> -		nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
> +	chip = s5pc100_gpio_chips;
> +	nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
> +
> +	for (; nr_chips > 0; nr_chips--, chip++)
> +		s5pc100_gpiolib_link(chip);
> 
> -	s5pc1xx_gpiolib_add(chips, nr_chips, s5pc1xx_gpiolib_link);
> +	samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
> +				       ARRAY_SIZE(s5pc100_gpio_chips));

nr_chips?

>  	/* Interrupt */
>  	set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler);
> 
> --


Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 06/15] ARM: S5PC100: Move gpio support from plat-s5pc1xx to mach-s5pc100

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Move gpio-lib support from plat-s5pc1xx to mach-s5pc100. Only basic gpio
> functionality is now supported. Gpio interrupts are disabled temporarly
> and will be added later.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/mach-s5pc100/Makefile                     |    2 +-
>  .../gpiolib.c => mach-s5pc100/gpio.c}              |   11 +++++++----
>  .../plat => mach-s5pc100/include/mach}/regs-gpio.h |    0
>  arch/arm/mach-s5pc100/mach-smdkc100.c              |    1 -
>  arch/arm/plat-s5pc1xx/Makefile                     |    3 +--
>  5 files changed, 9 insertions(+), 8 deletions(-)
>  rename arch/arm/{plat-s5pc1xx/gpiolib.c => mach-s5pc100/gpio.c} (99%)
>  rename arch/arm/{plat-s5pc1xx/include/plat =>
mach-s5pc100/include/mach}/regs-
> gpio.h (100%)
> 
> diff --git a/arch/arm/mach-s5pc100/Makefile
b/arch/arm/mach-s5pc100/Makefile
> index 809ff10..e1afdbf 100644
> --- a/arch/arm/mach-s5pc100/Makefile
> +++ b/arch/arm/mach-s5pc100/Makefile
> @@ -11,7 +11,7 @@ obj-				:=
> 
>  # Core support for S5PC100 system
> 
> -obj-$(CONFIG_CPU_S5PC100)	+= cpu.o
> +obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpio.o

How about changing gpiolib like gpiolib.c of mach-s3c64xx/ and mach-s5pv210/.
I will change the file name of mach-s5p6440/ also.

> 
>  # Helper and device support
> 
> diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/mach-s5pc100/gpio.c
> similarity index 99%
> rename from arch/arm/plat-s5pc1xx/gpiolib.c
> rename to arch/arm/mach-s5pc100/gpio.c
> index 5a97a8f..c8e8336 100644
> --- a/arch/arm/plat-s5pc1xx/gpiolib.c
> +++ b/arch/arm/mach-s5pc100/gpio.c
> @@ -17,11 +17,11 @@
>  #include <linux/gpio.h>
> 
>  #include <mach/map.h>
> +#include <mach/regs-gpio.h>
> 
>  #include <plat/gpio-core.h>
>  #include <plat/gpio-cfg.h>
>  #include <plat/gpio-cfg-helpers.h>
> -#include <plat/regs-gpio.h>
> 
>  /* S5PC100 GPIO bank summary:
>   *
> @@ -61,6 +61,7 @@
>   * L3	8	4Bit	None
>   */
> 
> +#if 0
>  static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int
offset)
>  {
>  	return S3C_IRQ_GPIO(chip->base + offset);
> @@ -84,7 +85,7 @@ static int s5pc1xx_gpiolib_to_eint(struct gpio_chip
*chip,
> unsigned int offset)
>  		return IRQ_EINT(24 + offset);
>  	return -EINVAL;
>  }
> -
> +#endif
>  static struct s3c_gpio_cfg gpio_cfg = {
>  	.set_config	= s3c_gpio_setcfg_s3c64xx_4bit,
>  	.set_pull	= s3c_gpio_setpull_updown,
> @@ -386,7 +387,7 @@ extern void s5pc1xx_irq_gpioint_handler(unsigned int
irq,
> struct irq_desc *desc)
> 
>  static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
>  {
> -
> +#if 0
>  	/* Interrupt */
>  	if (chip->config == &gpio_cfg) {
>  		int i, irq;
> @@ -402,6 +403,7 @@ static __init void s5pc100_gpiolib_link(struct
s3c_gpio_chip
> *chip)
>  		}
>  	} else if (chip->config == &gpio_cfg_eint)
>  		chip->chip.to_irq = s5pc1xx_gpiolib_to_eint;
> +#endif
>  }
> 
>  static __init int s5pc1xx_gpiolib_init(void)
> @@ -417,9 +419,10 @@ static __init int s5pc1xx_gpiolib_init(void)
> 
>  	samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
>  				       ARRAY_SIZE(s5pc100_gpio_chips));
> +#if 0
>  	/* Interrupt */
>  	set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler);
> -
> +#endif
>  	return 0;
>  }
>  core_initcall(s5pc1xx_gpiolib_init);

Is there any way to avoid compile compatibility without #if 0?

> diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h
b/arch/arm/mach-
> s5pc100/include/mach/regs-gpio.h
> similarity index 100%
> rename from arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h
> rename to arch/arm/mach-s5pc100/include/mach/regs-gpio.h
> diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-
> s5pc100/mach-smdkc100.c
> index ae3c52c..bfe67db 100644
> --- a/arch/arm/mach-s5pc100/mach-smdkc100.cgg
> +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
> @@ -35,7 +35,6 @@
> 
>  #include <plat/regs-serial.h>
>  #include <plat/gpio-cfg.h>
> -#include <plat/regs-gpio.h>
> 
>  #include <plat/clock.h>
>  #include <plat/devs.h>
> diff --git a/arch/arm/plat-s5pc1xx/Makefile
b/arch/arm/plat-s5pc1xx/Makefile
> index 66a8f3e..540fca5 100644
> --- a/arch/arm/plat-s5pc1xx/Makefile
> +++ b/arch/arm/plat-s5pc1xx/Makefile
> @@ -13,9 +13,8 @@ obj-				:=
> 
>  obj-y				+= dev-uart.o
>  obj-y				+= cpu.o
> -obj-y				+= irq.o irq-gpio.o irq-eint.o
> +obj-y				+= irq.o
>  obj-y				+= clock.o
> -obj-y				+= gpiolib.o
> 
>  # CPU support
> 
> --


Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 07/15] ARM: S5PC100: rename gpio registers from s5pc1xx to s5pc100

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> This patch renames gpio related registers from s5pc1xx to s5pc100 to
> better match the plat-s5p framework style.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/mach-s5pc100/include/mach/gpio.h      |   82
++++++++++++------------
>  arch/arm/mach-s5pc100/include/mach/regs-gpio.h |    8 +-
>  2 files changed, 45 insertions(+), 45 deletions(-)
> 
> diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-
> s5pc100/include/mach/gpio.h
> index 2c4cbe8..fb2f40a 100644
> --- a/arch/arm/mach-s5pc100/include/mach/gpio.h
> +++ b/arch/arm/mach-s5pc100/include/mach/gpio.h

It would be nice that to add following for avoid duplication including.

#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H __FILE__

> @@ -65,50 +65,50 @@
>   * change from one gpio bank to another can be caught.
>  */
> 
> -#define S5PC1XX_GPIO_NEXT(__gpio) \
> +#define S5PC100_GPIO_NEXT(__gpio) \
>  	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
> 
>  enum s3c_gpio_number {

How about s5p_gpio_number instead of s3c_...

>  	S5PC100_GPIO_A0_START	= 0,
> -	S5PC100_GPIO_A1_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A0),
> -	S5PC100_GPIO_B_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A1),
> -	S5PC100_GPIO_C_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_B),
> -	S5PC100_GPIO_D_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_C),
> -	S5PC100_GPIO_E0_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_D),
> -	S5PC100_GPIO_E1_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E0),
> -	S5PC100_GPIO_F0_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E1),
> -	S5PC100_GPIO_F1_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F0),
> -	S5PC100_GPIO_F2_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F1),
> -	S5PC100_GPIO_F3_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F2),
> -	S5PC100_GPIO_G0_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F3),
> -	S5PC100_GPIO_G1_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G0),
> -	S5PC100_GPIO_G2_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G1),
> -	S5PC100_GPIO_G3_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G2),
> -	S5PC100_GPIO_H0_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G3),
> -	S5PC100_GPIO_H1_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H0),
> -	S5PC100_GPIO_H2_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H1),
> -	S5PC100_GPIO_H3_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H2),
> -	S5PC100_GPIO_I_START	= S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H3),
> -	S5PC100_GPIO_J0_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_I),
> -	S5PC100_GPIO_J1_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J0),
> -	S5PC100_GPIO_J2_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J1),
> -	S5PC100_GPIO_J3_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J2),
> -	S5PC100_GPIO_J4_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J3),
> -	S5PC100_GPIO_K0_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J4),
> -	S5PC100_GPIO_K1_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K0),
> -	S5PC100_GPIO_K2_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K1),
> -	S5PC100_GPIO_K3_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K2),
> -	S5PC100_GPIO_L0_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K3),
> -	S5PC100_GPIO_L1_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L0),
> -	S5PC100_GPIO_L2_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L1),
> -	S5PC100_GPIO_L3_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L2),
> -	S5PC100_GPIO_L4_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L3),
> -	S5PC100_GPIO_MP00_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L4),
> -	S5PC100_GPIO_MP01_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP00),
> -	S5PC100_GPIO_MP02_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP01),
> -	S5PC100_GPIO_MP03_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP02),
> -	S5PC100_GPIO_MP04_START	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP03),
> -	S5PC100_GPIO_END	=
> S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP04),
> +	S5PC100_GPIO_A1_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_A0),
> +	S5PC100_GPIO_B_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_A1),
> +	S5PC100_GPIO_C_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_B),
> +	S5PC100_GPIO_D_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_C),
> +	S5PC100_GPIO_E0_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_D),
> +	S5PC100_GPIO_E1_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_E0),
> +	S5PC100_GPIO_F0_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_E1),
> +	S5PC100_GPIO_F1_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_F0),
> +	S5PC100_GPIO_F2_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_F1),
> +	S5PC100_GPIO_F3_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_F2),
> +	S5PC100_GPIO_G0_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_F3),
> +	S5PC100_GPIO_G1_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_G0),
> +	S5PC100_GPIO_G2_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_G1),
> +	S5PC100_GPIO_G3_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_G2),
> +	S5PC100_GPIO_H0_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_G3),
> +	S5PC100_GPIO_H1_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_H0),
> +	S5PC100_GPIO_H2_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_H1),
> +	S5PC100_GPIO_H3_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_H2),
> +	S5PC100_GPIO_I_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H3),
> +	S5PC100_GPIO_J0_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_I),
> +	S5PC100_GPIO_J1_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_J0),
> +	S5PC100_GPIO_J2_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_J1),
> +	S5PC100_GPIO_J3_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_J2),
> +	S5PC100_GPIO_J4_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_J3),
> +	S5PC100_GPIO_K0_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_J4),
> +	S5PC100_GPIO_K1_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_K0),
> +	S5PC100_GPIO_K2_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_K1),
> +	S5PC100_GPIO_K3_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_K2),
> +	S5PC100_GPIO_L0_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_K3),
> +	S5PC100_GPIO_L1_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_L0),
> +	S5PC100_GPIO_L2_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_L1),
> +	S5PC100_GPIO_L3_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_L2),
> +	S5PC100_GPIO_L4_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_L3),
> +	S5PC100_GPIO_MP00_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_L4),
> +	S5PC100_GPIO_MP01_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_MP00),
> +	S5PC100_GPIO_MP02_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_MP01),
> +	S5PC100_GPIO_MP03_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_MP02),
> +	S5PC100_GPIO_MP04_START	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_MP03),
> +	S5PC100_GPIO_END	=
> S5PC100_GPIO_NEXT(S5PC100_GPIO_MP04),
>  };
> 
>  /* S5PC100 GPIO number definitions. */
> @@ -153,7 +153,7 @@ enum s3c_gpio_number {
>  #define S5PC100_MP04(_nr)	(S5PC100_GPIO_MP04_START + (_nr))
>  #define S5PC100_MP05(_nr)	(S5PC100_GPIO_MP05_START + (_nr))
> 
> -/* It used the end of the S5PC1XX gpios */
> +/* It used the end of the S5PC100 gpios */
>  #define S3C_GPIO_END		S5PC100_GPIO_END
> 
>  /* define the number of gpios we need to the one after the MP04() range */

Last is MP04 or MP05?

In the s3c_gpio_number, MP04 is last one.
And there is S5PC100_MP05 definition also.

> diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
b/arch/arm/mach-
> s5pc100/include/mach/regs-gpio.h
> index 43c7bc8..6866691 100644
> --- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
> +++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
> @@ -3,11 +3,11 @@
>   * Copyright 2009 Samsung Electronics Co.
>   *      Byungho Min <bhmin@samsung.com>
>   *
> - * S5PC1XX - GPIO register definitions
> + * S5PC100 - GPIO register definitions
>   */
> 
> -#ifndef __ASM_PLAT_S5PC1XX_REGS_GPIO_H
> -#define __ASM_PLAT_S5PC1XX_REGS_GPIO_H __FILE__
> +#ifndef __ASM_MACH_S5PC100_REGS_GPIO_H
> +#define __ASM_MACH_S5PC100_REGS_GPIO_H __FILE__
> 
>  #include <mach/map.h>
> 
> @@ -66,5 +66,5 @@
>  #define S5PC100_GPx_OUTPUT(__gpio)	(0x1 << ((__gpio) * 4))
>  #define S5PC100_GPx_CONMASK(__gpio)	(0xf << ((__gpio) * 4))
> 
> -#endif /* __ASM_PLAT_S5PC1XX_REGS_GPIO_H */
> +#endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */
> 
> --

It is better that above chages is in the your previous patch.
Because the file already moved in the [PATCH 06/15].

And how about __ASM_ARCH_REGS_GPIO_H instead of __ASM_MACH_S5PC100_xxx
That makes unitified look and feel for a same Samsung SoC.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 01/15] ARM: Samsung: fix broken timer irq base

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Timer interrupts range was defined as 43-47, what overlaps with VIC0 range
> (32-64). This was caused probably by a typo while the common interrupts
> definition was refactored. This patch moves timer interrupt range to safe
> area of 11-15 (just before uart range).
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/plat-s5p/include/plat/irqs.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-
> s5p/include/plat/irqs.h
> index 42e757f..9ff3d71 100644
> --- a/arch/arm/plat-s5p/include/plat/irqs.h
> +++ b/arch/arm/plat-s5p/include/plat/irqs.h
> @@ -79,7 +79,7 @@
>  #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
>  #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
> 
> -#define S5P_TIMER_IRQ(x)	S5P_IRQ(11 + (x))
> +#define S5P_TIMER_IRQ(x)	(11 + (x))
> 
>  #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
>  #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
> --

Ok, you're right.

Had to move to ISA IRQ space not VIC area for avoid conflicting.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 10/15] ARM: S5PC100: Move sdhci helpers from plat-s5pc1xx to mach-s5pc100

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Move sdhci helpers from plat-s5pc1xx to mach-s5pc100.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/mach-s5pc100/Kconfig                      |   11 +++++++++++
>  arch/arm/mach-s5pc100/Makefile                     |    1 +
>  .../setup-sdhci-gpio.c                             |    4 ++--
>  arch/arm/plat-s5pc1xx/Kconfig                      |    5 -----
>  arch/arm/plat-s5pc1xx/Makefile                     |    1 -
>  5 files changed, 14 insertions(+), 8 deletions(-)
>  rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/setup-sdhci-gpio.c (95%)
> 
> diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
> index 9b10541..176c9a1 100644
> --- a/arch/arm/mach-s5pc100/Kconfig
> +++ b/arch/arm/mach-s5pc100/Kconfig
> @@ -28,6 +28,17 @@ config S5PC100_SETUP_I2C1
>  	help
>  	  Common setup code for i2c bus 1.
> 
> +config S5PC100_SETUP_SDHCI
> +        bool

Please use double tab instead of white space.

> +        select S5PC100_SETUP_SDHCI_GPIO

Same.

> +        help

Same.

> +          Internal helper functions for S5PC100 based SDHCI systems

2 tabs and 2 white space.

> +
> +config S5PC100_SETUP_SDHCI_GPIO
> +	bool
> +	help
> +	  Common setup code for SDHCI gpio.
> +
>  config MACH_SMDKC100
>  	bool "SMDKC100"
>  	select CPU_S5PC100
> diff --git a/arch/arm/mach-s5pc100/Makefile
b/arch/arm/mach-s5pc100/Makefile
> index 741fba0..1e3180e 100644
> --- a/arch/arm/mach-s5pc100/Makefile
> +++ b/arch/arm/mach-s5pc100/Makefile
> @@ -19,6 +19,7 @@ obj-$(CONFIG_CPU_S5PC100)	+= setup-i2c0.o
>  obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)	+= setup-fb-24bpp.o
>  obj-$(CONFIG_S5PC100_SETUP_I2C1)	+= setup-i2c1.o
>  obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o

How about fix the above blank with tab.

> +obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
> 
>  # machine support
>  obj-$(CONFIG_MACH_SMDKC100)	+= mach-smdkc100.o
> diff --git a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c b/arch/arm/mach-
> s5pc100/setup-sdhci-gpio.c
> similarity index 95%
> rename from arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c
> rename to arch/arm/mach-s5pc100/setup-sdhci-gpio.c
> index 185c894..7769c76 100644
> --- a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c
> +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
> @@ -1,8 +1,8 @@
> -/* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c
> +/* linux/arch/arm/plat-s5pc100/setup-sdhci-gpio.c
>   *
>   * Copyright 2009 Samsung Eletronics
>   *
> - * S5PC1XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
> + * S5PC100 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
>   *
>   * This program is free software; you can redistribute it and/or modify
>   * it under the terms of the GNU General Public License version 2 as
> diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
> index c7bd2bb..ab58758 100644
> --- a/arch/arm/plat-s5pc1xx/Kconfig
> +++ b/arch/arm/plat-s5pc1xx/Kconfig
> @@ -39,9 +39,4 @@ config CPU_S5PC100_CLOCK
> 
>  # platform specific device setup
> 
> -config S5PC1XX_SETUP_SDHCI_GPIO
> -	bool
> -	help
> -	  Common setup code for SDHCI gpio.
> -
>  endif
> diff --git a/arch/arm/plat-s5pc1xx/Makefile
b/arch/arm/plat-s5pc1xx/Makefile
> index 9ce6409..d490543 100644
> --- a/arch/arm/plat-s5pc1xx/Makefile
> +++ b/arch/arm/plat-s5pc1xx/Makefile
> @@ -23,4 +23,3 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK)	+= s5pc100-clock.o
> 
>  # Device setup
> 
> -obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
> --

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 09/15] ARM: S5PC100: Move i2c helpers from plat-s5pc1xx to mach-s5pc100

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Move i2c helpers from plat-s5pc1xx to mach-s5pc100.

It would be nice that separate submitting this patch from c100 clean up
with your [PATCH 2/3] ARM: Samsung: move common I2C0 device helpers to
machine directories.

1. Moving common I2C0 device helpers to each mach directory
2. And then C100's I2Cx moving.

> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/mach-s5pc100/Kconfig                      |    8 ++++++--
>  arch/arm/mach-s5pc100/Makefile                     |    2 ++
>  .../{plat-s5pc1xx => mach-s5pc100}/setup-i2c0.c    |    4 ++--
>  .../{plat-s5pc1xx => mach-s5pc100}/setup-i2c1.c    |    4 ++--
>  arch/arm/plat-s5pc1xx/Kconfig                      |   14 --------------
>  arch/arm/plat-s5pc1xx/Makefile                     |    2 --
>  6 files changed, 12 insertions(+), 22 deletions(-)
>  rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/setup-i2c0.c (89%)
>  rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/setup-i2c1.c (89%)
> 
> diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
> index b24c66d..9b10541 100644
> --- a/arch/arm/mach-s5pc100/Kconfig
> +++ b/arch/arm/mach-s5pc100/Kconfig
> @@ -23,6 +23,11 @@ config S5PC100_SETUP_SDHCI
>          help
>            Internal helper functions for S5PC100 based SDHCI systems
> 
> +config S5PC100_SETUP_I2C1
> +	bool
> +	help
> +	  Common setup code for i2c bus 1.
> +
>  config MACH_SMDKC100
>  	bool "SMDKC100"
>  	select CPU_S5PC100
> @@ -31,9 +36,8 @@ config MACH_SMDKC100
>  	select S3C_DEV_HSMMC
>  	select S3C_DEV_HSMMC1
>  	select S3C_DEV_HSMMC2
> -	select S5PC1XX_SETUP_I2C0
> -	select S5PC1XX_SETUP_I2C1
>  	select S5PC100_SETUP_FB_24BPP
> +	select S5PC100_SETUP_I2C1
>  	select S5PC100_SETUP_SDHCI
>  	help
>  	  Machine support for the Samsung SMDKC100
> diff --git a/arch/arm/mach-s5pc100/Makefile
b/arch/arm/mach-s5pc100/Makefile
> index ccf0dca..741fba0 100644
> --- a/arch/arm/mach-s5pc100/Makefile
> +++ b/arch/arm/mach-s5pc100/Makefile
> @@ -12,10 +12,12 @@ obj-				:=
>  # Core support for S5PC100 system
> 
>  obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpio.o
> +obj-$(CONFIG_CPU_S5PC100)	+= setup-i2c0.o
> 
>  # Helper and device support
> 
>  obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)	+= setup-fb-24bpp.o
> +obj-$(CONFIG_S5PC100_SETUP_I2C1)	+= setup-i2c1.o
>  obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
> 
>  # machine support
> diff --git a/arch/arm/plat-s5pc1xx/setup-i2c0.c
b/arch/arm/mach-s5pc100/setup-
> i2c0.c
> similarity index 89%
> rename from arch/arm/plat-s5pc1xx/setup-i2c0.c
> rename to arch/arm/mach-s5pc100/setup-i2c0.c
> index 5e4a7c3..dd3174e 100644
> --- a/arch/arm/plat-s5pc1xx/setup-i2c0.c
> +++ b/arch/arm/mach-s5pc100/setup-i2c0.c
> @@ -1,9 +1,9 @@
> -/* linux/arch/arm/plat-s5pc1xx/setup-i2c0.c
> +/* linux/arch/arm/mach-s5pc100/setup-i2c0.c
>   *
>   * Copyright 2009 Samsung Electronics Co.
>   *	Byungho Min <bhmin@samsung.com>
>   *
> - * Base S5PC1XX I2C bus 0 gpio configuration
> + * Base S5PC100 I2C bus 0 gpio configuration
>   *
>   * Based on plat-s3c64xx/setup-i2c0.c
>   *
> diff --git a/arch/arm/plat-s5pc1xx/setup-i2c1.c
b/arch/arm/mach-s5pc100/setup-
> i2c1.c
> similarity index 89%
> rename from arch/arm/plat-s5pc1xx/setup-i2c1.c
> rename to arch/arm/mach-s5pc100/setup-i2c1.c
> index a0a8b4a..d1fec26 100644
> --- a/arch/arm/plat-s5pc1xx/setup-i2c1.c
> +++ b/arch/arm/mach-s5pc100/setup-i2c1.c
> @@ -1,9 +1,9 @@
> -/* linux/arch/arm/plat-s3c64xx/setup-i2c1.c
> +/* linux/arch/arm/mach-s5pc100/setup-i2c1.c
>   *
>   * Copyright 2009 Samsung Electronics Co.
>   *	Byungho Min <bhmin@samsung.com>
>   *
> - * Base S5PC1XX I2C bus 1 gpio configuration
> + * Base S5PC100 I2C bus 1 gpio configuration
>   *
>   * Based on plat-s3c64xx/setup-i2c1.c
>   *
> diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
> index 708f7a0..c7bd2bb 100644
> --- a/arch/arm/plat-s5pc1xx/Kconfig
> +++ b/arch/arm/plat-s5pc1xx/Kconfig
> @@ -39,20 +39,6 @@ config CPU_S5PC100_CLOCK
> 
>  # platform specific device setup
> 
> -config S5PC1XX_SETUP_I2C0
> -	bool
> -	default y
> -	help
> -	  Common setup code for i2c bus 0.
> -
> -	  Note, currently since i2c0 is always compiled, this setup helper
> -	  is always compiled with it.
> -
> -config S5PC1XX_SETUP_I2C1
> -	bool
> -	help
> -	  Common setup code for i2c bus 1.
> -
>  config S5PC1XX_SETUP_SDHCI_GPIO
>  	bool
>  	help
> diff --git a/arch/arm/plat-s5pc1xx/Makefile
b/arch/arm/plat-s5pc1xx/Makefile
> index a5b90c0..9ce6409 100644
> --- a/arch/arm/plat-s5pc1xx/Makefile
> +++ b/arch/arm/plat-s5pc1xx/Makefile
> @@ -23,6 +23,4 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK)	+= s5pc100-clock.o
> 
>  # Device setup
> 
> -obj-$(CONFIG_S5PC1XX_SETUP_I2C0) += setup-i2c0.o
> -obj-$(CONFIG_S5PC1XX_SETUP_I2C1) += setup-i2c1.o
>  obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
> --
Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 02/15] ARM: Samsung: move common I2C0 device helpers to machine directories

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---

See your new 2nd patch of 'Common plat-s5p fixes patch set'.

>  arch/arm/mach-s5p6440/Makefile                   |    1 +
>  arch/arm/{plat-s5p => mach-s5p6440}/setup-i2c0.c |    2 +-
>  arch/arm/mach-s5p6442/Makefile                   |    1 +
>  arch/arm/{plat-s5p => mach-s5p6442}/setup-i2c0.c |    2 +-
>  arch/arm/mach-s5pv210/Makefile                   |    1 +
>  arch/arm/{plat-s5p => mach-s5pv210}/setup-i2c0.c |   10 +++++-----
>  arch/arm/plat-s5p/Makefile                       |    1 -
>  7 files changed, 10 insertions(+), 8 deletions(-)
>  copy arch/arm/{plat-s5p => mach-s5p6440}/setup-i2c0.c (92%)
>  copy arch/arm/{plat-s5p => mach-s5p6442}/setup-i2c0.c (92%)
>  rename arch/arm/{plat-s5p => mach-s5pv210}/setup-i2c0.c (69%)
> 
> diff --git a/arch/arm/mach-s5p6440/Makefile
b/arch/arm/mach-s5p6440/Makefile
> index 1ad894b..9646cdf 100644
> --- a/arch/arm/mach-s5p6440/Makefile
> +++ b/arch/arm/mach-s5p6440/Makefile
> @@ -13,6 +13,7 @@ obj-				:=
>  # Core support for S5P6440 system
> 
>  obj-$(CONFIG_CPU_S5P6440)	+= cpu.o init.o clock.o gpio.o
> +obj-$(CONFIG_CPU_S5P6440)	+= setup-i2c0.o
> 
>  # machine support
> 
> diff --git a/arch/arm/plat-s5p/setup-i2c0.c
b/arch/arm/mach-s5p6440/setup-i2c0.c
> similarity index 92%
> copy from arch/arm/plat-s5p/setup-i2c0.c
> copy to arch/arm/mach-s5p6440/setup-i2c0.c
> index 67a66e0..69e8a66 100644
> --- a/arch/arm/plat-s5p/setup-i2c0.c
> +++ b/arch/arm/mach-s5p6440/setup-i2c0.c
> @@ -1,4 +1,4 @@
> -/* linux/arch/arm/plat-s5p/setup-i2c0.c
> +/* linux/arch/arm/mach-s5p6440/setup-i2c0.c
>   *
>   * Copyright (c) 2009 Samsung Electronics Co., Ltd.
>   *		http://www.samsung.com/
> diff --git a/arch/arm/mach-s5p6442/Makefile
b/arch/arm/mach-s5p6442/Makefile
> index dde39a6..4942c14 100644
> --- a/arch/arm/mach-s5p6442/Makefile
> +++ b/arch/arm/mach-s5p6442/Makefile
> @@ -13,6 +13,7 @@ obj-				:=
>  # Core support for S5P6442 system
> 
>  obj-$(CONFIG_CPU_S5P6442)	+= cpu.o init.o clock.o
> +obj-$(CONFIG_CPU_S5P6442)	+= setup-i2c0.o
> 
>  # machine support
> 
> diff --git a/arch/arm/plat-s5p/setup-i2c0.c
b/arch/arm/mach-s5p6442/setup-i2c0.c
> similarity index 92%
> copy from arch/arm/plat-s5p/setup-i2c0.c
> copy to arch/arm/mach-s5p6442/setup-i2c0.c
> index 67a66e0..662695d 100644
> --- a/arch/arm/plat-s5p/setup-i2c0.c
> +++ b/arch/arm/mach-s5p6442/setup-i2c0.c
> @@ -1,4 +1,4 @@
> -/* linux/arch/arm/plat-s5p/setup-i2c0.c
> +/* linux/arch/arm/mach-s5p6442/setup-i2c0.c
>   *
>   * Copyright (c) 2009 Samsung Electronics Co., Ltd.
>   *		http://www.samsung.com/
> diff --git a/arch/arm/mach-s5pv210/Makefile
b/arch/arm/mach-s5pv210/Makefile
> index 8ebf51c..1a972a5 100644
> --- a/arch/arm/mach-s5pv210/Makefile
> +++ b/arch/arm/mach-s5pv210/Makefile
> @@ -13,6 +13,7 @@ obj-				:=
>  # Core support for S5PV210 system
> 
>  obj-$(CONFIG_CPU_S5PV210)	+= cpu.o init.o clock.o
> +obj-$(CONFIG_CPU_S5PV210)	+= setup-i2c0.o
> 
>  # machine support
> 
> diff --git a/arch/arm/plat-s5p/setup-i2c0.c
b/arch/arm/mach-s5pv210/setup-i2c0.c
> similarity index 69%
> rename from arch/arm/plat-s5p/setup-i2c0.c
> rename to arch/arm/mach-s5pv210/setup-i2c0.c
> index 67a66e0..27de0c1 100644
> --- a/arch/arm/plat-s5p/setup-i2c0.c
> +++ b/arch/arm/mach-s5pv210/setup-i2c0.c
> @@ -1,11 +1,11 @@
> -/* linux/arch/arm/plat-s5p/setup-i2c0.c
> +/*
> + * linux/arch/arm/mach-s5pv210/setup-i2c2.c
>   *
> - * Copyright (c) 2009 Samsung Electronics Co., Ltd.
> - *		http://www.samsung.com/
> + * Copyright 2009 Samsung Electronics Co.
>   *
> - * I2C0 GPIO configuration.
> + * Base S5PV210 I2C bus 0 gpio configuration
>   *
> - * Based on plat-s3c64xx/setup-i2c0.c
> + * Based on mach-s3c64xx/setup-i2c0.c
>   *
>   * This program is free software; you can redistribute it and/or modify
>   * it under the terms of the GNU General Public License version 2 as
> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
> index a7c54b3..0ec09a9 100644
> --- a/arch/arm/plat-s5p/Makefile
> +++ b/arch/arm/plat-s5p/Makefile
> @@ -16,4 +16,3 @@ obj-y				+= dev-uart.o
>  obj-y				+= cpu.o
>  obj-y				+= clock.o
>  obj-y				+= irq.o
> -obj-y				+= setup-i2c0.o
> --


Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 13/15] ARM: Samsung: Move external interrupts support from plat-s5pc1xx to plat-s5p

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> This patch moves external interrupts support code from plat-s5pc1xx to
> plat-s5p and enables support for it on ARCH_S5PC100. This code can be
easily
> reused by S5PV210/S5PC110 and probably S5P6442.

Already merged EINT patch for S5P to Ben's for-2635/s5p-general.
So please re-make based on it.

> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/mach-s5pc100/Kconfig                  |    1 +
>  arch/arm/mach-s5pc100/gpio.c                   |    8 ++--
>  arch/arm/mach-s5pc100/include/mach/gpio.h      |    8 +++
>  arch/arm/plat-s5p/Kconfig                      |    5 ++
>  arch/arm/plat-s5p/Makefile                     |    1 +
>  arch/arm/plat-s5p/include/plat/gpio-ext.h      |   44 ++++++++++++++++++
>  arch/arm/{plat-s5pc1xx => plat-s5p}/irq-eint.c |   57
++++++++++++------------
>  arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h  |   44 ------------------
>  8 files changed, 92 insertions(+), 76 deletions(-)
>  create mode 100644 arch/arm/plat-s5p/include/plat/gpio-ext.h
>  rename arch/arm/{plat-s5pc1xx => plat-s5p}/irq-eint.c (80%)
>  delete mode 100644 arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h
> 

(snip)


Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 12/15] ARM: SMDKC100: fix frame buffer definitions

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Fix incorrectly defined pixel clock value for the default framebuffer
> window.

It is better that separate this patch from c100 clean up patch set.
As you know, this patch is unrelated to that.

> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/mach-s5pc100/mach-smdkc100.c |    3 +--
>  1 files changed, 1 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-
> s5pc100/mach-smdkc100.c
> index 9155564..7df8ed0 100644
> --- a/arch/arm/mach-s5pc100/mach-smdkc100.c
> +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
> @@ -118,8 +118,7 @@ static struct platform_device smdkc100_lcd_powerdev = {
>  static struct s3c_fb_pd_win smdkc100_fb_win0 = {
>  	/* this is to ensure we use win0 */
>  	.win_mode	= {
> -		.refresh	= 70,
> -		.pixclock	= (8+13+3+800)*(7+5+1+480),
> +		.pixclock = 1000000000000ULL / ((8+13+3+800)*(7+5+1+480)*80),

As I've commented, how about moving to related LCD driver than hard coding
here.

>  		.left_margin	= 8,
>  		.right_margin	= 13,
>  		.upper_margin	= 7,
> --


Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 08/15] ARM: S5PC100: Move frame buffer helpers from plat-s5pc1xx to mach-s5pc100

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Move frame buffer helpers from plat-s5pc1xx to mach-s5pc100.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/mach-s5pc100/Kconfig                      |    7 ++++++-
>  arch/arm/mach-s5pc100/Makefile                     |    1 +
>  .../setup-fb-24bpp.c                               |    4 ++--
>  arch/arm/plat-s5pc1xx/Kconfig                      |    5 -----
>  arch/arm/plat-s5pc1xx/Makefile                     |    1 -
>  5 files changed, 9 insertions(+), 9 deletions(-)
>  rename arch/arm/{plat-s5pc1xx => mach-s5pc100}/setup-fb-24bpp.c (91%)
> 
> diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
> index 27ec167..b24c66d 100644
> --- a/arch/arm/mach-s5pc100/Kconfig
> +++ b/arch/arm/mach-s5pc100/Kconfig
> @@ -12,6 +12,11 @@ config CPU_S5PC100
>  	help
>  	  Enable S5PC100 CPU support
> 
> +config S5PC100_SETUP_FB_24BPP
> +	bool
> +	help
> +          Common setup code for S5PC1XX with an 24bpp RGB display helper.

Double tab and 2 white spaces.

> +
>  config S5PC100_SETUP_SDHCI
>          bool
>          select S5PC1XX_SETUP_SDHCI_GPIO
> @@ -28,7 +33,7 @@ config MACH_SMDKC100
>  	select S3C_DEV_HSMMC2
>  	select S5PC1XX_SETUP_I2C0
>  	select S5PC1XX_SETUP_I2C1
> -	select S5PC1XX_SETUP_FB_24BPP
> +	select S5PC100_SETUP_FB_24BPP
>  	select S5PC100_SETUP_SDHCI
>  	help
>  	  Machine support for the Samsung SMDKC100
> diff --git a/arch/arm/mach-s5pc100/Makefile
b/arch/arm/mach-s5pc100/Makefile
> index e1afdbf..ccf0dca 100644
> --- a/arch/arm/mach-s5pc100/Makefile
> +++ b/arch/arm/mach-s5pc100/Makefile
> @@ -15,6 +15,7 @@ obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpio.o
> 
>  # Helper and device support
> 
> +obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)	+= setup-fb-24bpp.o
>  obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
> 
>  # machine support
> diff --git a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
b/arch/arm/mach-s5pc100/setup-
> fb-24bpp.c
> similarity index 91%
> rename from arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
> rename to arch/arm/mach-s5pc100/setup-fb-24bpp.c
> index b02c36f..6eba6cb 100644
> --- a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c
> +++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c
> @@ -1,9 +1,9 @@
>  /*
> - * linux/arch/arm/plat-s5pc100/setup-fb-24bpp.c
> + * linux/arch/arm/mach-s5pc100/setup-fb-24bpp.c
>   *
>   * Copyright 2009 Samsung Electronics
>   *
> - * Base S5PC1XX setup information for 24bpp LCD framebuffer
> + * Base S5PC100 setup information for 24bpp LCD framebuffer
>   *
>   * This program is free software; you can redistribute it and/or modify
>   * it under the terms of the GNU General Public License version 2 as
> diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
> index 98bbaf9..708f7a0 100644
> --- a/arch/arm/plat-s5pc1xx/Kconfig
> +++ b/arch/arm/plat-s5pc1xx/Kconfig
> @@ -39,11 +39,6 @@ config CPU_S5PC100_CLOCK
> 
>  # platform specific device setup
> 
> -config S5PC1XX_SETUP_FB_24BPP
> -	bool
> -	help
> -          Common setup code for S5PC1XX with an 24bpp RGB display helper.
> -
>  config S5PC1XX_SETUP_I2C0
>  	bool
>  	default y
> diff --git a/arch/arm/plat-s5pc1xx/Makefile
b/arch/arm/plat-s5pc1xx/Makefile
> index 540fca5..a5b90c0 100644
> --- a/arch/arm/plat-s5pc1xx/Makefile
> +++ b/arch/arm/plat-s5pc1xx/Makefile
> @@ -23,7 +23,6 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK)	+= s5pc100-clock.o
> 
>  # Device setup
> 
> -obj-$(CONFIG_S5PC1XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
>  obj-$(CONFIG_S5PC1XX_SETUP_I2C0) += setup-i2c0.o
>  obj-$(CONFIG_S5PC1XX_SETUP_I2C1) += setup-i2c1.o
>  obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
> --


Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 05/15] ARM: S5PC100: Use common functions for gpiolib implementation

[Maurus Cuelenaere]

Op 17-05-10 13:14, Kukjin Kim schreef:
> Marek Szyprowski wrote:
>   
> <snip>
>> -
>>  static __init int s5pc1xx_gpiolib_init(void)
>>  {
>> -	struct s3c_gpio_chip *chips;
>> +	struct s3c_gpio_chip *chip;
>>  	int nr_chips;
>>
>> -		chips = s5pc100_gpio_chips;
>> -		nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
>> +	chip = s5pc100_gpio_chips;
>> +	nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
>> +
>> +	for (; nr_chips > 0; nr_chips--, chip++)
>> +		s5pc100_gpiolib_link(chip);
>>
>> -	s5pc1xx_gpiolib_add(chips, nr_chips, s5pc1xx_gpiolib_link);
>> +	samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
>> +				       ARRAY_SIZE(s5pc100_gpio_chips));
>>     
> nr_chips?
>   

You can't use nr_chips as it has been decremented to 0 in the for loop
above it.

-- 
Maurus Cuelenaere

[PATCH 01/15] ARM: Samsung: fix broken timer irq base

[Ben Dooks]

On Fri, May 14, 2010 at 08:18:52AM +0200, Marek Szyprowski wrote:
> Timer interrupts range was defined as 43-47, what overlaps with VIC0 range
> (32-64). This was caused probably by a typo while the common interrupts
> definition was refactored. This patch moves timer interrupt range to safe
> area of 11-15 (just before uart range).

I've put this on for-2635/s5p-general as it is a reasonably important
bugfix for s5p. Have updated the comment to reference the commit that
caused the problem in the first place.
 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
>  arch/arm/plat-s5p/include/plat/irqs.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
> index 42e757f..9ff3d71 100644
> --- a/arch/arm/plat-s5p/include/plat/irqs.h
> +++ b/arch/arm/plat-s5p/include/plat/irqs.h
> @@ -79,7 +79,7 @@
>  #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
>  #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
>  
> -#define S5P_TIMER_IRQ(x)	S5P_IRQ(11 + (x))
> +#define S5P_TIMER_IRQ(x)	(11 + (x))
>  
>  #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
>  #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
> -- 
> 1.6.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

-- 
-- 
Ben

Q:      What's a light-year?
A:      One-third less calories than a regular year.

[PATCH 06/15] ARM: S5PC100: Move gpio support from plat-s5pc1xx to mach-s5pc100

[Marek Szyprowski]

Hello,

On Monday, May 17, 2010 1:25 PM Kukjin Kim wrote:

> Marek Szyprowski wrote:
> >
> > Move gpio-lib support from plat-s5pc1xx to mach-s5pc100. Only basic gpio
> > functionality is now supported. Gpio interrupts are disabled temporarly
> > and will be added later.
> >
> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> > ---
> >  arch/arm/mach-s5pc100/Makefile                     |    2 +-
> >  .../gpiolib.c => mach-s5pc100/gpio.c}              |   11 +++++++----
> >  .../plat => mach-s5pc100/include/mach}/regs-gpio.h |    0
> >  arch/arm/mach-s5pc100/mach-smdkc100.c              |    1 -
> >  arch/arm/plat-s5pc1xx/Makefile                     |    3 +--
> >  5 files changed, 9 insertions(+), 8 deletions(-)
> >  rename arch/arm/{plat-s5pc1xx/gpiolib.c => mach-s5pc100/gpio.c} (99%)
> >  rename arch/arm/{plat-s5pc1xx/include/plat =>
> mach-s5pc100/include/mach}/regs-
> > gpio.h (100%)
> >
> > diff --git a/arch/arm/mach-s5pc100/Makefile
> b/arch/arm/mach-s5pc100/Makefile
> > index 809ff10..e1afdbf 100644
> > --- a/arch/arm/mach-s5pc100/Makefile
> > +++ b/arch/arm/mach-s5pc100/Makefile
> > @@ -11,7 +11,7 @@ obj-				:=
> >
> >  # Core support for S5PC100 system
> >
> > -obj-$(CONFIG_CPU_S5PC100)	+= cpu.o
> > +obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpio.o
> 
> How about changing gpiolib like gpiolib.c of mach-s3c64xx/ and mach-
> s5pv210/.
> I will change the file name of mach-s5p6440/ also.

I you don't mind I wanted first move the existing and working code and
then, later update it to match common s5p style.

> >
> >  # Helper and device support
> >
> > diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/mach-
> s5pc100/gpio.c
> > similarity index 99%
> > rename from arch/arm/plat-s5pc1xx/gpiolib.c
> > rename to arch/arm/mach-s5pc100/gpio.c
> > index 5a97a8f..c8e8336 100644
> > --- a/arch/arm/plat-s5pc1xx/gpiolib.c
> > +++ b/arch/arm/mach-s5pc100/gpio.c
> > @@ -17,11 +17,11 @@
> >  #include <linux/gpio.h>
> >
> >  #include <mach/map.h>
> > +#include <mach/regs-gpio.h>
> >
> >  #include <plat/gpio-core.h>
> >  #include <plat/gpio-cfg.h>
> >  #include <plat/gpio-cfg-helpers.h>
> > -#include <plat/regs-gpio.h>
> >
> >  /* S5PC100 GPIO bank summary:
> >   *
> > @@ -61,6 +61,7 @@
> >   * L3	8	4Bit	None
> >   */
> >
> > +#if 0
> >  static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int
> offset)
> >  {
> >  	return S3C_IRQ_GPIO(chip->base + offset);
> > @@ -84,7 +85,7 @@ static int s5pc1xx_gpiolib_to_eint(struct gpio_chip
> *chip,
> > unsigned int offset)
> >  		return IRQ_EINT(24 + offset);
> >  	return -EINVAL;
> >  }
> > -
> > +#endif
> >  static struct s3c_gpio_cfg gpio_cfg = {
> >  	.set_config	= s3c_gpio_setcfg_s3c64xx_4bit,
> >  	.set_pull	= s3c_gpio_setpull_updown,
> > @@ -386,7 +387,7 @@ extern void s5pc1xx_irq_gpioint_handler(unsigned int
> irq,
> > struct irq_desc *desc)
> >
> >  static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
> >  {
> > -
> > +#if 0
> >  	/* Interrupt */
> >  	if (chip->config == &gpio_cfg) {
> >  		int i, irq;
> > @@ -402,6 +403,7 @@ static __init void s5pc100_gpiolib_link(struct
> s3c_gpio_chip
> > *chip)
> >  		}
> >  	} else if (chip->config == &gpio_cfg_eint)
> >  		chip->chip.to_irq = s5pc1xx_gpiolib_to_eint;
> > +#endif
> >  }
> >
> >  static __init int s5pc1xx_gpiolib_init(void)
> > @@ -417,9 +419,10 @@ static __init int s5pc1xx_gpiolib_init(void)
> >
> >  	samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
> >  				       ARRAY_SIZE(s5pc100_gpio_chips));
> > +#if 0
> >  	/* Interrupt */
> >  	set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler);
> > -
> > +#endif
> >  	return 0;
> >  }
> >  core_initcall(s5pc1xx_gpiolib_init);
> 
> Is there any way to avoid compile compatibility without #if 0?

The other way would be to completely remove that code and add it in the
next patches. I don't think that this is really required.

> ...

Best regards
--
Marek Szyprowski
Samsung Poland R&D Center