From mboxrd@z Thu Jan 1 00:00:00 1970 From: zpfeffer@codeaurora.org (Zach Pfeffer) Date: Fri, 02 Jul 2010 00:33:51 -0700 Subject: [RFC 3/3] mm: iommu: The Virtual Contiguous Memory Manager In-Reply-To: <1278021944.7738.43.camel@c-dwalke-linux.qualcomm.com> References: <1277877350-2147-1-git-send-email-zpfeffer@codeaurora.org> <1277877350-2147-3-git-send-email-zpfeffer@codeaurora.org> <20100701101746.3810cc3b.randy.dunlap@oracle.com> <20100701180241.GA3594@basil.fritz.box> <1278012503.7738.17.camel@c-dwalke-linux.q <1278021944.7738.43.camel@c-dwalke-linux.qualcomm.com> Message-ID: <4C2D965F.5000206@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Daniel Walker wrote: > On Thu, 2010-07-01 at 15:00 -0700, Zach Pfeffer wrote: > > >> Additionally, the current IOMMU interface does not allow users to >> associate one page table with multiple IOMMUs unless the user explicitly >> wrote a muxed device underneith the IOMMU interface. This also could be >> done, but would have to be done for every such use case. Since the >> particular topology is run-time configurable all of these use-cases and >> more can be expressed without pushing the topology into the low-level >> IOMMU driver. >> >> The VCMM takes the long view. Its designed for a future in which the >> number of IOMMUs will go up and the ways in which these IOMMUs are >> composed will vary from system to system, and may vary at >> runtime. Already, there are ~20 different IOMMU map implementations in >> the kernel. Had the Linux kernel had the VCMM, many of those >> implementations could have leveraged the mapping and topology management >> of a VCMM, while focusing on a few key hardware specific functions (map >> this physical address, program the page table base register). > > So if we include this code which "map implementations" could you > collapse into this implementations ? Generally , what currently existing > code can VCMM help to eliminate? In theory, it can eliminate all code the interoperates between IOMMU, CPU and non-IOMMU based devices and all the mapping code, alignment, mapping attribute and special block size support that's been implemented. -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.