[PATCH v2 3/9] OMAP2420: hwmod data: add system DMA

[PATCH v2 3/9] OMAP2420: hwmod data: add system DMA

[G, Manjunath Kondaiah]

Hi Paul,

On Fri, Dec 17, 2010 at 09:09:42PM +0530, G, Manjunath Kondaiah wrote:
> Add OMAP2420 DMA hwmod data and also add required
> DMA device attributes.
> 
> Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
> ---
>  arch/arm/mach-omap2/omap_hwmod_2420_data.c |   87 ++++++++++++++++++++++++++++
>  arch/arm/plat-omap/include/plat/dma.h      |   11 ++++
>  2 files changed, 98 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> index d953425..eb02fec 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> @@ -42,6 +42,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod;
>  static struct omap_hwmod omap2420_gpio2_hwmod;
>  static struct omap_hwmod omap2420_gpio3_hwmod;
>  static struct omap_hwmod omap2420_gpio4_hwmod;
> +static struct omap_hwmod omap2420_dma_system_hwmod;
>  
>  /* L3 -> L4_CORE interface */
>  static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
> @@ -779,6 +780,89 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
>  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
>  };
>  
> +/* system dma */
> +static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
> +	.rev_offs	= 0x0000,
> +	.sysc_offs	= 0x002c,
> +	.syss_offs	= 0x0028,
> +	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
> +			   SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
> +			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
> +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> +			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> +	.sysc_fields	= &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap2420_dma_hwmod_class = {
> +	.name = "dma",
> +	.sysc = &omap2420_dma_sysc,
> +};
> +
> +/* dma attributes */
> +static struct omap_dma_dev_attr dma_dev_attr = {
> +	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
> +						IS_CSSA_32 | IS_CDSA_32,
> +	.lch_count = 32,
> +};
> +
> +static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
> +	{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
> +	{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
> +	{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
> +	{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
> +};
> +
> +static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
> +	{
> +		.pa_start	= 0x48056000,
> +		.pa_end		= 0x4a0560ff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* dma_system -> L3 */
> +static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
> +	.master		= &omap2420_dma_system_hwmod,
> +	.slave		= &omap2420_l3_main_hwmod,
> +	.clk		= "core_l3_ck",
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* dma_system master ports */
> +static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
> +	&omap2420_dma_system__l3,
> +};
> +
> +/* l4_cfg -> dma_system */
> +static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
> +	.master		= &omap2420_l4_core_hwmod,
> +	.slave		= &omap2420_dma_system_hwmod,
> +	.clk		= "sdma_ick",
> +	.addr		= omap2420_dma_system_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap2420_dma_system_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* dma_system slave ports */
> +static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
> +	&omap2420_l4_core__dma_system,
> +};
> +
> +static struct omap_hwmod omap2420_dma_system_hwmod = {
> +	.name		= "dma",
> +	.class		= &omap2420_dma_hwmod_class,
> +	.mpu_irqs	= omap2420_dma_system_irqs,
> +	.mpu_irqs_cnt	= ARRAY_SIZE(omap2420_dma_system_irqs),
> +	.main_clk	= "core_l3_ck",

The clock entries are modified as per your review comments and tested
the chagnes on N800 and 2430SDP(for patch 4/9).

Can you pls ack these patches so that tony can merge this series?

-Manjunath

[PATCH v2 3/9] OMAP2420: hwmod data: add system DMA

[Paul Walmsley]

Hello Manju

On Sat, 18 Dec 2010, G, Manjunath Kondaiah wrote:

> The clock entries are modified as per your review comments and tested
> the chagnes on N800 and 2430SDP(for patch 4/9).
> 
> Can you pls ack these patches so that tony can merge this series?

I've reviewed the patches and posted some comments, but cannot ack them 
yet until the SIDLEMODE parts are resolved.


- Paul

[PATCH v2 3/9] OMAP2420: hwmod data: add system DMA

[Paul Walmsley]

On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:

> Add OMAP2420 DMA hwmod data and also add required
> DMA device attributes.
> 
> Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
> ---
>  arch/arm/mach-omap2/omap_hwmod_2420_data.c |   87 ++++++++++++++++++++++++++++
>  arch/arm/plat-omap/include/plat/dma.h      |   11 ++++
>  2 files changed, 98 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> index d953425..eb02fec 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> @@ -42,6 +42,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod;
>  static struct omap_hwmod omap2420_gpio2_hwmod;
>  static struct omap_hwmod omap2420_gpio3_hwmod;
>  static struct omap_hwmod omap2420_gpio4_hwmod;
> +static struct omap_hwmod omap2420_dma_system_hwmod;
>  
>  /* L3 -> L4_CORE interface */
>  static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
> @@ -779,6 +780,89 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
>  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
>  };
>  
> +/* system dma */
> +static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
> +	.rev_offs	= 0x0000,
> +	.sysc_offs	= 0x002c,
> +	.syss_offs	= 0x0028,
> +	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |

According to the OMAP242x TRM 2.3 Rev. X [SWPU064X] Table 10-34, the SDMA 
has no SIDLEMODE register bitfield.  So this SYSC_HAS_SIDLEMODE appears to 
be incorrect.  Manju, please confirm.

> +			   SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
> +			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
> +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |

And if there is no SIDLEMODE register bitfield, then none of these SIDLE_* 
modes should apply, so they should all be removed also.

> +			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> +	.sysc_fields	= &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap2420_dma_hwmod_class = {
> +	.name = "dma",
> +	.sysc = &omap2420_dma_sysc,
> +};
> +
> +/* dma attributes */
> +static struct omap_dma_dev_attr dma_dev_attr = {
> +	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
> +						IS_CSSA_32 | IS_CDSA_32,
> +	.lch_count = 32,
> +};
> +
> +static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
> +	{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
> +	{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
> +	{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
> +	{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
> +};
> +
> +static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
> +	{
> +		.pa_start	= 0x48056000,
> +		.pa_end		= 0x4a0560ff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* dma_system -> L3 */
> +static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
> +	.master		= &omap2420_dma_system_hwmod,
> +	.slave		= &omap2420_l3_main_hwmod,
> +	.clk		= "core_l3_ck",
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* dma_system master ports */
> +static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
> +	&omap2420_dma_system__l3,
> +};
> +
> +/* l4_cfg -> dma_system */

l4_cfg should be l4_core.

> +static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
> +	.master		= &omap2420_l4_core_hwmod,
> +	.slave		= &omap2420_dma_system_hwmod,
> +	.clk		= "sdma_ick",
> +	.addr		= omap2420_dma_system_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap2420_dma_system_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* dma_system slave ports */
> +static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
> +	&omap2420_l4_core__dma_system,
> +};
> +
> +static struct omap_hwmod omap2420_dma_system_hwmod = {
> +	.name		= "dma",
> +	.class		= &omap2420_dma_hwmod_class,
> +	.mpu_irqs	= omap2420_dma_system_irqs,
> +	.mpu_irqs_cnt	= ARRAY_SIZE(omap2420_dma_system_irqs),
> +	.main_clk	= "core_l3_ck",
> +	.slaves		= omap2420_dma_system_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap2420_dma_system_slaves),
> +	.masters	= omap2420_dma_system_masters,
> +	.masters_cnt	= ARRAY_SIZE(omap2420_dma_system_masters),
> +	.dev_attr	= &dma_dev_attr,
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
> +	.flags		= HWMOD_NO_IDLEST,
> +};
> +
>  static __initdata struct omap_hwmod *omap2420_hwmods[] = {
>  	&omap2420_l3_main_hwmod,
>  	&omap2420_l4_core_hwmod,
> @@ -797,6 +881,9 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
>  	&omap2420_gpio2_hwmod,
>  	&omap2420_gpio3_hwmod,
>  	&omap2420_gpio4_hwmod,
> +
> +	/* dma_system class*/
> +	&omap2420_dma_system_hwmod,
>  	NULL,
>  };
>  
> diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
> index 2378399..c466566 100644
> --- a/arch/arm/plat-omap/include/plat/dma.h
> +++ b/arch/arm/plat-omap/include/plat/dma.h
> @@ -295,6 +295,13 @@
>  #define DMA_ERRATA_3_3			BIT(0x5)
>  #define DMA_ROMCODE_BUG			BIT(0x6)
>  
> +/* Attributes for OMAP DMA Contrller */
> +#define DMA_LINKED_LCH			BIT(0x0)
> +#define GLOBAL_PRIORITY			BIT(0x1)
> +#define RESERVE_CHANNEL			BIT(0x2)
> +#define IS_CSSA_32			BIT(0x3)
> +#define IS_CDSA_32			BIT(0x4)
> +
>  enum omap_reg_offsets {
>  
>  GCR,		GSCR,		GRST1,		HW_ID,
> @@ -389,6 +396,10 @@ struct omap_dma_channel_params {
>  #endif
>  };
>  
> +struct omap_dma_dev_attr {
> +	u32 dev_caps;
> +	u16 lch_count;
> +};
>  
>  extern void omap_set_dma_priority(int lch, int dst_port, int priority);
>  extern int omap_request_dma(int dev_id, const char *dev_name,
> -- 
> 1.7.1
> 

I've verified the clocks, the register addresses, and the IRQ numbers 
against the TRM.  After the SIDLE* stuff is fixed, you can add my ack.


- Paul

[PATCH v2 3/9] OMAP2420: hwmod data: add system DMA

[G, Manjunath Kondaiah]

On Sat, Dec 18, 2010 at 02:03:27AM -0700, Paul Walmsley wrote:
> On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:
> 
> > Add OMAP2420 DMA hwmod data and also add required
> > DMA device attributes.
> > 
> > Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
> > ---
> >  arch/arm/mach-omap2/omap_hwmod_2420_data.c |   87 ++++++++++++++++++++++++++++
> >  arch/arm/plat-omap/include/plat/dma.h      |   11 ++++
> >  2 files changed, 98 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> > index d953425..eb02fec 100644
> > --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> > +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
> > @@ -42,6 +42,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod;
> >  static struct omap_hwmod omap2420_gpio2_hwmod;
> >  static struct omap_hwmod omap2420_gpio3_hwmod;
> >  static struct omap_hwmod omap2420_gpio4_hwmod;
> > +static struct omap_hwmod omap2420_dma_system_hwmod;
> >  
> >  /* L3 -> L4_CORE interface */
> >  static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
> > @@ -779,6 +780,89 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
> >  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
> >  };
> >  
> > +/* system dma */
> > +static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
> > +	.rev_offs	= 0x0000,
> > +	.sysc_offs	= 0x002c,
> > +	.syss_offs	= 0x0028,
> > +	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
> 
> According to the OMAP242x TRM 2.3 Rev. X [SWPU064X] Table 10-34, the SDMA 
> has no SIDLEMODE register bitfield.  So this SYSC_HAS_SIDLEMODE appears to 
> be incorrect.  Manju, please confirm.

I verified again in 2420 TRM, this entry should not there.

> 
> > +			   SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
> > +			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
> > +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> 
> And if there is no SIDLEMODE register bitfield, then none of these SIDLE_* 
> modes should apply, so they should all be removed also.

correct.

> 
> > +			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> > +	.sysc_fields	= &omap_hwmod_sysc_type1,
> > +};
> > +
> > +static struct omap_hwmod_class omap2420_dma_hwmod_class = {
> > +	.name = "dma",
> > +	.sysc = &omap2420_dma_sysc,
> > +};
> > +
> > +/* dma attributes */
> > +static struct omap_dma_dev_attr dma_dev_attr = {
> > +	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
> > +						IS_CSSA_32 | IS_CDSA_32,
> > +	.lch_count = 32,
> > +};
> > +
> > +static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
> > +	{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
> > +	{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
> > +	{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
> > +	{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
> > +};
> > +
> > +static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
> > +	{
> > +		.pa_start	= 0x48056000,
> > +		.pa_end		= 0x4a0560ff,
> > +		.flags		= ADDR_TYPE_RT
> > +	},
> > +};
> > +
> > +/* dma_system -> L3 */
> > +static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
> > +	.master		= &omap2420_dma_system_hwmod,
> > +	.slave		= &omap2420_l3_main_hwmod,
> > +	.clk		= "core_l3_ck",
> > +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> > +};
> > +
> > +/* dma_system master ports */
> > +static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
> > +	&omap2420_dma_system__l3,
> > +};
> > +
> > +/* l4_cfg -> dma_system */
> 
> l4_cfg should be l4_core.
ok.
> 
> > +static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
> > +	.master		= &omap2420_l4_core_hwmod,
> > +	.slave		= &omap2420_dma_system_hwmod,
> > +	.clk		= "sdma_ick",
> > +	.addr		= omap2420_dma_system_addrs,
> > +	.addr_cnt	= ARRAY_SIZE(omap2420_dma_system_addrs),
> > +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> > +};
> > +
> > +/* dma_system slave ports */
> > +static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
> > +	&omap2420_l4_core__dma_system,
> > +};
> > +
> > +static struct omap_hwmod omap2420_dma_system_hwmod = {
> > +	.name		= "dma",
> > +	.class		= &omap2420_dma_hwmod_class,
> > +	.mpu_irqs	= omap2420_dma_system_irqs,
> > +	.mpu_irqs_cnt	= ARRAY_SIZE(omap2420_dma_system_irqs),
> > +	.main_clk	= "core_l3_ck",
> > +	.slaves		= omap2420_dma_system_slaves,
> > +	.slaves_cnt	= ARRAY_SIZE(omap2420_dma_system_slaves),
> > +	.masters	= omap2420_dma_system_masters,
> > +	.masters_cnt	= ARRAY_SIZE(omap2420_dma_system_masters),
> > +	.dev_attr	= &dma_dev_attr,
> > +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
> > +	.flags		= HWMOD_NO_IDLEST,
> > +};
> > +
> >  static __initdata struct omap_hwmod *omap2420_hwmods[] = {
> >  	&omap2420_l3_main_hwmod,
> >  	&omap2420_l4_core_hwmod,
> > @@ -797,6 +881,9 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
> >  	&omap2420_gpio2_hwmod,
> >  	&omap2420_gpio3_hwmod,
> >  	&omap2420_gpio4_hwmod,
> > +
> > +	/* dma_system class*/
> > +	&omap2420_dma_system_hwmod,
> >  	NULL,
> >  };
> >  
> > diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
> > index 2378399..c466566 100644
> > --- a/arch/arm/plat-omap/include/plat/dma.h
> > +++ b/arch/arm/plat-omap/include/plat/dma.h
> > @@ -295,6 +295,13 @@
> >  #define DMA_ERRATA_3_3			BIT(0x5)
> >  #define DMA_ROMCODE_BUG			BIT(0x6)
> >  
> > +/* Attributes for OMAP DMA Contrller */
> > +#define DMA_LINKED_LCH			BIT(0x0)
> > +#define GLOBAL_PRIORITY			BIT(0x1)
> > +#define RESERVE_CHANNEL			BIT(0x2)
> > +#define IS_CSSA_32			BIT(0x3)
> > +#define IS_CDSA_32			BIT(0x4)
> > +
> >  enum omap_reg_offsets {
> >  
> >  GCR,		GSCR,		GRST1,		HW_ID,
> > @@ -389,6 +396,10 @@ struct omap_dma_channel_params {
> >  #endif
> >  };
> >  
> > +struct omap_dma_dev_attr {
> > +	u32 dev_caps;
> > +	u16 lch_count;
> > +};
> >  
> >  extern void omap_set_dma_priority(int lch, int dst_port, int priority);
> >  extern int omap_request_dma(int dev_id, const char *dev_name,
> > -- 
> > 1.7.1
> > 
> 
> I've verified the clocks, the register addresses, and the IRQ numbers 
> against the TRM.  After the SIDLE* stuff is fixed, you can add my ack.

Thanks. I will send pull request to tony.

-Manjunath

[PATCH v2 4/9] OMAP2430: hwmod data: add system DMA

[Paul Walmsley]

On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:

> Add OMAP2430 DMA hwmod data and also add required
> DMA device attributes.
> 
> Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
> ---
>  arch/arm/mach-omap2/omap_hwmod_2430_data.c |   87 ++++++++++++++++++++++++++++
>  arch/arm/plat-omap/include/plat/dma.h      |    1 +
>  2 files changed, 88 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> index f68409e..b52ba66 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> @@ -43,6 +43,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod;
>  static struct omap_hwmod omap2430_gpio3_hwmod;
>  static struct omap_hwmod omap2430_gpio4_hwmod;
>  static struct omap_hwmod omap2430_gpio5_hwmod;
> +static struct omap_hwmod omap2430_dma_system_hwmod;
>  
>  /* L3 -> L4_CORE interface */
>  static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
> @@ -840,6 +841,89 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
>  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
>  };
>  
> +/* dma_system */
> +static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
> +	.rev_offs	= 0x0000,
> +	.sysc_offs	= 0x002c,
> +	.syss_offs	= 0x0028,
> +	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |

The OMAP2430 TRM Silicon Rev. 2.1 [Rev. Z] [SWPU090Z] Table 9-25 
'DMA4_OCP_SYSCONFIG' does not list a SIDLEMODE register bitfield for this 
IP block.  Is there a reason why you list one?

> +			   SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
> +			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
> +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |

If there is no SIDLEMODE register bitfield, then none of these SIDLE_* 
modes should be included.

> +			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> +	.sysc_fields	= &omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap2430_dma_hwmod_class = {
> +	.name = "dma",
> +	.sysc = &omap2430_dma_sysc,
> +};
> +
> +/* dma attributes */
> +static struct omap_dma_dev_attr dma_dev_attr = {
> +	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
> +				IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
> +	.lch_count = 32,
> +};
> +
> +static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
> +	{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
> +	{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
> +	{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
> +	{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
> +};
> +
> +static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
> +	{
> +		.pa_start	= 0x48056000,
> +		.pa_end		= 0x4a0560ff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* dma_system -> L3 */
> +static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
> +	.master		= &omap2430_dma_system_hwmod,
> +	.slave		= &omap2430_l3_main_hwmod,
> +	.clk		= "core_l3_ck",
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* dma_system master ports */
> +static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
> +	&omap2430_dma_system__l3,
> +};
> +
> +/* l4_cfg -> dma_system */

l4_cfg should be l4_core.

> +static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
> +	.master		= &omap2430_l4_core_hwmod,
> +	.slave		= &omap2430_dma_system_hwmod,
> +	.clk		= "sdma_ick",
> +	.addr		= omap2430_dma_system_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap2430_dma_system_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* dma_system slave ports */
> +static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
> +	&omap2430_l4_core__dma_system,
> +};
> +
> +static struct omap_hwmod omap2430_dma_system_hwmod = {
> +	.name		= "dma",
> +	.class		= &omap2430_dma_hwmod_class,
> +	.mpu_irqs	= omap2430_dma_system_irqs,
> +	.mpu_irqs_cnt	= ARRAY_SIZE(omap2430_dma_system_irqs),
> +	.main_clk	= "core_l3_ck",
> +	.slaves		= omap2430_dma_system_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap2430_dma_system_slaves),
> +	.masters	= omap2430_dma_system_masters,
> +	.masters_cnt	= ARRAY_SIZE(omap2430_dma_system_masters),
> +	.dev_attr	= &dma_dev_attr,
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
> +	.flags		= HWMOD_NO_IDLEST,
> +};
> +
>  static __initdata struct omap_hwmod *omap2430_hwmods[] = {
>  	&omap2430_l3_main_hwmod,
>  	&omap2430_l4_core_hwmod,
> @@ -859,6 +943,9 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
>  	&omap2430_gpio3_hwmod,
>  	&omap2430_gpio4_hwmod,
>  	&omap2430_gpio5_hwmod,
> +
> +	/* dma_system class*/
> +	&omap2430_dma_system_hwmod,
>  	NULL,
>  };
>  
> diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
> index c466566..4b51d2b 100644
> --- a/arch/arm/plat-omap/include/plat/dma.h
> +++ b/arch/arm/plat-omap/include/plat/dma.h
> @@ -301,6 +301,7 @@
>  #define RESERVE_CHANNEL			BIT(0x2)
>  #define IS_CSSA_32			BIT(0x3)
>  #define IS_CDSA_32			BIT(0x4)
> +#define IS_RW_PRIORITY			BIT(0x5)
>  
>  enum omap_reg_offsets {
>  
> -- 
> 1.7.1

I've doublechecked the clocks, register offsets, IRQs, and register bases 
against the TRM.  So once the above issues are resolved, you may add my 
ack.

- Paul

[PATCH v2 4/9] OMAP2430: hwmod data: add system DMA

[Russell King - ARM Linux]

On Sat, Dec 18, 2010 at 02:11:50AM -0700, Paul Walmsley wrote:
> On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:
> 
> > Add OMAP2430 DMA hwmod data and also add required
> > DMA device attributes.
> > 
> > Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
> > ---
> >  arch/arm/mach-omap2/omap_hwmod_2430_data.c |   87 ++++++++++++++++++++++++++++
> >  arch/arm/plat-omap/include/plat/dma.h      |    1 +
> >  2 files changed, 88 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> > index f68409e..b52ba66 100644
> > --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> > +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> > @@ -43,6 +43,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod;
> >  static struct omap_hwmod omap2430_gpio3_hwmod;
> >  static struct omap_hwmod omap2430_gpio4_hwmod;
> >  static struct omap_hwmod omap2430_gpio5_hwmod;
> > +static struct omap_hwmod omap2430_dma_system_hwmod;
> >  
> >  /* L3 -> L4_CORE interface */
> >  static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
> > @@ -840,6 +841,89 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
> >  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
> >  };
> >  
> > +/* dma_system */
> > +static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
> > +	.rev_offs	= 0x0000,
> > +	.sysc_offs	= 0x002c,
> > +	.syss_offs	= 0x0028,
> > +	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
> 
> The OMAP2430 TRM Silicon Rev. 2.1 [Rev. Z] [SWPU090Z] Table 9-25 
> 'DMA4_OCP_SYSCONFIG' does not list a SIDLEMODE register bitfield for this 
> IP block.  Is there a reason why you list one?
> 
> > +			   SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
> > +			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
> > +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> 
> If there is no SIDLEMODE register bitfield, then none of these SIDLE_* 
> modes should be included.

I'm confused.  I thought the whole point of hwmod was that the data for
it was generated from a TI database of how the chip is actually setup.

However, from all the patching which seems to be going on, it looks to
me like that's not the case - and if that's true, hwmod was mis-sold.
It's just moved the problem rather than solving anything.

What's going on?

[PATCH v2 4/9] OMAP2430: hwmod data: add system DMA

[Paul Walmsley]

On Sat, 18 Dec 2010, Russell King - ARM Linux wrote:

> I'm confused.  I thought the whole point of hwmod was that the data for
> it was generated from a TI database of how the chip is actually setup.
> 
> However, from all the patching which seems to be going on, it looks to
> me like that's not the case - and if that's true, hwmod was mis-sold.
> It's just moved the problem rather than solving anything.
> 
> What's going on?

OMAP4 and beyond data is being generated from the TI hardware database.  
However, apparently that is not possible with the OMAP2 and OMAP3 data.


- Paul

[PATCH v2 4/9] OMAP2430: hwmod data: add system DMA

[G, Manjunath Kondaiah]

On Sat, Dec 18, 2010 at 02:11:50AM -0700, Paul Walmsley wrote:
> On Fri, 17 Dec 2010, G, Manjunath Kondaiah wrote:
> 
> > Add OMAP2430 DMA hwmod data and also add required
> > DMA device attributes.
> > 
> > Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
> > ---
> >  arch/arm/mach-omap2/omap_hwmod_2430_data.c |   87 ++++++++++++++++++++++++++++
> >  arch/arm/plat-omap/include/plat/dma.h      |    1 +
> >  2 files changed, 88 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> > index f68409e..b52ba66 100644
> > --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> > +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
> > @@ -43,6 +43,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod;
> >  static struct omap_hwmod omap2430_gpio3_hwmod;
> >  static struct omap_hwmod omap2430_gpio4_hwmod;
> >  static struct omap_hwmod omap2430_gpio5_hwmod;
> > +static struct omap_hwmod omap2430_dma_system_hwmod;
> >  
> >  /* L3 -> L4_CORE interface */
> >  static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
> > @@ -840,6 +841,89 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
> >  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
> >  };
> >  
> > +/* dma_system */
> > +static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
> > +	.rev_offs	= 0x0000,
> > +	.sysc_offs	= 0x002c,
> > +	.syss_offs	= 0x0028,
> > +	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
> 
> The OMAP2430 TRM Silicon Rev. 2.1 [Rev. Z] [SWPU090Z] Table 9-25 
> 'DMA4_OCP_SYSCONFIG' does not list a SIDLEMODE register bitfield for this 
> IP block.  Is there a reason why you list one?
You are right. This has been corrected now.
> 
> > +			   SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
> > +			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
> > +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> 
> If there is no SIDLEMODE register bitfield, then none of these SIDLE_* 
> modes should be included.
ok.
> 
> > +			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> > +	.sysc_fields	= &omap_hwmod_sysc_type1,
> > +};
> > +
> > +static struct omap_hwmod_class omap2430_dma_hwmod_class = {
> > +	.name = "dma",
> > +	.sysc = &omap2430_dma_sysc,
> > +};
> > +
> > +/* dma attributes */
> > +static struct omap_dma_dev_attr dma_dev_attr = {
> > +	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
> > +				IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
> > +	.lch_count = 32,
> > +};
> > +
> > +static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
> > +	{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
> > +	{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
> > +	{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
> > +	{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
> > +};
> > +
> > +static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = {
> > +	{
> > +		.pa_start	= 0x48056000,
> > +		.pa_end		= 0x4a0560ff,
> > +		.flags		= ADDR_TYPE_RT
> > +	},
> > +};
> > +
> > +/* dma_system -> L3 */
> > +static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
> > +	.master		= &omap2430_dma_system_hwmod,
> > +	.slave		= &omap2430_l3_main_hwmod,
> > +	.clk		= "core_l3_ck",
> > +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> > +};
> > +
> > +/* dma_system master ports */
> > +static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
> > +	&omap2430_dma_system__l3,
> > +};
> > +
> > +/* l4_cfg -> dma_system */
> 
> l4_cfg should be l4_core.
ok.
> 
> > +static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
> > +	.master		= &omap2430_l4_core_hwmod,
> > +	.slave		= &omap2430_dma_system_hwmod,
> > +	.clk		= "sdma_ick",
> > +	.addr		= omap2430_dma_system_addrs,
> > +	.addr_cnt	= ARRAY_SIZE(omap2430_dma_system_addrs),
> > +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> > +};
> > +
> > +/* dma_system slave ports */
> > +static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
> > +	&omap2430_l4_core__dma_system,
> > +};
> > +
> > +static struct omap_hwmod omap2430_dma_system_hwmod = {
> > +	.name		= "dma",
> > +	.class		= &omap2430_dma_hwmod_class,
> > +	.mpu_irqs	= omap2430_dma_system_irqs,
> > +	.mpu_irqs_cnt	= ARRAY_SIZE(omap2430_dma_system_irqs),
> > +	.main_clk	= "core_l3_ck",
> > +	.slaves		= omap2430_dma_system_slaves,
> > +	.slaves_cnt	= ARRAY_SIZE(omap2430_dma_system_slaves),
> > +	.masters	= omap2430_dma_system_masters,
> > +	.masters_cnt	= ARRAY_SIZE(omap2430_dma_system_masters),
> > +	.dev_attr	= &dma_dev_attr,
> > +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
> > +	.flags		= HWMOD_NO_IDLEST,
> > +};
> > +
> >  static __initdata struct omap_hwmod *omap2430_hwmods[] = {
> >  	&omap2430_l3_main_hwmod,
> >  	&omap2430_l4_core_hwmod,
> > @@ -859,6 +943,9 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
> >  	&omap2430_gpio3_hwmod,
> >  	&omap2430_gpio4_hwmod,
> >  	&omap2430_gpio5_hwmod,
> > +
> > +	/* dma_system class*/
> > +	&omap2430_dma_system_hwmod,
> >  	NULL,
> >  };
> >  
> > diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
> > index c466566..4b51d2b 100644
> > --- a/arch/arm/plat-omap/include/plat/dma.h
> > +++ b/arch/arm/plat-omap/include/plat/dma.h
> > @@ -301,6 +301,7 @@
> >  #define RESERVE_CHANNEL			BIT(0x2)
> >  #define IS_CSSA_32			BIT(0x3)
> >  #define IS_CDSA_32			BIT(0x4)
> > +#define IS_RW_PRIORITY			BIT(0x5)
> >  
> >  enum omap_reg_offsets {
> >  
> > -- 
> > 1.7.1
> 
> I've doublechecked the clocks, register offsets, IRQs, and register bases 
> against the TRM.  So once the above issues are resolved, you may add my 
> ack.

Thanks.

-Manjunath

[PATCH v2 6/9] OMAP4: hwmod data: add system DMA

[Cousson, Benoit]

On 12/17/2010 4:39 PM, G, Manjunath Kondaiah wrote:
> From: Benoit Cousson<b-cousson@ti.com>
>
> Add OMAP4 DMA hwmod data
>
> Signed-off-by: Benoit Cousson<b-cousson@ti.com>
> Signed-off-by: G, Manjunath Kondaiah<manjugk@ti.com>

It will be good to explicitly list the changes you did compared to the 
original generated version. Even if these are some minor changes.
I thought it was the original patch and it appears it is not the case :-(

The general minor commestic comment is you should try to keep the 
original order of the structures. That does not changes anything, but 
that will keep the file in sync with the generated one.

> Tested-by: Kevin Hilman<khilman@deeprootsystems.com>
> Acked-by: Kevin Hilman<khilman@deeprootsystems.com>
> ---
>   arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  101 ++++++++++++++++++++++++++++
>   1 files changed, 101 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index d258936..50c00d6 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -23,6 +23,7 @@
>   #include<plat/omap_hwmod.h>
>   #include<plat/cpu.h>
>   #include<plat/gpio.h>
> +#include<plat/dma.h>
>
>   #include "omap_hwmod_common_data.h"
>
> @@ -36,6 +37,7 @@
>   #define OMAP44XX_DMA_REQ_START  1
>
>   /* Backward references (IPs with Bus Master capability) */
> +static struct omap_hwmod omap44xx_dma_system_hwmod;
>   static struct omap_hwmod omap44xx_dmm_hwmod;
>   static struct omap_hwmod omap44xx_emif_fw_hwmod;
>   static struct omap_hwmod omap44xx_l3_instr_hwmod;
> @@ -216,6 +218,14 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
>   	.user		= OCP_USER_MPU | OCP_USER_SDMA,
>   };
>
> +/* dma_system ->  l3_main_2 */
> +static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
> +	.master		=&omap44xx_dma_system_hwmod,
> +	.slave		=&omap44xx_l3_main_2_hwmod,
> +	.clk		= "l3_div_ck",
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
>   /* l4_cfg ->  l3_main_2 */
>   static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
>   	.master		=&omap44xx_l4_cfg_hwmod,
> @@ -227,6 +237,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
>   /* l3_main_2 slave ports */
>   static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
>   	&omap44xx_l3_main_1__l3_main_2,
> +	&omap44xx_dma_system__l3_main_2,
>   	&omap44xx_l4_cfg__l3_main_2,
>   };
>
> @@ -1376,6 +1387,93 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
>   	.slaves_cnt	= ARRAY_SIZE(omap44xx_gpio6_slaves),
>   	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
>   };
> +
> +/*
> + * 'dma' class
> + * dma controller for data exchange between memory to memory (i.e. internal or
> + * external memory) and gp peripherals to memory or memory to gp peripherals
> + */
> +
> +static struct omap_hwmod_class_sysconfig omap44xx_dma_sysc = {
> +	.rev_offs	= 0x0000,
> +	.sysc_offs	= 0x002c,
> +	.syss_offs	= 0x0028,
> +	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
> +			   SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
> +			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),

A new flag was introduce in 2.6.37 to handle properly the softreset 
(SYSS_HAS_RESET_STATUS). You should use it otherwise the reset might not 
work properly. The generated hwmod data was updated accordingly at that 
time (git://gitorious.org/omap-pm/linux.git hwmods-omap4-full)

Here are the proper data:

+static struct omap_hwmod_class_sysconfig omap44xx_dma_sysc = {
+       .rev_offs       = 0x0000,
+       .sysc_offs      = 0x002c,
+       .syss_offs      = 0x0028,
+       .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
+                          SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
+                          SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+                          SYSS_HAS_RESET_STATUS),

> +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> +			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> +	.sysc_fields	=&omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap44xx_dma_hwmod_class = {
> +	.name = "dma",
> +	.sysc =&omap44xx_dma_sysc,
> +};
> +
> +/* dma attributes */
> +static struct omap_dma_dev_attr dma_dev_attr = {
> +	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
> +				IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
> +	.lch_count = 32,
> +};
> +
> +/* dma_system */
> +static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {
> +	{ .name = "0", .irq = 12 + OMAP44XX_IRQ_GIC_START },
> +	{ .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START },
> +	{ .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START },
> +	{ .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
> +	{
> +		.pa_start	= 0x4a056000,
> +		.pa_end		= 0x4a0560ff,
> +		.flags		= ADDR_TYPE_RT
> +	},
> +};
> +
> +/* dma_system master ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = {
> +	&omap44xx_dma_system__l3_main_2,
> +};
> +
> +/* l4_cfg ->  dma_system */
> +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {
> +	.master		=&omap44xx_l4_cfg_hwmod,
> +	.slave		=&omap44xx_dma_system_hwmod,
> +	.clk		= "l4_div_ck",
> +	.addr		= omap44xx_dma_system_addrs,
> +	.addr_cnt	= ARRAY_SIZE(omap44xx_dma_system_addrs),
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* dma_system slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = {
> +	&omap44xx_l4_cfg__dma_system,
> +};
> +
> +static struct omap_hwmod omap44xx_dma_system_hwmod = {
> +	.name		= "dma_system",
> +	.class		=&omap44xx_dma_hwmod_class,
> +	.mpu_irqs	= omap44xx_dma_system_irqs,
> +	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_dma_system_irqs),
> +	.main_clk	= "l3_div_ck",
> +	.prcm = {
> +		.omap4 = {
> +			.clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL,
> +		},
> +	},
> +	.slaves		= omap44xx_dma_system_slaves,
> +	.slaves_cnt	= ARRAY_SIZE(omap44xx_dma_system_slaves),
> +	.masters	= omap44xx_dma_system_masters,
> +	.masters_cnt	= ARRAY_SIZE(omap44xx_dma_system_masters),
> +	.dev_attr	=&dma_dev_attr,
> +	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +	.flags		= HWMOD_NO_IDLEST,

That one is wrong! It was the case on OMAP 2& 3, but we do have an 
IDLEST on OMAP4.
TRM vM page 958: Table 3-1210. CM_SDMA_SDMA_CLKCTRL.IDLEST

It might not work, but that's another story. Why did you add that?

Regards,
Benoit

[PATCH v2 6/9] OMAP4: hwmod data: add system DMA

[G, Manjunath Kondaiah]

On Mon, Dec 20, 2010 at 12:30:11PM +0100, Cousson, Benoit wrote:
> On 12/17/2010 4:39 PM, G, Manjunath Kondaiah wrote:
> >From: Benoit Cousson<b-cousson@ti.com>
> >
> >Add OMAP4 DMA hwmod data
> >
> >Signed-off-by: Benoit Cousson<b-cousson@ti.com>
> >Signed-off-by: G, Manjunath Kondaiah<manjugk@ti.com>
> 
> It will be good to explicitly list the changes you did compared to
> the original generated version. Even if these are some minor
> changes.

I can add if it is informative.

> I thought it was the original patch and it appears it is not the case :-(

Indeed, it is original patch. Only device attributes and no idlest flags
are added.

> 
> The general minor commestic comment is you should try to keep the
> original order of the structures. That does not changes anything,
> but that will keep the file in sync with the generated one.

The order might have slightly changed when I am rebasing every time. I
can restore the order from full hwmod db if you want maintain
consistency.

> 
> >Tested-by: Kevin Hilman<khilman@deeprootsystems.com>
> >Acked-by: Kevin Hilman<khilman@deeprootsystems.com>
> >---
> >  arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  101 ++++++++++++++++++++++++++++
> >  1 files changed, 101 insertions(+), 0 deletions(-)
> >
> >diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> >index d258936..50c00d6 100644
> >--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> >+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> >@@ -23,6 +23,7 @@
> >  #include<plat/omap_hwmod.h>
> >  #include<plat/cpu.h>
> >  #include<plat/gpio.h>
> >+#include<plat/dma.h>
> >
> >  #include "omap_hwmod_common_data.h"
> >
> >@@ -36,6 +37,7 @@
> >  #define OMAP44XX_DMA_REQ_START  1
> >
> >  /* Backward references (IPs with Bus Master capability) */
> >+static struct omap_hwmod omap44xx_dma_system_hwmod;
> >  static struct omap_hwmod omap44xx_dmm_hwmod;
> >  static struct omap_hwmod omap44xx_emif_fw_hwmod;
> >  static struct omap_hwmod omap44xx_l3_instr_hwmod;
> >@@ -216,6 +218,14 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
> >  	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> >  };
> >
> >+/* dma_system ->  l3_main_2 */
> >+static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
> >+	.master		=&omap44xx_dma_system_hwmod,
> >+	.slave		=&omap44xx_l3_main_2_hwmod,
> >+	.clk		= "l3_div_ck",
> >+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> >+};
> >+
> >  /* l4_cfg ->  l3_main_2 */
> >  static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
> >  	.master		=&omap44xx_l4_cfg_hwmod,
> >@@ -227,6 +237,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
> >  /* l3_main_2 slave ports */
> >  static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
> >  	&omap44xx_l3_main_1__l3_main_2,
> >+	&omap44xx_dma_system__l3_main_2,
> >  	&omap44xx_l4_cfg__l3_main_2,
> >  };
> >
> >@@ -1376,6 +1387,93 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
> >  	.slaves_cnt	= ARRAY_SIZE(omap44xx_gpio6_slaves),
> >  	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> >  };
> >+
> >+/*
> >+ * 'dma' class
> >+ * dma controller for data exchange between memory to memory (i.e. internal or
> >+ * external memory) and gp peripherals to memory or memory to gp peripherals
> >+ */
> >+
> >+static struct omap_hwmod_class_sysconfig omap44xx_dma_sysc = {
> >+	.rev_offs	= 0x0000,
> >+	.sysc_offs	= 0x002c,
> >+	.syss_offs	= 0x0028,
> >+	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
> >+			   SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
> >+			   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
> 
> A new flag was introduce in 2.6.37 to handle properly the softreset
> (SYSS_HAS_RESET_STATUS). You should use it otherwise the reset might
> not work properly. The generated hwmod data was updated accordingly
> at that time (git://gitorious.org/omap-pm/linux.git
> hwmods-omap4-full)

ok.

> 
> Here are the proper data:
> 
> +static struct omap_hwmod_class_sysconfig omap44xx_dma_sysc = {
> +       .rev_offs       = 0x0000,
> +       .sysc_offs      = 0x002c,
> +       .syss_offs      = 0x0028,
> +       .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
> +                          SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
> +                          SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
> +                          SYSS_HAS_RESET_STATUS),
> 
> >+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> >+			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> >+	.sysc_fields	=&omap_hwmod_sysc_type1,
> >+};
> >+
> >+static struct omap_hwmod_class omap44xx_dma_hwmod_class = {
> >+	.name = "dma",
> >+	.sysc =&omap44xx_dma_sysc,
> >+};
> >+
> >+/* dma attributes */
> >+static struct omap_dma_dev_attr dma_dev_attr = {
> >+	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
> >+				IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
> >+	.lch_count = 32,
> >+};
> >+
> >+/* dma_system */
> >+static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {
> >+	{ .name = "0", .irq = 12 + OMAP44XX_IRQ_GIC_START },
> >+	{ .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START },
> >+	{ .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START },
> >+	{ .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START },
> >+};
> >+
> >+static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
> >+	{
> >+		.pa_start	= 0x4a056000,
> >+		.pa_end		= 0x4a0560ff,
> >+		.flags		= ADDR_TYPE_RT
> >+	},
> >+};
> >+
> >+/* dma_system master ports */
> >+static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = {
> >+	&omap44xx_dma_system__l3_main_2,
> >+};
> >+
> >+/* l4_cfg ->  dma_system */
> >+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {
> >+	.master		=&omap44xx_l4_cfg_hwmod,
> >+	.slave		=&omap44xx_dma_system_hwmod,
> >+	.clk		= "l4_div_ck",
> >+	.addr		= omap44xx_dma_system_addrs,
> >+	.addr_cnt	= ARRAY_SIZE(omap44xx_dma_system_addrs),
> >+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> >+};
> >+
> >+/* dma_system slave ports */
> >+static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = {
> >+	&omap44xx_l4_cfg__dma_system,
> >+};
> >+
> >+static struct omap_hwmod omap44xx_dma_system_hwmod = {
> >+	.name		= "dma_system",
> >+	.class		=&omap44xx_dma_hwmod_class,
> >+	.mpu_irqs	= omap44xx_dma_system_irqs,
> >+	.mpu_irqs_cnt	= ARRAY_SIZE(omap44xx_dma_system_irqs),
> >+	.main_clk	= "l3_div_ck",
> >+	.prcm = {
> >+		.omap4 = {
> >+			.clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL,
> >+		},
> >+	},
> >+	.slaves		= omap44xx_dma_system_slaves,
> >+	.slaves_cnt	= ARRAY_SIZE(omap44xx_dma_system_slaves),
> >+	.masters	= omap44xx_dma_system_masters,
> >+	.masters_cnt	= ARRAY_SIZE(omap44xx_dma_system_masters),
> >+	.dev_attr	=&dma_dev_attr,
> >+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> >+	.flags		= HWMOD_NO_IDLEST,
> 
> That one is wrong! It was the case on OMAP 2& 3, but we do have an
> IDLEST on OMAP4.
> TRM vM page 958: Table 3-1210. CM_SDMA_SDMA_CLKCTRL.IDLEST
> 
> It might not work, but that's another story. Why did you add that?

When we were discussing omap3 idlest issue, I was under impression that,
it is applicable to omap4 also. If that is not the case, I will remove
this entry.

-Manjunath