* [PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control
2011-01-04 15:09 [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM Sylwester Nawrocki
@ 2011-01-04 15:09 ` Sylwester Nawrocki
2011-01-13 1:29 ` Kukjin Kim
2011-01-04 15:09 ` [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup Sylwester Nawrocki
` (2 subsequent siblings)
3 siblings, 1 reply; 11+ messages in thread
From: Sylwester Nawrocki @ 2011-01-04 15:09 UTC (permalink / raw)
To: linux-arm-kernel
The phy_enable callback in struct s5p_platform_mipi_csis is added
to allow the CSIS driver to control its PHY enable and reset signals.
This allows to use same MIPI CSIS driver across various SoCs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/dev-csis0.c | 2 +-
arch/arm/plat-s5p/dev-csis1.c | 2 +-
arch/arm/plat-s5p/include/plat/csis.h | 28 --------------------
arch/arm/plat-s5p/include/plat/mipi_csis.h | 39 ++++++++++++++++++++++++++++
4 files changed, 41 insertions(+), 30 deletions(-)
delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
index dfab1c8..57efe9c 100644
--- a/arch/arm/plat-s5p/dev-csis0.c
+++ b/arch/arm/plat-s5p/dev-csis0.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 0
*
diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c
index e3053f2..c61b46b 100644
--- a/arch/arm/plat-s5p/dev-csis1.c
+++ b/arch/arm/plat-s5p/dev-csis1.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Samsung Electronics
+ * Copyright (C) 2010 Samsung Electronics Co., Ltd
*
* S5P series device definition for MIPI-CSIS channel 1
*
diff --git a/arch/arm/plat-s5p/include/plat/csis.h b/arch/arm/plat-s5p/include/plat/csis.h
deleted file mode 100644
index 51e308c..0000000
--- a/arch/arm/plat-s5p/include/plat/csis.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics
- *
- * S5P series MIPI CSI slave device support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef PLAT_S5P_CSIS_H_
-#define PLAT_S5P_CSIS_H_ __FILE__
-
-/**
- * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
- * @clk_rate: bus clock frequency
- * @lanes: number of data lanes used
- * @alignment: data alignment in bits
- * @hs_settle: HS-RX settle time
- */
-struct s5p_platform_mipi_csis {
- unsigned long clk_rate;
- u8 lanes;
- u8 alignment;
- u8 hs_settle;
-};
-
-#endif /* PLAT_S5P_CSIS_H_ */
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
new file mode 100644
index 0000000..0b22065
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics, Co. Ltd
+ *
+ * S5P series MIPI CSI slave device support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_S5P_MIPI_CSIS_H_
+#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
+
+struct platform_device;
+
+/**
+ * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
+ * @clk_rate: bus clock frequency
+ * @lanes: number of data lanes used
+ * @alignment: data alignment in bits
+ * @hs_settle: HS-RX settle time
+ */
+struct s5p_platform_mipi_csis {
+ unsigned long clk_rate;
+ u8 lanes;
+ u8 alignment;
+ u8 hs_settle;
+ int (*phy_enable)(struct platform_device *pdev, bool on);
+};
+
+/**
+ * struct s5p_csis_phy_control - global MIPI-CSIS PHY control
+ * @pdev: platform device the mipi phy state is to be changed for
+ * @on: true to enable CSIS PHY and assert its reset,
+ * false will disable the PHY and put into reset state
+ */
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
+
+#endif /* PLAT_S5P_MIPI_CSIS_H_ */
--
1.7.3.4
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control
2011-01-04 15:09 ` [PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control Sylwester Nawrocki
@ 2011-01-13 1:29 ` Kukjin Kim
2011-01-13 2:12 ` Sylwester Nawrocki
0 siblings, 1 reply; 11+ messages in thread
From: Kukjin Kim @ 2011-01-13 1:29 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> The phy_enable callback in struct s5p_platform_mipi_csis is added
> to allow the CSIS driver to control its PHY enable and reset signals.
> This allows to use same MIPI CSIS driver across various SoCs.
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/plat-s5p/dev-csis0.c | 2 +-
> arch/arm/plat-s5p/dev-csis1.c | 2 +-
> arch/arm/plat-s5p/include/plat/csis.h | 28 --------------------
> arch/arm/plat-s5p/include/plat/mipi_csis.h | 39
> ++++++++++++++++++++++++++++
> 4 files changed, 41 insertions(+), 30 deletions(-)
> delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
> create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
>
> diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
> index dfab1c8..57efe9c 100644j
> --- a/arch/arm/plat-s5p/dev-csis0.c
> +++ b/arch/arm/plat-s5p/dev-csis0.c
> @@ -1,5 +1,5 @@
> /*
> - * Copyright (C) 2010 Samsung Electronics
> + * Copyright (C) 2010 Samsung Electronics Co., Ltd
> *
> * S5P series device definition for MIPI-CSIS channel 0
> *
> diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c
> index e3053f2..c61b46b 100644
> --- a/arch/arm/plat-s5p/dev-csis1.c
> +++ b/arch/arm/plat-s5p/dev-csis1.c
> @@ -1,5 +1,5 @@
> /*
> - * Copyright (C) 2010 Samsung Electronics
> + * Copyright (C) 2010 Samsung Electronics Co., Ltd
> *
> * S5P series device definition for MIPI-CSIS channel 1
> *
> diff --git a/arch/arm/plat-s5p/include/plat/csis.h b/arch/arm/plat-
> s5p/include/plat/csis.h
> deleted file mode 100644
> index 51e308c..0000000
> --- a/arch/arm/plat-s5p/include/plat/csis.h
> +++ /dev/null
> @@ -1,28 +0,0 @@
> -/*
> - * Copyright (C) 2010 Samsung Electronics
> - *
> - * S5P series MIPI CSI slave device support
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#ifndef PLAT_S5P_CSIS_H_
> -#define PLAT_S5P_CSIS_H_ __FILE__
> -
> -/**
> - * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
> - * @clk_rate: bus clock frequency
> - * @lanes: number of data lanes used
> - * @alignment: data alignment in bits
> - * @hs_settle: HS-RX settle time
> - */
> -struct s5p_platform_mipi_csis {
> - unsigned long clk_rate;
> - u8 lanes;
> - u8 alignment;
> - u8 hs_settle;
> -};
> -
> -#endif /* PLAT_S5P_CSIS_H_ */
> diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-
> s5p/include/plat/mipi_csis.h
> new file mode 100644
> index 0000000..0b22065
> --- /dev/null
> +++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h
> @@ -0,0 +1,39 @@
> +/*
> + * Copyright (C) 2010 Samsung Electronics, Co. Ltd
> + *
> + * S5P series MIPI CSI slave device support
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef PLAT_S5P_MIPI_CSIS_H_
> +#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
> +
> +struct platform_device;
> +
> +/**
> + * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS
> + * @clk_rate: bus clock frequency
> + * @lanes: number of data lanes used
> + * @alignment: data alignment in bits
> + * @hs_settle: HS-RX settle time
> + */
> +struct s5p_platform_mipi_csis {
> + unsigned long clk_rate;
> + u8 lanes;
> + u8 alignment;
> + u8 hs_settle;
> + int (*phy_enable)(struct platform_device *pdev, bool on);
> +};
> +
> +/**
> + * struct s5p_csis_phy_control - global MIPI-CSIS PHY control
> + * @pdev: platform device the mipi phy state is to be changed for
> + * @on: true to enable CSIS PHY and assert its reset,
> + * false will disable the PHY and put into reset state
> + */
> +int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
> +
> +#endif /* PLAT_S5P_MIPI_CSIS_H_ */
> --
> 1.7.3.4
I think should be separated like following.
If required, ...
1. change copyright
2. rename csis.h to mipi_csis.h
3. add phy enable feature
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control
2011-01-13 1:29 ` Kukjin Kim
@ 2011-01-13 2:12 ` Sylwester Nawrocki
0 siblings, 0 replies; 11+ messages in thread
From: Sylwester Nawrocki @ 2011-01-13 2:12 UTC (permalink / raw)
To: linux-arm-kernel
Hi Kukjin,
thank you for the update.
On 01/13/2011 10:29 AM, Kukjin Kim wrote:
> Sylwester Nawrocki wrote:
>>
>> The phy_enable callback in struct s5p_platform_mipi_csis is added
>> to allow the CSIS driver to control its PHY enable and reset signals.
>> This allows to use same MIPI CSIS driver across various SoCs.
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>> arch/arm/plat-s5p/dev-csis0.c | 2 +-
>> arch/arm/plat-s5p/dev-csis1.c | 2 +-
>> arch/arm/plat-s5p/include/plat/csis.h | 28 --------------------
>> arch/arm/plat-s5p/include/plat/mipi_csis.h | 39
>> ++++++++++++++++++++++++++++
>> 4 files changed, 41 insertions(+), 30 deletions(-)
>> delete mode 100644 arch/arm/plat-s5p/include/plat/csis.h
>> create mode 100644 arch/arm/plat-s5p/include/plat/mipi_csis.h
>>
...
>
> I think should be separated like following.
>
> If required, ...
>
> 1. change copyright
> 2. rename csis.h to mipi_csis.h
I don't want to bother with a separate patches for that, just prefer
to drop the above changes.
> 3. add phy enable feature
OK, I would reduce the patch to that change only.
Regards,
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup
2011-01-04 15:09 [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM Sylwester Nawrocki
2011-01-04 15:09 ` [PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control Sylwester Nawrocki
@ 2011-01-04 15:09 ` Sylwester Nawrocki
2011-01-13 1:33 ` Kukjin Kim
2011-01-04 15:09 ` [PATCH/RFC 3/3] ARM: S5PV210: " Sylwester Nawrocki
2011-01-12 11:39 ` [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM Sylwester Nawrocki
3 siblings, 1 reply; 11+ messages in thread
From: Sylwester Nawrocki @ 2011-01-04 15:09 UTC (permalink / raw)
To: linux-arm-kernel
MIPI_PHYn_CONTROL registers are shared between MIPI DSIM
and MIPI CSIS drivers so a spinlock is used to protect multiple
access to these registers. Also a proper state of a common
PHY enable bit is maintained in order to avoid a DSIM
and CSIS driver conflict.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv310/Kconfig | 6 ++
arch/arm/mach-s5pv310/Makefile | 2 +
arch/arm/mach-s5pv310/include/mach/map.h | 7 +--
arch/arm/mach-s5pv310/include/mach/regs-pmu.h | 6 ++
arch/arm/mach-s5pv310/setup-mipi.c | 62 +++++++++++++++++++++++++
5 files changed, 79 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mach-s5pv310/setup-mipi.c
diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig
index b7aa3cd..2420076 100644
--- a/arch/arm/mach-s5pv310/Kconfig
+++ b/arch/arm/mach-s5pv310/Kconfig
@@ -15,6 +15,11 @@ config CPU_S5PV310
help
Enable S5PV310 CPU support
+config S5PV310_SETUP_MIPI
+ bool
+ help
+ Common setup code for MIPI CSIS/DSIM channels 0 and 1.
+
config S5PV310_DEV_PD
bool
help
@@ -96,6 +101,7 @@ config MACH_UNIVERSAL_C210
select S3C_DEV_HSMMC3
select S5PV310_SETUP_SDHCI
select S3C_DEV_I2C1
+ select S5PV310_SETUP_MIPI
select S5PV310_SETUP_I2C1
help
Machine support for Samsung Mobile Universal S5PC210 Reference
diff --git a/arch/arm/mach-s5pv310/Makefile b/arch/arm/mach-s5pv310/Makefile
index 651f193..7f1b89b 100644
--- a/arch/arm/mach-s5pv310/Makefile
+++ b/arch/arm/mach-s5pv310/Makefile
@@ -29,6 +29,8 @@ obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
# device support
obj-y += dev-audio.o
+
+obj-$(CONFIG_S5PV310_SETUP_MIPI) += setup-mipi.o
obj-$(CONFIG_S5PV310_DEV_PD) += dev-pd.o
obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 33bcff2..6635287 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -65,8 +65,7 @@
#define S5PV310_PA_GPIO2 (0x11000000)
#define S5PV310_PA_GPIO3 (0x03860000)
-#define S5PV310_PA_MIPI_CSIS0 0x11880000
-#define S5PV310_PA_MIPI_CSIS1 0x11890000
+#define S5PV310_PA_MIPI_CSIS(x) (0x11880000 + ((x) * 0x10000))
#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
@@ -124,7 +123,7 @@
#define S3C_PA_IIC7 S5PV310_PA_IIC(7)
#define S3C_PA_RTC S5PV310_PA_RTC
#define S3C_PA_WDT S5PV310_PA_WATCHDOG
-#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0
-#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1
+#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS(0)
+#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS(1)
#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
index fb333d0..bef8102 100644
--- a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
+++ b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
@@ -27,4 +27,10 @@
#define S5P_INT_LOCAL_PWR_EN 0x7
+#define S5P_MIPI_PHY0_CONTROL S5P_PMUREG(0x0710)
+#define S5P_MIPI_PHY1_CONTROL S5P_PMUREG(0x0714)
+#define S5P_MIPI_PHY_ENABLE (1 << 0)
+#define S5P_MIPI_PHY_SRESETN (1 << 1)
+#define S5P_MIPI_PHY_MRESETN (1 << 2)
+
#endif /* __ASM_ARCH_REGS_PMU_H */
diff --git a/arch/arm/mach-s5pv310/setup-mipi.c b/arch/arm/mach-s5pv310/setup-mipi.c
new file mode 100644
index 0000000..fc91a29
--- /dev/null
+++ b/arch/arm/mach-s5pv310/setup-mipi.c
@@ -0,0 +1,62 @@
+/* linux/arch/arm/mach-s5pv310/setup-mipi.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd
+ *
+ * S5PV310 - Helper functions for MIPI CSIS/DSIM PHY control
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <mach/regs-pmu.h>
+
+/* Global MIPI CSIS or DSIM PHY enable and reset control. */
+static int s5p_mipi_phy_control(struct platform_device *pdev, bool on, u32 rst)
+{
+ static DEFINE_SPINLOCK(lock);
+ void __iomem *addr;
+ unsigned long flags;
+ int pid;
+ u32 cfg;
+
+ if (pdev == NULL)
+ return -EINVAL;
+
+ pid = pdev->id;
+ if (pid != 0 && pid != 1)
+ return -EINVAL;
+
+ addr = pid ? S5P_MIPI_PHY1_CONTROL : S5P_MIPI_PHY0_CONTROL;
+
+ spin_lock_irqsave(&lock, flags);
+
+ cfg = __raw_readl(addr) & ~rst;
+ if (on)
+ cfg |= rst;
+ __raw_writel(cfg, addr);
+
+ if (on)
+ cfg |= S5P_MIPI_PHY_ENABLE;
+ else if (!(cfg & (S5P_MIPI_PHY_SRESETN | S5P_MIPI_PHY_MRESETN) & ~rst))
+ cfg &= ~S5P_MIPI_PHY_ENABLE;
+
+ __raw_writel(cfg, addr);
+
+ spin_unlock_irqrestore(&lock, flags);
+ return 0;
+}
+
+int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
+{
+ return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_SRESETN);
+}
+
+int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
+{
+ return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_MRESETN);
+}
--
1.7.3.4
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup
2011-01-04 15:09 ` [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup Sylwester Nawrocki
@ 2011-01-13 1:33 ` Kukjin Kim
2011-01-13 2:36 ` Sylwester Nawrocki
2011-02-07 16:20 ` Sylwester Nawrocki
0 siblings, 2 replies; 11+ messages in thread
From: Kukjin Kim @ 2011-01-13 1:33 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> MIPI_PHYn_CONTROL registers are shared between MIPI DSIM
> and MIPI CSIS drivers so a spinlock is used to protect multiple
> access to these registers. Also a proper state of a common
> PHY enable bit is maintained in order to avoid a DSIM
> and CSIS driver conflict.
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/mach-s5pv310/Kconfig | 6 ++
> arch/arm/mach-s5pv310/Makefile | 2 +
> arch/arm/mach-s5pv310/include/mach/map.h | 7 +--
> arch/arm/mach-s5pv310/include/mach/regs-pmu.h | 6 ++
> arch/arm/mach-s5pv310/setup-mipi.c | 62
> +++++++++++++++++++++++++
> 5 files changed, 79 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm/mach-s5pv310/setup-mipi.c
>
> diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig
> index b7aa3cd..2420076 100644
> --- a/arch/arm/mach-s5pv310/Kconfig
> +++ b/arch/arm/mach-s5pv310/Kconfig
> @@ -15,6 +15,11 @@ config CPU_S5PV310
> help
> Enable S5PV310 CPU support
>
> +config S5PV310_SETUP_MIPI
> + bool
> + help
> + Common setup code for MIPI CSIS/DSIM channels 0 and 1.
> +
> config S5PV310_DEV_PD
> bool
> help
> @@ -96,6 +101,7 @@ config MACH_UNIVERSAL_C210
> select S3C_DEV_HSMMC3
> select S5PV310_SETUP_SDHCI
> select S3C_DEV_I2C1
> + select S5PV310_SETUP_MIPI
> select S5PV310_SETUP_I2C1
> help
> Machine support for Samsung Mobile Universal S5PC210 Reference
> diff --git a/arch/arm/mach-s5pv310/Makefile
b/arch/arm/mach-s5pv310/Makefile
> index 651f193..7f1b89b 100644
> --- a/arch/arm/mach-s5pv310/Makefile
> +++ b/arch/arm/mach-s5pv310/Makefile
> @@ -29,6 +29,8 @@ obj-$(CONFIG_MACH_UNIVERSAL_C210) +=
mach-universal_c210.o
> # device support
>
> obj-y += dev-audio.o
> +
> +obj-$(CONFIG_S5PV310_SETUP_MIPI) += setup-mipi.o
> obj-$(CONFIG_S5PV310_DEV_PD) += dev-pd.o
>
> obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o
> diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-
> s5pv310/include/mach/map.h
> index 33bcff2..6635287 100644
> --- a/arch/arm/mach-s5pv310/include/mach/map.h
> +++ b/arch/arm/mach-s5pv310/include/mach/map.h
> @@ -65,8 +65,7 @@
> #define S5PV310_PA_GPIO2 (0x11000000)
> #define S5PV310_PA_GPIO3 (0x03860000)
>
> -#define S5PV310_PA_MIPI_CSIS0 0x11880000
> -#define S5PV310_PA_MIPI_CSIS1 0x11890000
> +#define S5PV310_PA_MIPI_CSIS(x) (0x11880000 + ((x) *
0x10000))
>
> #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
>
> @@ -124,7 +123,7 @@
> #define S3C_PA_IIC7 S5PV310_PA_IIC(7)
> #define S3C_PA_RTC S5PV310_PA_RTC
> #define S3C_PA_WDT S5PV310_PA_WATCHDOG
> -#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0
> -#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1
> +#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS(0)
> +#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS(1)
>
> #endif /* __ASM_ARCH_MAP_H */
> diff --git a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
b/arch/arm/mach-
> s5pv310/include/mach/regs-pmu.h
> index fb333d0..bef8102 100644
> --- a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
> +++ b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
> @@ -27,4 +27,10 @@
>
> #define S5P_INT_LOCAL_PWR_EN 0x7
>
> +#define S5P_MIPI_PHY0_CONTROL S5P_PMUREG(0x0710)
> +#define S5P_MIPI_PHY1_CONTROL S5P_PMUREG(0x0714)
> +#define S5P_MIPI_PHY_ENABLE (1 << 0)
> +#define S5P_MIPI_PHY_SRESETN (1 << 1)
> +#define S5P_MIPI_PHY_MRESETN (1 << 2)
> +
> #endif /* __ASM_ARCH_REGS_PMU_H */
> diff --git a/arch/arm/mach-s5pv310/setup-mipi.c b/arch/arm/mach-
> s5pv310/setup-mipi.c
> new file mode 100644
> index 0000000..fc91a29
> --- /dev/null
> +++ b/arch/arm/mach-s5pv310/setup-mipi.c
> @@ -0,0 +1,62 @@
> +/* linux/arch/arm/mach-s5pv310/setup-mipi.c
> + *
> + * Copyright (c) 2010 Samsung Electronics Co., Ltd
> + *
> + * S5PV310 - Helper functions for MIPI CSIS/DSIM PHY control
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include <linux/spinlock.h>
> +#include <mach/regs-pmu.h>
> +
> +/* Global MIPI CSIS or DSIM PHY enable and reset control. */
> +static int s5p_mipi_phy_control(struct platform_device *pdev, bool on,
u32
> rst)
> +{
> + static DEFINE_SPINLOCK(lock);
> + void __iomem *addr;
> + unsigned long flags;
> + int pid;
> + u32 cfg;
> +
> + if (pdev == NULL)
> + return -EINVAL;
> +
> + pid = pdev->id;
> + if (pid != 0 && pid != 1)
> + return -EINVAL;
> +
> + addr = pid ? S5P_MIPI_PHY1_CONTROL : S5P_MIPI_PHY0_CONTROL;
> +
> + spin_lock_irqsave(&lock, flags);
> +
> + cfg = __raw_readl(addr) & ~rst;
> + if (on)
> + cfg |= rst;
> + __raw_writel(cfg, addr);
> +
> + if (on)
> + cfg |= S5P_MIPI_PHY_ENABLE;
> + else if (!(cfg & (S5P_MIPI_PHY_SRESETN | S5P_MIPI_PHY_MRESETN) &
~rst))
> + cfg &= ~S5P_MIPI_PHY_ENABLE;
> +
> + __raw_writel(cfg, addr);
> +
> + spin_unlock_irqrestore(&lock, flags);
> + return 0;
> +}
> +
> +int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
> +{
> + return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_SRESETN);
> +}
> +
> +int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
> +{
> + return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_MRESETN);
> +}
> --
> 1.7.3.4
Basically, it's not good that each machine(SoC) has each own setup-mipi...
Because it is very similar(almost same)...means can move it in plat-s5p with
following.
1. # of MIPI PHY can be calculated by platform device id
2. can use same definition of MIPI PHY control address with same name
re-mapping.
And hmm...need to re-think about this after this merge window...
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup
2011-01-13 1:33 ` Kukjin Kim
@ 2011-01-13 2:36 ` Sylwester Nawrocki
2011-02-07 16:20 ` Sylwester Nawrocki
1 sibling, 0 replies; 11+ messages in thread
From: Sylwester Nawrocki @ 2011-01-13 2:36 UTC (permalink / raw)
To: linux-arm-kernel
On 01/13/2011 10:33 AM, Kukjin Kim wrote:
> Sylwester Nawrocki wrote:
>>
>> MIPI_PHYn_CONTROL registers are shared between MIPI DSIM
>> and MIPI CSIS drivers so a spinlock is used to protect multiple
>> access to these registers. Also a proper state of a common
>> PHY enable bit is maintained in order to avoid a DSIM
>> and CSIS driver conflict.
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
...
>
> Basically, it's not good that each machine(SoC) has each own setup-mipi...
> Because it is very similar(almost same)...means can move it in plat-s5p with
> following.
>
> 1. # of MIPI PHY can be calculated by platform device id
> 2. can use same definition of MIPI PHY control address with same name
> re-mapping.
Yes, I agree with that. Originally I had it done it plat-s5p, I will
prepare a merged version. The main difference between s5pv210 and s5pv310
indeed was the register naming and placement in PMU or CLK subsystem, so the
register address definitions were in regs-clk.h or regs-pmu.h. So there
just will have to be included different header files depending on on SoC
architecture.
Regards,
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup
2011-01-13 1:33 ` Kukjin Kim
2011-01-13 2:36 ` Sylwester Nawrocki
@ 2011-02-07 16:20 ` Sylwester Nawrocki
1 sibling, 0 replies; 11+ messages in thread
From: Sylwester Nawrocki @ 2011-02-07 16:20 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On 01/13/2011 02:33 AM, Kukjin Kim wrote:
> Sylwester Nawrocki wrote:
>>
>> MIPI_PHYn_CONTROL registers are shared between MIPI DSIM
>> and MIPI CSIS drivers so a spinlock is used to protect multiple
>> access to these registers. Also a proper state of a common
>> PHY enable bit is maintained in order to avoid a DSIM
>> and CSIS driver conflict.
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>> arch/arm/mach-s5pv310/Kconfig | 6 ++
>> arch/arm/mach-s5pv310/Makefile | 2 +
>> arch/arm/mach-s5pv310/include/mach/map.h | 7 +--
>> arch/arm/mach-s5pv310/include/mach/regs-pmu.h | 6 ++
>> arch/arm/mach-s5pv310/setup-mipi.c | 62
>> +++++++++++++++++++++++++
>> 5 files changed, 79 insertions(+), 4 deletions(-)
>> create mode 100644 arch/arm/mach-s5pv310/setup-mipi.c
>>
>> diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig
>> index b7aa3cd..2420076 100644
>> --- a/arch/arm/mach-s5pv310/Kconfig
>> +++ b/arch/arm/mach-s5pv310/Kconfig
>> @@ -15,6 +15,11 @@ config CPU_S5PV310
>> help
>> Enable S5PV310 CPU support
>>
>> +config S5PV310_SETUP_MIPI
>> + bool
>> + help
>> + Common setup code for MIPI CSIS/DSIM channels 0 and 1.
>> +
>> config S5PV310_DEV_PD
>> bool
>> help
>> @@ -96,6 +101,7 @@ config MACH_UNIVERSAL_C210
>> select S3C_DEV_HSMMC3
>> select S5PV310_SETUP_SDHCI
>> select S3C_DEV_I2C1
>> + select S5PV310_SETUP_MIPI
>> select S5PV310_SETUP_I2C1
>> help
>> Machine support for Samsung Mobile Universal S5PC210 Reference
>> diff --git a/arch/arm/mach-s5pv310/Makefile
> b/arch/arm/mach-s5pv310/Makefile
>> index 651f193..7f1b89b 100644
>> --- a/arch/arm/mach-s5pv310/Makefile
>> +++ b/arch/arm/mach-s5pv310/Makefile
>> @@ -29,6 +29,8 @@ obj-$(CONFIG_MACH_UNIVERSAL_C210) +=
> mach-universal_c210.o
>> # device support
>>
>> obj-y += dev-audio.o
>> +
>> +obj-$(CONFIG_S5PV310_SETUP_MIPI) += setup-mipi.o
>> obj-$(CONFIG_S5PV310_DEV_PD) += dev-pd.o
>>
>> obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o
>> diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-
>> s5pv310/include/mach/map.h
>> index 33bcff2..6635287 100644
>> --- a/arch/arm/mach-s5pv310/include/mach/map.h
>> +++ b/arch/arm/mach-s5pv310/include/mach/map.h
>> @@ -65,8 +65,7 @@
>> #define S5PV310_PA_GPIO2 (0x11000000)
>> #define S5PV310_PA_GPIO3 (0x03860000)
>>
>> -#define S5PV310_PA_MIPI_CSIS0 0x11880000
>> -#define S5PV310_PA_MIPI_CSIS1 0x11890000
>> +#define S5PV310_PA_MIPI_CSIS(x) (0x11880000 + ((x) *
> 0x10000))
>>
>> #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
>>
>> @@ -124,7 +123,7 @@
>> #define S3C_PA_IIC7 S5PV310_PA_IIC(7)
>> #define S3C_PA_RTC S5PV310_PA_RTC
>> #define S3C_PA_WDT S5PV310_PA_WATCHDOG
>> -#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0
>> -#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1
>> +#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS(0)
>> +#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS(1)
>>
>> #endif /* __ASM_ARCH_MAP_H */
>> diff --git a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
> b/arch/arm/mach-
>> s5pv310/include/mach/regs-pmu.h
>> index fb333d0..bef8102 100644
>> --- a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
>> +++ b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
>> @@ -27,4 +27,10 @@
>>
>> #define S5P_INT_LOCAL_PWR_EN 0x7
>>
>> +#define S5P_MIPI_PHY0_CONTROL S5P_PMUREG(0x0710)
>> +#define S5P_MIPI_PHY1_CONTROL S5P_PMUREG(0x0714)
>> +#define S5P_MIPI_PHY_ENABLE (1 << 0)
>> +#define S5P_MIPI_PHY_SRESETN (1 << 1)
>> +#define S5P_MIPI_PHY_MRESETN (1 << 2)
>> +
>> #endif /* __ASM_ARCH_REGS_PMU_H */
>> diff --git a/arch/arm/mach-s5pv310/setup-mipi.c b/arch/arm/mach-
>> s5pv310/setup-mipi.c
>> new file mode 100644
>> index 0000000..fc91a29
>> --- /dev/null
>> +++ b/arch/arm/mach-s5pv310/setup-mipi.c
>> @@ -0,0 +1,62 @@
>> +/* linux/arch/arm/mach-s5pv310/setup-mipi.c
>> + *
>> + * Copyright (c) 2010 Samsung Electronics Co., Ltd
>> + *
>> + * S5PV310 - Helper functions for MIPI CSIS/DSIM PHY control
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/io.h>
>> +#include <linux/spinlock.h>
>> +#include <mach/regs-pmu.h>
>> +
>> +/* Global MIPI CSIS or DSIM PHY enable and reset control. */
>> +static int s5p_mipi_phy_control(struct platform_device *pdev, bool on,
> u32
>> rst)
>> +{
>> + static DEFINE_SPINLOCK(lock);
>> + void __iomem *addr;
>> + unsigned long flags;
>> + int pid;
>> + u32 cfg;
>> +
>> + if (pdev == NULL)
>> + return -EINVAL;
>> +
>> + pid = pdev->id;
>> + if (pid != 0 && pid != 1)
>> + return -EINVAL;
>> +
>> + addr = pid ? S5P_MIPI_PHY1_CONTROL : S5P_MIPI_PHY0_CONTROL;
>> +
>> + spin_lock_irqsave(&lock, flags);
>> +
>> + cfg = __raw_readl(addr) & ~rst;
>> + if (on)
>> + cfg |= rst;
>> + __raw_writel(cfg, addr);
>> +
>> + if (on)
>> + cfg |= S5P_MIPI_PHY_ENABLE;
>> + else if (!(cfg & (S5P_MIPI_PHY_SRESETN | S5P_MIPI_PHY_MRESETN) &
> ~rst))
>> + cfg &= ~S5P_MIPI_PHY_ENABLE;
>> +
>> + __raw_writel(cfg, addr);
>> +
>> + spin_unlock_irqrestore(&lock, flags);
>> + return 0;
>> +}
>> +
>> +int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
>> +{
>> + return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_SRESETN);
>> +}
>> +
>> +int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
>> +{
>> + return s5p_mipi_phy_control(pdev, on, S5P_MIPI_PHY_MRESETN);
>> +}
>> --
>> 1.7.3.4
>
> Basically, it's not good that each machine(SoC) has each own setup-mipi...
> Because it is very similar(almost same)...means can move it in plat-s5p with
> following.
>
> 1. # of MIPI PHY can be calculated by platform device id
> 2. can use same definition of MIPI PHY control address with same name
> re-mapping.
>
There one serious problem with that approach though, we cannot make a common
kernel binary for multiple archs. When each mach-s5p* has it's own setup code
the is no issue as those files would be compiled with their respective headers.
How do we solve that problem with common code in plat-s5p? Any comments, ideas?
Regards,
Sylwester
--
Sylwester Nawrocki
Samsung Poland R&D Center
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH/RFC 3/3] ARM: S5PV210: Add a platform helper for MIPI DSIM/CSIS setup
2011-01-04 15:09 [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM Sylwester Nawrocki
2011-01-04 15:09 ` [PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control Sylwester Nawrocki
2011-01-04 15:09 ` [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup Sylwester Nawrocki
@ 2011-01-04 15:09 ` Sylwester Nawrocki
2011-01-12 11:39 ` [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM Sylwester Nawrocki
3 siblings, 0 replies; 11+ messages in thread
From: Sylwester Nawrocki @ 2011-01-04 15:09 UTC (permalink / raw)
To: linux-arm-kernel
This platform callback allows the MIPI DSIM and CSIS drivers
to control their corresponding PHYs without conflicts.
This patch also enables the MIPI setup code on Aquila board.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/Kconfig | 6 +++
arch/arm/mach-s5pv210/Makefile | 1 +
arch/arm/mach-s5pv210/include/mach/regs-clock.h | 4 ++
arch/arm/mach-s5pv210/setup-mipi.c | 52 +++++++++++++++++++++++
4 files changed, 63 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-s5pv210/setup-mipi.c
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 53aabef..b93ea37 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -37,6 +37,11 @@ config S5PV210_SETUP_FB_24BPP
help
Common setup code for S5PV210 with an 24bpp RGB display helper.
+config S5PV210_SETUP_MIPI
+ bool
+ help
+ Common setup code for S5PV210 MIPI DSIM/CSIS configuration.
+
config S5PV210_SETUP_KEYPAD
bool
help
@@ -62,6 +67,7 @@ config MACH_AQUILA
select S5P_DEV_FIMC0
select S5P_DEV_FIMC1
select S5P_DEV_FIMC2
+ select S5PV210_SETUP_MIPI
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC1
select S3C_DEV_HSMMC2
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index ff1a0db..fd01315 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -31,6 +31,7 @@ obj-y += dev-audio.o
obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
+obj-$(CONFIG_S5PV210_SETUP_MIPI) += setup-mipi.o
obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 4c45b74..89b88eb 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -162,6 +162,10 @@
#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814)
+#define S5P_MIPI_DPHY_ENABLE (1 << 0)
+#define S5P_MIPI_DPHY_SRESETN (1 << 1)
+#define S5P_MIPI_DPHY_MRESETN (1 << 2)
+
#define S5P_IDLE_CFG_TL_MASK (3 << 30)
#define S5P_IDLE_CFG_TM_MASK (3 << 28)
diff --git a/arch/arm/mach-s5pv210/setup-mipi.c b/arch/arm/mach-s5pv210/setup-mipi.c
new file mode 100644
index 0000000..f644e8c
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-mipi.c
@@ -0,0 +1,52 @@
+/* linux/arch/arm/mach-s5pv210/setup-mipi.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd
+ *
+ * S5PV210 - Helper functions for MIPI CSIS/DSIM PHY control
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <mach/regs-clock.h>
+
+/* Global MIPI CSIS or DSIM PHY enable and reset control. */
+int s5p_mipi_phy_control(struct platform_device *pdev, bool on, u32 rst)
+{
+ static DEFINE_SPINLOCK(lock);
+ unsigned long flags;
+ u32 cfg;
+
+ spin_lock_irqsave(&lock, flags);
+
+ cfg = __raw_readl(S5P_MIPI_DPHY_CONTROL) & ~rst;
+ if (on)
+ cfg |= rst;
+ __raw_writel(cfg, S5P_MIPI_DPHY_CONTROL);
+
+ if (on)
+ cfg |= S5P_MIPI_DPHY_ENABLE;
+ else if (!(cfg & (S5P_MIPI_DPHY_SRESETN | S5P_MIPI_DPHY_MRESETN) & ~rst))
+ cfg &= ~S5P_MIPI_DPHY_ENABLE;
+
+ __raw_writel(cfg, S5P_MIPI_DPHY_CONTROL);
+
+ spin_unlock_irqrestore(&lock, flags);
+
+ return 0;
+}
+
+int s5p_csis_phy_control(struct platform_device *pdev, bool on)
+{
+ return s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_SRESETN);
+}
+
+int s5p_dsim_phy_control(struct platform_device *pdev, bool on)
+{
+ return s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_MRESETN);
+}
--
1.7.3.4
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM
2011-01-04 15:09 [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM Sylwester Nawrocki
` (2 preceding siblings ...)
2011-01-04 15:09 ` [PATCH/RFC 3/3] ARM: S5PV210: " Sylwester Nawrocki
@ 2011-01-12 11:39 ` Sylwester Nawrocki
2011-01-12 22:34 ` Kukjin Kim
3 siblings, 1 reply; 11+ messages in thread
From: Sylwester Nawrocki @ 2011-01-12 11:39 UTC (permalink / raw)
To: linux-arm-kernel
On 01/04/2011 04:09 PM, Sylwester Nawrocki wrote:
> Hello,
>
> the following patch series adds the common platform code for configuration
> of the MIPI CSIS and MIPI DSIM PHYs on S5PV210 and S5PV310 SoCs.
> The spinlock is used to avoid races while the common PHY control register
> is accessed from within MIPI DSIM and MIPI CSIS drivers.
> The common PHY enable bit is cleared only when both CSIS and DSIM devices
> are not in use.
>
>
> The patch series contains:
>
> [PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control
> [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS setup
> [PATCH/RFC 3/3] ARM: S5PV210: Add a platform helper for MIPI DSIM/CSIS setup
>
Any comments on this one?
Regards,
Sylwester
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM
2011-01-12 11:39 ` [PATCH/RFC 0/3] ARM: S5P: Add a common platform setup code for MIPI CSIS/DSIM Sylwester Nawrocki
@ 2011-01-12 22:34 ` Kukjin Kim
0 siblings, 0 replies; 11+ messages in thread
From: Kukjin Kim @ 2011-01-12 22:34 UTC (permalink / raw)
To: linux-arm-kernel
Sylwester Nawrocki wrote:
>
> On 01/04/2011 04:09 PM, Sylwester Nawrocki wrote:
> > Hello,
> >
> > the following patch series adds the common platform code for configuration
> > of the MIPI CSIS and MIPI DSIM PHYs on S5PV210 and S5PV310 SoCs.
> > The spinlock is used to avoid races while the common PHY control register
> > is accessed from within MIPI DSIM and MIPI CSIS drivers.
> > The common PHY enable bit is cleared only when both CSIS and DSIM devices
> > are not in use.
> >
> >
> > The patch series contains:
> >
> > [PATCH/RFC 1/3] ARM: S5P: Add a platform callback for MIPI CSIS PHY control
> > [PATCH/RFC 2/3] ARM: S5PV310: Add a platform helper for MIPI DSIM/CSIS
> setup
> > [PATCH/RFC 3/3] ARM: S5PV210: Add a platform helper for MIPI DSIM/CSIS
> setup
> >
>
> Any comments on this one?
>
Hi,
It's 38 merge window now. So I want to wait until after this merge window.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 11+ messages in thread