From: b-cousson@ti.com (Cousson, Benoit)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] OMAP3 and 4 hwmod I2C units only allow 16 bit access
Date: Thu, 3 Mar 2011 18:42:10 +0100 [thread overview]
Message-ID: <4D6FD2F2.8050701@ti.com> (raw)
In-Reply-To: <20110303135022.30648.8996.stgit@otae.warmcat.com>
On 3/3/2011 2:50 PM, Andy Green wrote:
> Peter Maydell noticed when running under QEMU he was getting
> errors reporting 32-bit access to I2C peripheral unit registers
> that are documented to be 8 or 16-bit only[1][2]
Well, in that case, it is more a QEMU bug since the HW is working fine
with 32 bits access to sysconfig :-)
> The I2C driver is blameless as it wraps its accesses in a
> function using __raw_writew and __raw_readw, it turned out it
> is the hwmod stuff.
>
> However the hwmod code already has a flag to force a
> perhipheral unit to only be accessed using 16-bit operations..
In fact that flag was added because 32 bits access to I2C sysconfig was
generating bus abort on 2420 only:
(2004290f55f03c52e22044a5843928cf0f6cc56a).
Since 2430, OMAP3 and OMAP4 are working fine with 32 bits, we were lazy
and didn't add that flag.
Did you check this patch on a real HW? Since this was reported using
QEMU only.
Otherwise, I'm fine with that patch, it will not change anything but
will improve the consistency across SoC version.
BTW, It will be good if you could update the omap_hwmod_2430_data.c file
as well.
Thanks,
Benoit
> This patch applies the 16-bit only flag to the OMAP3xxx and
> OMAP44xx hwmod structs.
>
> [1] OMAP4430 Technical reference manual section 23.1.6.2
> [2] OMAP3530 Techincal reference manual section 18.6
>
> Cc: patches at linaro.org
> Reported-by: Peter Maydell<peter.maydell@linaro.org>
> Signed-off-by: Andy Green<andy.green@linaro.org>
> ---
>
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 3 +++
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 8 ++++----
> 2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> index 541092c..1409779 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
> @@ -1170,6 +1170,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
>
> static struct omap_hwmod omap3xxx_i2c1_hwmod = {
> .name = "i2c1",
> + .flags = HWMOD_16BIT_REG,
> .mpu_irqs = i2c1_mpu_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
> .sdma_reqs = i2c1_sdma_reqs,
> @@ -1212,6 +1213,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
>
> static struct omap_hwmod omap3xxx_i2c2_hwmod = {
> .name = "i2c2",
> + .flags = HWMOD_16BIT_REG,
> .mpu_irqs = i2c2_mpu_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
> .sdma_reqs = i2c2_sdma_reqs,
> @@ -1254,6 +1256,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
>
> static struct omap_hwmod omap3xxx_i2c3_hwmod = {
> .name = "i2c3",
> + .flags = HWMOD_16BIT_REG,
> .mpu_irqs = i2c3_mpu_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs),
> .sdma_reqs = i2c3_sdma_reqs,
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index ce646f2..c500416 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -2280,7 +2280,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
> static struct omap_hwmod omap44xx_i2c1_hwmod = {
> .name = "i2c1",
> .class =&omap44xx_i2c_hwmod_class,
> - .flags = HWMOD_INIT_NO_RESET,
> + .flags = HWMOD_INIT_NO_RESET | HWMOD_16BIT_REG,
> .mpu_irqs = omap44xx_i2c1_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs),
> .sdma_reqs = omap44xx_i2c1_sdma_reqs,
> @@ -2396,7 +2396,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
> static struct omap_hwmod omap44xx_i2c2_hwmod = {
> .name = "i2c2",
> .class =&omap44xx_i2c_hwmod_class,
> - .flags = HWMOD_INIT_NO_RESET,
> + .flags = HWMOD_INIT_NO_RESET | HWMOD_16BIT_REG,
> .mpu_irqs = omap44xx_i2c2_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs),
> .sdma_reqs = omap44xx_i2c2_sdma_reqs,
> @@ -2449,7 +2449,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
> static struct omap_hwmod omap44xx_i2c3_hwmod = {
> .name = "i2c3",
> .class =&omap44xx_i2c_hwmod_class,
> - .flags = HWMOD_INIT_NO_RESET,
> + .flags = HWMOD_INIT_NO_RESET | HWMOD_16BIT_REG,
> .mpu_irqs = omap44xx_i2c3_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs),
> .sdma_reqs = omap44xx_i2c3_sdma_reqs,
> @@ -2502,7 +2502,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
> static struct omap_hwmod omap44xx_i2c4_hwmod = {
> .name = "i2c4",
> .class =&omap44xx_i2c_hwmod_class,
> - .flags = HWMOD_INIT_NO_RESET,
> + .flags = HWMOD_INIT_NO_RESET | HWMOD_16BIT_REG,
> .mpu_irqs = omap44xx_i2c4_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs),
> .sdma_reqs = omap44xx_i2c4_sdma_reqs,
>
> --
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next prev parent reply other threads:[~2011-03-03 17:42 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-03 13:50 [PATCH 0/4] OMAP 3 and 4 i2c fixes Andy Green
2011-03-03 13:50 ` [PATCH 1/4] OMAP3 and 4 hwmod I2C units only allow 16 bit access Andy Green
2011-03-03 17:42 ` Cousson, Benoit [this message]
2011-03-03 17:56 ` Andy Green
2011-03-03 20:40 ` Cousson, Benoit
2011-03-04 8:33 ` Andy Green
2011-03-04 10:05 ` Cousson, Benoit
2011-03-04 15:20 ` Cousson, Benoit
2011-03-03 13:50 ` [PATCH 2/4] OMAP3 I2C document why cpu type and not peripheral unit ID used to probe Andy Green
2011-03-03 21:12 ` Cousson, Benoit
2011-03-04 8:25 ` Andy Green
2011-03-03 13:50 ` [PATCH 3/4] OMAP3 and 4 i2c mark extended reg enums as extended only Andy Green
2011-03-03 21:33 ` Cousson, Benoit
2011-03-04 8:32 ` Andy Green
2011-03-04 10:05 ` Cousson, Benoit
2011-03-03 13:50 ` [PATCH 4/4] OMAP3 and 4 I2C use cpu type consistently for new register availability Andy Green
2011-03-03 21:45 ` Cousson, Benoit
2011-03-03 21:55 ` [PATCH 0/4] OMAP 3 and 4 i2c fixes Cousson, Benoit
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