From: b-cousson@ti.com (Cousson, Benoit)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] OMAP3 and 4 hwmod I2C units only allow 16 bit access
Date: Fri, 4 Mar 2011 16:20:12 +0100 [thread overview]
Message-ID: <4D71032C.9030909@ti.com> (raw)
In-Reply-To: <20110303135022.30648.8996.stgit@otae.warmcat.com>
One more minor comment about the order of the flags for OMAP4.
On 3/3/2011 2:50 PM, Andy Green wrote:
[...]
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index ce646f2..c500416 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -2280,7 +2280,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
> static struct omap_hwmod omap44xx_i2c1_hwmod = {
> .name = "i2c1",
> .class =&omap44xx_i2c_hwmod_class,
> - .flags = HWMOD_INIT_NO_RESET,
> + .flags = HWMOD_INIT_NO_RESET | HWMOD_16BIT_REG,
Since this code is generated by script, the flags are sorted by name.
HWMOD_16BIT_REG should then be the first one. This is of course
applicable for the 4 instances.
I already updated the generator to take the sysconfig register width
into account.
Thanks,
Benoit
> .mpu_irqs = omap44xx_i2c1_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs),
> .sdma_reqs = omap44xx_i2c1_sdma_reqs,
> @@ -2396,7 +2396,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
> static struct omap_hwmod omap44xx_i2c2_hwmod = {
> .name = "i2c2",
> .class =&omap44xx_i2c_hwmod_class,
> - .flags = HWMOD_INIT_NO_RESET,
> + .flags = HWMOD_INIT_NO_RESET | HWMOD_16BIT_REG,
> .mpu_irqs = omap44xx_i2c2_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs),
> .sdma_reqs = omap44xx_i2c2_sdma_reqs,
> @@ -2449,7 +2449,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
> static struct omap_hwmod omap44xx_i2c3_hwmod = {
> .name = "i2c3",
> .class =&omap44xx_i2c_hwmod_class,
> - .flags = HWMOD_INIT_NO_RESET,
> + .flags = HWMOD_INIT_NO_RESET | HWMOD_16BIT_REG,
> .mpu_irqs = omap44xx_i2c3_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs),
> .sdma_reqs = omap44xx_i2c3_sdma_reqs,
> @@ -2502,7 +2502,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
> static struct omap_hwmod omap44xx_i2c4_hwmod = {
> .name = "i2c4",
> .class =&omap44xx_i2c_hwmod_class,
> - .flags = HWMOD_INIT_NO_RESET,
> + .flags = HWMOD_INIT_NO_RESET | HWMOD_16BIT_REG,
> .mpu_irqs = omap44xx_i2c4_irqs,
> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs),
> .sdma_reqs = omap44xx_i2c4_sdma_reqs,
>
> --
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next prev parent reply other threads:[~2011-03-04 15:20 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-03 13:50 [PATCH 0/4] OMAP 3 and 4 i2c fixes Andy Green
2011-03-03 13:50 ` [PATCH 1/4] OMAP3 and 4 hwmod I2C units only allow 16 bit access Andy Green
2011-03-03 17:42 ` Cousson, Benoit
2011-03-03 17:56 ` Andy Green
2011-03-03 20:40 ` Cousson, Benoit
2011-03-04 8:33 ` Andy Green
2011-03-04 10:05 ` Cousson, Benoit
2011-03-04 15:20 ` Cousson, Benoit [this message]
2011-03-03 13:50 ` [PATCH 2/4] OMAP3 I2C document why cpu type and not peripheral unit ID used to probe Andy Green
2011-03-03 21:12 ` Cousson, Benoit
2011-03-04 8:25 ` Andy Green
2011-03-03 13:50 ` [PATCH 3/4] OMAP3 and 4 i2c mark extended reg enums as extended only Andy Green
2011-03-03 21:33 ` Cousson, Benoit
2011-03-04 8:32 ` Andy Green
2011-03-04 10:05 ` Cousson, Benoit
2011-03-03 13:50 ` [PATCH 4/4] OMAP3 and 4 I2C use cpu type consistently for new register availability Andy Green
2011-03-03 21:45 ` Cousson, Benoit
2011-03-03 21:55 ` [PATCH 0/4] OMAP 3 and 4 i2c fixes Cousson, Benoit
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