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* [PATCH] dmaengine: implement pause and resume for dw_dmac
@ 2011-04-19  0:31 Linus Walleij
  2011-04-19  5:29 ` viresh kumar
  0 siblings, 1 reply; 3+ messages in thread
From: Linus Walleij @ 2011-04-19  0:31 UTC (permalink / raw)
  To: linux-arm-kernel

It seems that the SPEAr needs this.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/dma/dw_dmac.c      |   22 ++++++++++++++++++++--
 drivers/dma/dw_dmac_regs.h |    1 +
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 9c25c7d..60ac779 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -801,8 +801,7 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
 	struct dw_desc		*desc, *_desc;
 	LIST_HEAD(list);
 
-	/* Only supports DMA_TERMINATE_ALL */
-	if (cmd != DMA_TERMINATE_ALL)
+	if (cmd != DMA_TERMINATE_ALL && cmd != DMA_PAUSE && cmd != DMA_RESUME)
 		return -ENXIO;
 
 	/*
@@ -813,11 +812,30 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
 	 */
 	spin_lock_bh(&dwc->lock);
 
+	if (cmd == DMA_RESUME) {
+		if (dwc->paused) {
+			channel_set_bit(dw, CH_EN, dwc->mask);
+			while (!dma_readl(dw, CH_EN) & dwc->mask)
+				cpu_relax();
+		}
+		spin_unlock_bh(&dwc->lock);
+		return 0;
+	}
+
 	channel_clear_bit(dw, CH_EN, dwc->mask);
 
 	while (dma_readl(dw, CH_EN) & dwc->mask)
 		cpu_relax();
 
+	if (cmd == DMA_PAUSE) {
+		dwc->paused = true;
+		spin_unlock_bh(&dwc->lock);
+		return 0;
+	}
+
+	/* Terminating a paused transfer */
+	dwc->paused = false;
+
 	/* active_list entries will end up before queued entries */
 	list_splice_init(&dwc->queue, &list);
 	list_splice_init(&dwc->active_list, &list);
diff --git a/drivers/dma/dw_dmac_regs.h b/drivers/dma/dw_dmac_regs.h
index 720f821..c968597 100644
--- a/drivers/dma/dw_dmac_regs.h
+++ b/drivers/dma/dw_dmac_regs.h
@@ -138,6 +138,7 @@ struct dw_dma_chan {
 	void __iomem		*ch_regs;
 	u8			mask;
 	u8			priority;
+	bool			paused;
 
 	spinlock_t		lock;
 
-- 
1.7.4

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH] dmaengine: implement pause and resume for dw_dmac
  2011-04-19  0:31 [PATCH] dmaengine: implement pause and resume for dw_dmac Linus Walleij
@ 2011-04-19  5:29 ` viresh kumar
  2011-04-19  6:04   ` viresh kumar
  0 siblings, 1 reply; 3+ messages in thread
From: viresh kumar @ 2011-04-19  5:29 UTC (permalink / raw)
  To: linux-arm-kernel

On 04/19/2011 06:01 AM, Linus Walleij wrote:
> It seems that the SPEAr needs this.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Thanks for sending this.
Actually i wasn't sure that disabling channel will simply pause it, and not
finish the transfer. So, didn't went for this change.

> ---
>  drivers/dma/dw_dmac.c      |   22 ++++++++++++++++++++--
>  drivers/dma/dw_dmac_regs.h |    1 +
>  2 files changed, 21 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
> index 9c25c7d..60ac779 100644
> --- a/drivers/dma/dw_dmac.c
> +++ b/drivers/dma/dw_dmac.c
> @@ -801,8 +801,7 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
>  	struct dw_desc		*desc, *_desc;
>  	LIST_HEAD(list);
>  
> -	/* Only supports DMA_TERMINATE_ALL */
> -	if (cmd != DMA_TERMINATE_ALL)
> +	if (cmd != DMA_TERMINATE_ALL && cmd != DMA_PAUSE && cmd != DMA_RESUME)
>  		return -ENXIO;
>  
>  	/*
> @@ -813,11 +812,30 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
>  	 */
>  	spin_lock_bh(&dwc->lock);
>  
> +	if (cmd == DMA_RESUME) {
> +		if (dwc->paused) {
> +			channel_set_bit(dw, CH_EN, dwc->mask);
> +			while (!dma_readl(dw, CH_EN) & dwc->mask)

Probably should be written as
			while (!(dma_readl(dw, CH_EN) & dwc->mask))

> +				cpu_relax();
> +		}

Should return error in else part??

> +		spin_unlock_bh(&dwc->lock);
> +		return 0;
> +	}
> +
>  	channel_clear_bit(dw, CH_EN, dwc->mask);
>  
>  	while (dma_readl(dw, CH_EN) & dwc->mask)
>  		cpu_relax();
>  
> +	if (cmd == DMA_PAUSE) {
> +		dwc->paused = true;
> +		spin_unlock_bh(&dwc->lock);

I have sent another patchset in which _bh variants are replaced with irqsave
variants. To remove any conflicts, i would add your patch in my patchset, with
above mentioned changes keeping your authorship intact.

Will that be fine??

-- 
viresh

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH] dmaengine: implement pause and resume for dw_dmac
  2011-04-19  5:29 ` viresh kumar
@ 2011-04-19  6:04   ` viresh kumar
  0 siblings, 0 replies; 3+ messages in thread
From: viresh kumar @ 2011-04-19  6:04 UTC (permalink / raw)
  To: linux-arm-kernel

On 04/19/2011 10:59 AM, viresh kumar wrote:
> On 04/19/2011 06:01 AM, Linus Walleij wrote:
>> > It seems that the SPEAr needs this.
>> > 
>> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> Thanks for sending this.
> Actually i wasn't sure that disabling channel will simply pause it, and not
> finish the transfer. So, didn't went for this change.
> 
>> > ---
>> >  drivers/dma/dw_dmac.c      |   22 ++++++++++++++++++++--
>> >  drivers/dma/dw_dmac_regs.h |    1 +
>> >  2 files changed, 21 insertions(+), 2 deletions(-)

Moreover, dwc_tx_status() must be updated to add following code:

	if (dwc->paused)
		return DMA_PAUSED;

Will do that while sending it in my patchset.

-- 
viresh

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2011-04-19  6:04 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2011-04-19  0:31 [PATCH] dmaengine: implement pause and resume for dw_dmac Linus Walleij
2011-04-19  5:29 ` viresh kumar
2011-04-19  6:04   ` viresh kumar

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