* [PATCHv2 01/10] ARM: vic: device tree binding
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 20:11 ` Grant Likely
2011-09-29 4:00 ` Rob Herring
2011-09-28 10:41 ` [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler Jamie Iles
` (8 subsequent siblings)
9 siblings, 2 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
This adds a device tree binding for the VIC based on the of_irq_init()
support. This adds an irqdomain to the vic and always registers all
vics in the static vic array rather than for pm only to keep track of
the irq domain. struct irq_data::hwirq is used where appropriate rather
than runtime masking.
v2: - use irq_domain_simple_ops
- remove stub implementation of vic_of_init for !CONFIG_OF
- Make VIC select IRQ_DOMAIN
Cc: Rob Herring <robherring2@gmail.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
Documentation/devicetree/bindings/arm/vic.txt | 29 +++++++
arch/arm/common/Kconfig | 1 +
arch/arm/common/vic.c | 106 ++++++++++++++++++-------
arch/arm/include/asm/hardware/vic.h | 10 ++-
4 files changed, 117 insertions(+), 29 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/vic.txt
diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt
new file mode 100644
index 0000000..266716b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vic.txt
@@ -0,0 +1,29 @@
+* ARM Vectored Interrupt Controller
+
+One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
+system for interrupt routing. For multiple controllers they can either be
+nested or have the outputs wire-OR'd together.
+
+Required properties:
+
+- compatible : should be one of
+ "arm,pl190-vic"
+ "arm,pl192-vic"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : The number of cells to define the interrupts. Must be 1 as
+ the VIC has no configuration options for interrupt sources. The cell is a u32
+ and defines the interrupt number.
+- reg : The register bank for the VIC.
+
+Optional properties:
+
+- interrupts : Interrupt source for parent controllers if the VIC is nested.
+
+Example:
+
+ vic0: interrupt-controller at 60000 {
+ compatible = "arm,pl192-vic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x60000 0x1000>;
+ };
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 4b71766..43e9d1a 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -2,6 +2,7 @@ config ARM_GIC
bool
config ARM_VIC
+ select IRQ_DOMAIN
bool
config ARM_VIC_NR
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 7aa4262..3f9c8f2 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -22,6 +22,10 @@
#include <linux/init.h>
#include <linux/list.h>
#include <linux/io.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#include <linux/syscore_ops.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
@@ -29,7 +33,6 @@
#include <asm/mach/irq.h>
#include <asm/hardware/vic.h>
-#ifdef CONFIG_PM
/**
* struct vic_device - VIC PM device
* @irq: The IRQ number for the base of the VIC.
@@ -40,6 +43,7 @@
* @int_enable: Save for VIC_INT_ENABLE.
* @soft_int: Save for VIC_INT_SOFT.
* @protect: Save for VIC_PROTECT.
+ * @domain: The IRQ domain for the VIC.
*/
struct vic_device {
void __iomem *base;
@@ -50,13 +54,13 @@ struct vic_device {
u32 int_enable;
u32 soft_int;
u32 protect;
+ struct irq_domain domain;
};
/* we cannot allocate memory when VICs are initially registered */
static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
static int vic_id;
-#endif /* CONFIG_PM */
/**
* vic_init2 - common initialisation code
@@ -156,39 +160,50 @@ static int __init vic_pm_init(void)
return 0;
}
late_initcall(vic_pm_init);
+#endif /* CONFIG_PM */
/**
- * vic_pm_register - Register a VIC for later power management control
+ * vic_register() - Register a VIC.
* @base: The base address of the VIC.
* @irq: The base IRQ for the VIC.
* @resume_sources: bitmask of interrupts allowed for resume sources.
+ * @node: The device tree node associated with the VIC.
*
* Register the VIC with the system device tree so that it can be notified
* of suspend and resume requests and ensure that the correct actions are
* taken to re-instate the settings on resume.
+ *
+ * This also configures the IRQ domain for the VIC.
*/
-static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources)
+static void __init vic_register(void __iomem *base, unsigned int irq,
+ u32 resume_sources, struct device_node *node)
{
struct vic_device *v;
- if (vic_id >= ARRAY_SIZE(vic_devices))
+ if (vic_id >= ARRAY_SIZE(vic_devices)) {
printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
- else {
- v = &vic_devices[vic_id];
- v->base = base;
- v->resume_sources = resume_sources;
- v->irq = irq;
- vic_id++;
+ return;
}
+
+ v = &vic_devices[vic_id];
+ v->base = base;
+ v->resume_sources = resume_sources;
+ v->irq = irq;
+ vic_id++;
+
+ v->domain.irq_base = irq;
+ v->domain.nr_irq = 32;
+#ifdef CONFIG_OF_IRQ
+ v->domain.of_node = of_node_get(node);
+ v->domain.ops = &irq_domain_simple_ops;
+#endif /* CONFIG_OF */
+ irq_domain_add(&v->domain);
}
-#else
-static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
-#endif /* CONFIG_PM */
static void vic_ack_irq(struct irq_data *d)
{
void __iomem *base = irq_data_get_irq_chip_data(d);
- unsigned int irq = d->irq & 31;
+ unsigned int irq = d->hwirq;
writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
/* moreover, clear the soft-triggered, in case it was the reason */
writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
@@ -197,14 +212,14 @@ static void vic_ack_irq(struct irq_data *d)
static void vic_mask_irq(struct irq_data *d)
{
void __iomem *base = irq_data_get_irq_chip_data(d);
- unsigned int irq = d->irq & 31;
+ unsigned int irq = d->hwirq;
writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
}
static void vic_unmask_irq(struct irq_data *d)
{
void __iomem *base = irq_data_get_irq_chip_data(d);
- unsigned int irq = d->irq & 31;
+ unsigned int irq = d->hwirq;
writel(1 << irq, base + VIC_INT_ENABLE);
}
@@ -226,7 +241,7 @@ static struct vic_device *vic_from_irq(unsigned int irq)
static int vic_set_wake(struct irq_data *d, unsigned int on)
{
struct vic_device *v = vic_from_irq(d->irq);
- unsigned int off = d->irq & 31;
+ unsigned int off = d->hwirq;
u32 bit = 1 << off;
if (!v)
@@ -331,15 +346,9 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
vic_set_irq_sources(base, irq_start, vic_sources);
}
-/**
- * vic_init - initialise a vectored interrupt controller
- * @base: iomem base address
- * @irq_start: starting interrupt number, must be muliple of 32
- * @vic_sources: bitmask of interrupt sources to allow
- * @resume_sources: bitmask of interrupt sources to allow for resume
- */
-void __init vic_init(void __iomem *base, unsigned int irq_start,
- u32 vic_sources, u32 resume_sources)
+static void __init __vic_init(void __iomem *base, unsigned int irq_start,
+ u32 vic_sources, u32 resume_sources,
+ struct device_node *node)
{
unsigned int i;
u32 cellid = 0;
@@ -375,5 +384,46 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
vic_set_irq_sources(base, irq_start, vic_sources);
- vic_pm_register(base, irq_start, resume_sources);
+ vic_register(base, irq_start, resume_sources, node);
+}
+
+/**
+ * vic_init() - initialise a vectored interrupt controller
+ * @base: iomem base address
+ * @irq_start: starting interrupt number, must be muliple of 32
+ * @vic_sources: bitmask of interrupt sources to allow
+ * @resume_sources: bitmask of interrupt sources to allow for resume
+ */
+void __init vic_init(void __iomem *base, unsigned int irq_start,
+ u32 vic_sources, u32 resume_sources)
+{
+ __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
+}
+
+#ifdef CONFIG_OF
+int __init vic_of_init(struct device_node *node, struct device_node *parent)
+{
+ void __iomem *regs;
+ int irq_base;
+
+ if (WARN(parent, "non-root VICs are not supported"))
+ return -EINVAL;
+
+ regs = of_iomap(node, 0);
+ if (WARN_ON(!regs))
+ return -EIO;
+
+ irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
+ if (WARN_ON(irq_base < 0))
+ goto out_unmap;
+
+ __vic_init(regs, irq_base, ~0, ~0, node);
+
+ return 0;
+
+ out_unmap:
+ iounmap(regs);
+
+ return -EIO;
}
+#endif /* CONFIG OF */
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 5d72550..0135215 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -41,7 +41,15 @@
#define VIC_PL192_VECT_ADDR 0xF00
#ifndef __ASSEMBLY__
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+struct device_node;
void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
-#endif
+#ifdef CONFIG_OF
+int vic_of_init(struct device_node *node, struct device_node *parent);
+#endif /* CONFIG_OF */
+
+#endif /* __ASSEMBLY__ */
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 01/10] ARM: vic: device tree binding
2011-09-28 10:41 ` [PATCHv2 01/10] ARM: vic: device tree binding Jamie Iles
@ 2011-09-28 20:11 ` Grant Likely
2011-09-29 4:00 ` Rob Herring
1 sibling, 0 replies; 37+ messages in thread
From: Grant Likely @ 2011-09-28 20:11 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 28, 2011 at 11:41:38AM +0100, Jamie Iles wrote:
> This adds a device tree binding for the VIC based on the of_irq_init()
> support. This adds an irqdomain to the vic and always registers all
> vics in the static vic array rather than for pm only to keep track of
> the irq domain. struct irq_data::hwirq is used where appropriate rather
> than runtime masking.
>
> v2: - use irq_domain_simple_ops
> - remove stub implementation of vic_of_init for !CONFIG_OF
> - Make VIC select IRQ_DOMAIN
Looks right to me.
Reviewed-by: Grant Likely <grant.likely@secretlab.ca>
>
> Cc: Rob Herring <robherring2@gmail.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Signed-off-by: Jamie Iles <jamie@jamieiles.com>
> ---
> Documentation/devicetree/bindings/arm/vic.txt | 29 +++++++
> arch/arm/common/Kconfig | 1 +
> arch/arm/common/vic.c | 106 ++++++++++++++++++-------
> arch/arm/include/asm/hardware/vic.h | 10 ++-
> 4 files changed, 117 insertions(+), 29 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/vic.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt
> new file mode 100644
> index 0000000..266716b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/vic.txt
> @@ -0,0 +1,29 @@
> +* ARM Vectored Interrupt Controller
> +
> +One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
> +system for interrupt routing. For multiple controllers they can either be
> +nested or have the outputs wire-OR'd together.
> +
> +Required properties:
> +
> +- compatible : should be one of
> + "arm,pl190-vic"
> + "arm,pl192-vic"
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : The number of cells to define the interrupts. Must be 1 as
> + the VIC has no configuration options for interrupt sources. The cell is a u32
> + and defines the interrupt number.
> +- reg : The register bank for the VIC.
> +
> +Optional properties:
> +
> +- interrupts : Interrupt source for parent controllers if the VIC is nested.
> +
> +Example:
> +
> + vic0: interrupt-controller at 60000 {
> + compatible = "arm,pl192-vic";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + reg = <0x60000 0x1000>;
> + };
> diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
> index 4b71766..43e9d1a 100644
> --- a/arch/arm/common/Kconfig
> +++ b/arch/arm/common/Kconfig
> @@ -2,6 +2,7 @@ config ARM_GIC
> bool
>
> config ARM_VIC
> + select IRQ_DOMAIN
> bool
>
> config ARM_VIC_NR
> diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
> index 7aa4262..3f9c8f2 100644
> --- a/arch/arm/common/vic.c
> +++ b/arch/arm/common/vic.c
> @@ -22,6 +22,10 @@
> #include <linux/init.h>
> #include <linux/list.h>
> #include <linux/io.h>
> +#include <linux/irqdomain.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> #include <linux/syscore_ops.h>
> #include <linux/device.h>
> #include <linux/amba/bus.h>
> @@ -29,7 +33,6 @@
> #include <asm/mach/irq.h>
> #include <asm/hardware/vic.h>
>
> -#ifdef CONFIG_PM
> /**
> * struct vic_device - VIC PM device
> * @irq: The IRQ number for the base of the VIC.
> @@ -40,6 +43,7 @@
> * @int_enable: Save for VIC_INT_ENABLE.
> * @soft_int: Save for VIC_INT_SOFT.
> * @protect: Save for VIC_PROTECT.
> + * @domain: The IRQ domain for the VIC.
> */
> struct vic_device {
> void __iomem *base;
> @@ -50,13 +54,13 @@ struct vic_device {
> u32 int_enable;
> u32 soft_int;
> u32 protect;
> + struct irq_domain domain;
> };
>
> /* we cannot allocate memory when VICs are initially registered */
> static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
>
> static int vic_id;
> -#endif /* CONFIG_PM */
>
> /**
> * vic_init2 - common initialisation code
> @@ -156,39 +160,50 @@ static int __init vic_pm_init(void)
> return 0;
> }
> late_initcall(vic_pm_init);
> +#endif /* CONFIG_PM */
>
> /**
> - * vic_pm_register - Register a VIC for later power management control
> + * vic_register() - Register a VIC.
> * @base: The base address of the VIC.
> * @irq: The base IRQ for the VIC.
> * @resume_sources: bitmask of interrupts allowed for resume sources.
> + * @node: The device tree node associated with the VIC.
> *
> * Register the VIC with the system device tree so that it can be notified
> * of suspend and resume requests and ensure that the correct actions are
> * taken to re-instate the settings on resume.
> + *
> + * This also configures the IRQ domain for the VIC.
> */
> -static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources)
> +static void __init vic_register(void __iomem *base, unsigned int irq,
> + u32 resume_sources, struct device_node *node)
> {
> struct vic_device *v;
>
> - if (vic_id >= ARRAY_SIZE(vic_devices))
> + if (vic_id >= ARRAY_SIZE(vic_devices)) {
> printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
> - else {
> - v = &vic_devices[vic_id];
> - v->base = base;
> - v->resume_sources = resume_sources;
> - v->irq = irq;
> - vic_id++;
> + return;
> }
> +
> + v = &vic_devices[vic_id];
> + v->base = base;
> + v->resume_sources = resume_sources;
> + v->irq = irq;
> + vic_id++;
> +
> + v->domain.irq_base = irq;
> + v->domain.nr_irq = 32;
> +#ifdef CONFIG_OF_IRQ
> + v->domain.of_node = of_node_get(node);
> + v->domain.ops = &irq_domain_simple_ops;
> +#endif /* CONFIG_OF */
> + irq_domain_add(&v->domain);
> }
> -#else
> -static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
> -#endif /* CONFIG_PM */
>
> static void vic_ack_irq(struct irq_data *d)
> {
> void __iomem *base = irq_data_get_irq_chip_data(d);
> - unsigned int irq = d->irq & 31;
> + unsigned int irq = d->hwirq;
> writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
> /* moreover, clear the soft-triggered, in case it was the reason */
> writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
> @@ -197,14 +212,14 @@ static void vic_ack_irq(struct irq_data *d)
> static void vic_mask_irq(struct irq_data *d)
> {
> void __iomem *base = irq_data_get_irq_chip_data(d);
> - unsigned int irq = d->irq & 31;
> + unsigned int irq = d->hwirq;
> writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
> }
>
> static void vic_unmask_irq(struct irq_data *d)
> {
> void __iomem *base = irq_data_get_irq_chip_data(d);
> - unsigned int irq = d->irq & 31;
> + unsigned int irq = d->hwirq;
> writel(1 << irq, base + VIC_INT_ENABLE);
> }
>
> @@ -226,7 +241,7 @@ static struct vic_device *vic_from_irq(unsigned int irq)
> static int vic_set_wake(struct irq_data *d, unsigned int on)
> {
> struct vic_device *v = vic_from_irq(d->irq);
> - unsigned int off = d->irq & 31;
> + unsigned int off = d->hwirq;
> u32 bit = 1 << off;
>
> if (!v)
> @@ -331,15 +346,9 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
> vic_set_irq_sources(base, irq_start, vic_sources);
> }
>
> -/**
> - * vic_init - initialise a vectored interrupt controller
> - * @base: iomem base address
> - * @irq_start: starting interrupt number, must be muliple of 32
> - * @vic_sources: bitmask of interrupt sources to allow
> - * @resume_sources: bitmask of interrupt sources to allow for resume
> - */
> -void __init vic_init(void __iomem *base, unsigned int irq_start,
> - u32 vic_sources, u32 resume_sources)
> +static void __init __vic_init(void __iomem *base, unsigned int irq_start,
> + u32 vic_sources, u32 resume_sources,
> + struct device_node *node)
> {
> unsigned int i;
> u32 cellid = 0;
> @@ -375,5 +384,46 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
>
> vic_set_irq_sources(base, irq_start, vic_sources);
>
> - vic_pm_register(base, irq_start, resume_sources);
> + vic_register(base, irq_start, resume_sources, node);
> +}
> +
> +/**
> + * vic_init() - initialise a vectored interrupt controller
> + * @base: iomem base address
> + * @irq_start: starting interrupt number, must be muliple of 32
> + * @vic_sources: bitmask of interrupt sources to allow
> + * @resume_sources: bitmask of interrupt sources to allow for resume
> + */
> +void __init vic_init(void __iomem *base, unsigned int irq_start,
> + u32 vic_sources, u32 resume_sources)
> +{
> + __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
> +}
> +
> +#ifdef CONFIG_OF
> +int __init vic_of_init(struct device_node *node, struct device_node *parent)
> +{
> + void __iomem *regs;
> + int irq_base;
> +
> + if (WARN(parent, "non-root VICs are not supported"))
> + return -EINVAL;
> +
> + regs = of_iomap(node, 0);
> + if (WARN_ON(!regs))
> + return -EIO;
> +
> + irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
> + if (WARN_ON(irq_base < 0))
> + goto out_unmap;
> +
> + __vic_init(regs, irq_base, ~0, ~0, node);
> +
> + return 0;
> +
> + out_unmap:
> + iounmap(regs);
> +
> + return -EIO;
> }
> +#endif /* CONFIG OF */
> diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
> index 5d72550..0135215 100644
> --- a/arch/arm/include/asm/hardware/vic.h
> +++ b/arch/arm/include/asm/hardware/vic.h
> @@ -41,7 +41,15 @@
> #define VIC_PL192_VECT_ADDR 0xF00
>
> #ifndef __ASSEMBLY__
> +#include <linux/compiler.h>
> +#include <linux/types.h>
> +
> +struct device_node;
> void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
> -#endif
>
> +#ifdef CONFIG_OF
> +int vic_of_init(struct device_node *node, struct device_node *parent);
> +#endif /* CONFIG_OF */
> +
> +#endif /* __ASSEMBLY__ */
> #endif
> --
> 1.7.4.1
>
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 01/10] ARM: vic: device tree binding
2011-09-28 10:41 ` [PATCHv2 01/10] ARM: vic: device tree binding Jamie Iles
2011-09-28 20:11 ` Grant Likely
@ 2011-09-29 4:00 ` Rob Herring
1 sibling, 0 replies; 37+ messages in thread
From: Rob Herring @ 2011-09-29 4:00 UTC (permalink / raw)
To: linux-arm-kernel
On 09/28/2011 05:41 AM, Jamie Iles wrote:
> This adds a device tree binding for the VIC based on the of_irq_init()
> support. This adds an irqdomain to the vic and always registers all
> vics in the static vic array rather than for pm only to keep track of
> the irq domain. struct irq_data::hwirq is used where appropriate rather
> than runtime masking.
>
> v2: - use irq_domain_simple_ops
> - remove stub implementation of vic_of_init for !CONFIG_OF
> - Make VIC select IRQ_DOMAIN
>
> Cc: Rob Herring <robherring2@gmail.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Looks good. One minor comment below, but otherwise:
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
> ---
> Documentation/devicetree/bindings/arm/vic.txt | 29 +++++++
> arch/arm/common/Kconfig | 1 +
> arch/arm/common/vic.c | 106 ++++++++++++++++++-------
> arch/arm/include/asm/hardware/vic.h | 10 ++-
> 4 files changed, 117 insertions(+), 29 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/vic.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt
> new file mode 100644
> index 0000000..266716b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/vic.txt
> @@ -0,0 +1,29 @@
> +* ARM Vectored Interrupt Controller
> +
> +One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM
> +system for interrupt routing. For multiple controllers they can either be
> +nested or have the outputs wire-OR'd together.
> +
> +Required properties:
> +
> +- compatible : should be one of
> + "arm,pl190-vic"
> + "arm,pl192-vic"
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : The number of cells to define the interrupts. Must be 1 as
> + the VIC has no configuration options for interrupt sources. The cell is a u32
> + and defines the interrupt number.
> +- reg : The register bank for the VIC.
> +
> +Optional properties:
> +
> +- interrupts : Interrupt source for parent controllers if the VIC is nested.
> +
> +Example:
> +
> + vic0: interrupt-controller at 60000 {
> + compatible = "arm,pl192-vic";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + reg = <0x60000 0x1000>;
> + };
> diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
> index 4b71766..43e9d1a 100644
> --- a/arch/arm/common/Kconfig
> +++ b/arch/arm/common/Kconfig
> @@ -2,6 +2,7 @@ config ARM_GIC
> bool
>
> config ARM_VIC
> + select IRQ_DOMAIN
> bool
>
> config ARM_VIC_NR
> diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
> index 7aa4262..3f9c8f2 100644
> --- a/arch/arm/common/vic.c
> +++ b/arch/arm/common/vic.c
> @@ -22,6 +22,10 @@
> #include <linux/init.h>
> #include <linux/list.h>
> #include <linux/io.h>
> +#include <linux/irqdomain.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> #include <linux/syscore_ops.h>
> #include <linux/device.h>
> #include <linux/amba/bus.h>
> @@ -29,7 +33,6 @@
> #include <asm/mach/irq.h>
> #include <asm/hardware/vic.h>
>
> -#ifdef CONFIG_PM
> /**
> * struct vic_device - VIC PM device
> * @irq: The IRQ number for the base of the VIC.
> @@ -40,6 +43,7 @@
> * @int_enable: Save for VIC_INT_ENABLE.
> * @soft_int: Save for VIC_INT_SOFT.
> * @protect: Save for VIC_PROTECT.
> + * @domain: The IRQ domain for the VIC.
> */
> struct vic_device {
> void __iomem *base;
> @@ -50,13 +54,13 @@ struct vic_device {
> u32 int_enable;
> u32 soft_int;
> u32 protect;
> + struct irq_domain domain;
> };
>
> /* we cannot allocate memory when VICs are initially registered */
> static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
>
> static int vic_id;
> -#endif /* CONFIG_PM */
>
> /**
> * vic_init2 - common initialisation code
> @@ -156,39 +160,50 @@ static int __init vic_pm_init(void)
> return 0;
> }
> late_initcall(vic_pm_init);
> +#endif /* CONFIG_PM */
>
> /**
> - * vic_pm_register - Register a VIC for later power management control
> + * vic_register() - Register a VIC.
> * @base: The base address of the VIC.
> * @irq: The base IRQ for the VIC.
> * @resume_sources: bitmask of interrupts allowed for resume sources.
> + * @node: The device tree node associated with the VIC.
> *
> * Register the VIC with the system device tree so that it can be notified
> * of suspend and resume requests and ensure that the correct actions are
> * taken to re-instate the settings on resume.
> + *
> + * This also configures the IRQ domain for the VIC.
> */
> -static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources)
> +static void __init vic_register(void __iomem *base, unsigned int irq,
> + u32 resume_sources, struct device_node *node)
> {
> struct vic_device *v;
>
> - if (vic_id >= ARRAY_SIZE(vic_devices))
> + if (vic_id >= ARRAY_SIZE(vic_devices)) {
> printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
> - else {
> - v = &vic_devices[vic_id];
> - v->base = base;
> - v->resume_sources = resume_sources;
> - v->irq = irq;
> - vic_id++;
> + return;
> }
> +
> + v = &vic_devices[vic_id];
> + v->base = base;
> + v->resume_sources = resume_sources;
> + v->irq = irq;
> + vic_id++;
> +
> + v->domain.irq_base = irq;
> + v->domain.nr_irq = 32;
> +#ifdef CONFIG_OF_IRQ
> + v->domain.of_node = of_node_get(node);
> + v->domain.ops = &irq_domain_simple_ops;
> +#endif /* CONFIG_OF */
> + irq_domain_add(&v->domain);
> }
> -#else
> -static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
> -#endif /* CONFIG_PM */
>
> static void vic_ack_irq(struct irq_data *d)
> {
> void __iomem *base = irq_data_get_irq_chip_data(d);
> - unsigned int irq = d->irq & 31;
> + unsigned int irq = d->hwirq;
> writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
> /* moreover, clear the soft-triggered, in case it was the reason */
> writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
> @@ -197,14 +212,14 @@ static void vic_ack_irq(struct irq_data *d)
> static void vic_mask_irq(struct irq_data *d)
> {
> void __iomem *base = irq_data_get_irq_chip_data(d);
> - unsigned int irq = d->irq & 31;
> + unsigned int irq = d->hwirq;
> writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
> }
>
> static void vic_unmask_irq(struct irq_data *d)
> {
> void __iomem *base = irq_data_get_irq_chip_data(d);
> - unsigned int irq = d->irq & 31;
> + unsigned int irq = d->hwirq;
> writel(1 << irq, base + VIC_INT_ENABLE);
> }
>
> @@ -226,7 +241,7 @@ static struct vic_device *vic_from_irq(unsigned int irq)
> static int vic_set_wake(struct irq_data *d, unsigned int on)
> {
> struct vic_device *v = vic_from_irq(d->irq);
> - unsigned int off = d->irq & 31;
> + unsigned int off = d->hwirq;
> u32 bit = 1 << off;
>
> if (!v)
> @@ -331,15 +346,9 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
> vic_set_irq_sources(base, irq_start, vic_sources);
> }
>
> -/**
> - * vic_init - initialise a vectored interrupt controller
> - * @base: iomem base address
> - * @irq_start: starting interrupt number, must be muliple of 32
> - * @vic_sources: bitmask of interrupt sources to allow
> - * @resume_sources: bitmask of interrupt sources to allow for resume
> - */
> -void __init vic_init(void __iomem *base, unsigned int irq_start,
> - u32 vic_sources, u32 resume_sources)
> +static void __init __vic_init(void __iomem *base, unsigned int irq_start,
> + u32 vic_sources, u32 resume_sources,
> + struct device_node *node)
> {
> unsigned int i;
> u32 cellid = 0;
> @@ -375,5 +384,46 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
>
> vic_set_irq_sources(base, irq_start, vic_sources);
>
> - vic_pm_register(base, irq_start, resume_sources);
> + vic_register(base, irq_start, resume_sources, node);
> +}
> +
> +/**
> + * vic_init() - initialise a vectored interrupt controller
> + * @base: iomem base address
> + * @irq_start: starting interrupt number, must be muliple of 32
> + * @vic_sources: bitmask of interrupt sources to allow
> + * @resume_sources: bitmask of interrupt sources to allow for resume
> + */
> +void __init vic_init(void __iomem *base, unsigned int irq_start,
> + u32 vic_sources, u32 resume_sources)
> +{
> + __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
> +}
> +
> +#ifdef CONFIG_OF
> +int __init vic_of_init(struct device_node *node, struct device_node *parent)
> +{
> + void __iomem *regs;
> + int irq_base;
> +
> + if (WARN(parent, "non-root VICs are not supported"))
> + return -EINVAL;
> +
> + regs = of_iomap(node, 0);
> + if (WARN_ON(!regs))
> + return -EIO;
> +
> + irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
> + if (WARN_ON(irq_base < 0))
> + goto out_unmap;
> +
> + __vic_init(regs, irq_base, ~0, ~0, node);
> +
> + return 0;
> +
> + out_unmap:
> + iounmap(regs);
> +
> + return -EIO;
> }
> +#endif /* CONFIG OF */
> diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
> index 5d72550..0135215 100644
> --- a/arch/arm/include/asm/hardware/vic.h
> +++ b/arch/arm/include/asm/hardware/vic.h
> @@ -41,7 +41,15 @@
> #define VIC_PL192_VECT_ADDR 0xF00
>
> #ifndef __ASSEMBLY__
> +#include <linux/compiler.h>
> +#include <linux/types.h>
> +
> +struct device_node;
> void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
> -#endif
>
> +#ifdef CONFIG_OF
> +int vic_of_init(struct device_node *node, struct device_node *parent);
> +#endif /* CONFIG_OF */
You don't need an ifdef around this.
Rob
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
2011-09-28 10:41 ` [PATCHv2 01/10] ARM: vic: device tree binding Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 11:09 ` Linus Walleij
` (2 more replies)
2011-09-28 10:41 ` [PATCHv2 03/10] ARM: ep93xx: convert to MULTI_IRQ_HANDLER Jamie Iles
` (7 subsequent siblings)
9 siblings, 3 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Add a handler for the VIC that is suitable for MULTI_IRQ_HANDLER
platforms. This can replace the ASM entry macros for platforms that use
the VIC.
v2: - allow the handler be used for !CONFIG_OF
- use irq_domain_to_irq()
Cc: Rob Herring <robherring2@gmail.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/common/vic.c | 29 +++++++++++++++++++++++++++++
arch/arm/include/asm/hardware/vic.h | 4 ++++
2 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 3f9c8f2..71adced 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -427,3 +427,32 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
return -EIO;
}
#endif /* CONFIG OF */
+
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs *regs)
+{
+ u32 stat, irq;
+ bool handled = false;
+
+ while (!handled) {
+ stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
+ if (!stat)
+ break;
+
+ while (stat) {
+ irq = fls(stat) - 1;
+ handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
+ stat &= ~(1 << irq);
+ handled = true;
+ }
+ }
+}
+
+asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
+{
+ int i;
+
+ for (i = 0; i < vic_id; ++i)
+ vic_single_handle_irq(&vic_devices[i], regs);
+}
+#endif /* CONFIG_MULTI_IRQ_HANDLER */
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 0135215..c02fd6f 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -45,11 +45,15 @@
#include <linux/types.h>
struct device_node;
+struct pt_regs;
+
void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
#ifdef CONFIG_OF
int vic_of_init(struct device_node *node, struct device_node *parent);
#endif /* CONFIG_OF */
+void vic_handle_irq(struct pt_regs *regs);
+
#endif /* __ASSEMBLY__ */
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-28 10:41 ` [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler Jamie Iles
@ 2011-09-28 11:09 ` Linus Walleij
2011-09-28 12:08 ` Jamie Iles
2011-09-28 20:39 ` Grant Likely
2011-09-29 15:03 ` Zoltan Devai
2 siblings, 1 reply; 37+ messages in thread
From: Linus Walleij @ 2011-09-28 11:09 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 28, 2011 at 12:41 PM, Jamie Iles <jamie@jamieiles.com> wrote:
> +static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs *regs)
> +{
> + ? ? ? u32 stat, irq;
> + ? ? ? bool handled = false;
> +
> + ? ? ? while (!handled) {
> + ? ? ? ? ? ? ? stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> + ? ? ? ? ? ? ? if (!stat)
> + ? ? ? ? ? ? ? ? ? ? ? break;
> +
> + ? ? ? ? ? ? ? while (stat) {
> + ? ? ? ? ? ? ? ? ? ? ? irq = fls(stat) - 1;
Isn't fls "find last set"?
That means IRQs with higher numbers will be handled first will it not?
For U300 IRQs with lower numbers will be handled first
by iteratively testing bit 0 and shifting right:
-1002: tst \irqstat, #1
- bne 1003f
- add \irqnr, \irqnr, #1
- movs \irqstat, \irqstat, lsr #1
- bne 1002b
So I would use ffs() for this to work the same way as before in
U300.
Since this can have some performance impact, if the platforms differ
in whether they handle IRQs from low to high or from high to low
might need to be a flag passed in to vic_init() or so...
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-28 11:09 ` Linus Walleij
@ 2011-09-28 12:08 ` Jamie Iles
0 siblings, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 12:08 UTC (permalink / raw)
To: linux-arm-kernel
Hi Linus,
On Wed, Sep 28, 2011 at 01:09:48PM +0200, Linus Walleij wrote:
> On Wed, Sep 28, 2011 at 12:41 PM, Jamie Iles <jamie@jamieiles.com> wrote:
>
> > +static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs *regs)
> > +{
> > + ? ? ? u32 stat, irq;
> > + ? ? ? bool handled = false;
> > +
> > + ? ? ? while (!handled) {
> > + ? ? ? ? ? ? ? stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > + ? ? ? ? ? ? ? if (!stat)
> > + ? ? ? ? ? ? ? ? ? ? ? break;
> > +
> > + ? ? ? ? ? ? ? while (stat) {
> > + ? ? ? ? ? ? ? ? ? ? ? irq = fls(stat) - 1;
>
> Isn't fls "find last set"?
>
> That means IRQs with higher numbers will be handled first will it not?
>
> For U300 IRQs with lower numbers will be handled first
> by iteratively testing bit 0 and shifting right:
>
> -1002: tst \irqstat, #1
> - bne 1003f
> - add \irqnr, \irqnr, #1
> - movs \irqstat, \irqstat, lsr #1
> - bne 1002b
>
> So I would use ffs() for this to work the same way as before in
> U300.
>
> Since this can have some performance impact, if the platforms differ
> in whether they handle IRQs from low to high or from high to low
> might need to be a flag passed in to vic_init() or so...
I don't know how important the ordering is, but if it is important then
we could have vic_handle_irq_msb_first() and vic_handle_irq_lsb_first()
as the handlers so there isn't any additional indirection/selection in
the interrupt hot-path.
Jamie
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-28 10:41 ` [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler Jamie Iles
2011-09-28 11:09 ` Linus Walleij
@ 2011-09-28 20:39 ` Grant Likely
2011-09-29 6:55 ` Linus Walleij
2011-09-29 15:03 ` Zoltan Devai
2 siblings, 1 reply; 37+ messages in thread
From: Grant Likely @ 2011-09-28 20:39 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 28, 2011 at 11:41:39AM +0100, Jamie Iles wrote:
> Add a handler for the VIC that is suitable for MULTI_IRQ_HANDLER
> platforms. This can replace the ASM entry macros for platforms that use
> the VIC.
>
> v2: - allow the handler be used for !CONFIG_OF
> - use irq_domain_to_irq()
>
> Cc: Rob Herring <robherring2@gmail.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Signed-off-by: Jamie Iles <jamie@jamieiles.com>
> ---
> arch/arm/common/vic.c | 29 +++++++++++++++++++++++++++++
> arch/arm/include/asm/hardware/vic.h | 4 ++++
> 2 files changed, 33 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
> index 3f9c8f2..71adced 100644
> --- a/arch/arm/common/vic.c
> +++ b/arch/arm/common/vic.c
> @@ -427,3 +427,32 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
> return -EIO;
> }
> #endif /* CONFIG OF */
> +
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> +static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs *regs)
> +{
> + u32 stat, irq;
> + bool handled = false;
> +
> + while (!handled) {
> + stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> + if (!stat)
> + break;
> +
> + while (stat) {
> + irq = fls(stat) - 1;
> + handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
> + stat &= ~(1 << irq);
> + handled = true;
> + }
> + }
I don't follow why this is written this way. The way I see it, there
are two conditions:
1) first read will show no irqs pending (!stat), which will break out
of the outer while() loop.
2) or there will be irqs pending, it will enter the second while()
loop, which unconditionally sets the handled flag, and causes the
outer loop to exit immediately after the inner loop exits.
Why isn't it simply written this way:
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
while (stat) {
irq = fls(stat) - 1;
handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
stat &= ~(1 << irq);
}
g.
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-28 20:39 ` Grant Likely
@ 2011-09-29 6:55 ` Linus Walleij
2011-09-29 9:30 ` Jamie Iles
0 siblings, 1 reply; 37+ messages in thread
From: Linus Walleij @ 2011-09-29 6:55 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 28, 2011 at 10:39 PM, Grant Likely
<grant.likely@secretlab.ca> wrote:
> Why isn't it simply written this way:
>
> ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> ? ? ? ?while (stat) {
> ? ? ? ? ? ? ? ?irq = fls(stat) - 1;
> ? ? ? ? ? ? ? ?handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
> ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> ? ? ? ?}
That is indeed closer to the assembly loop most platforms have
implemented.
Jamie can you test this approach? And also use ffs() insteadof
fls()...
Thanks,
Linus Walleij
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-29 6:55 ` Linus Walleij
@ 2011-09-29 9:30 ` Jamie Iles
2011-09-29 16:55 ` Grant Likely
2011-11-02 13:40 ` Russell King - ARM Linux
0 siblings, 2 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-29 9:30 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Sep 29, 2011 at 08:55:08AM +0200, Linus Walleij wrote:
> On Wed, Sep 28, 2011 at 10:39 PM, Grant Likely
> <grant.likely@secretlab.ca> wrote:
>
> > Why isn't it simply written this way:
> >
> > ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > ? ? ? ?while (stat) {
> > ? ? ? ? ? ? ? ?irq = fls(stat) - 1;
> > ? ? ? ? ? ? ? ?handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
> > ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> > ? ? ? ?}
>
> That is indeed closer to the assembly loop most platforms have
> implemented.
>
> Jamie can you test this approach? And also use ffs() insteadof
> fls()...
OK, here it is (and it works)! That does make it a lot simpler, thanks
guys! I've updated the vic-dt branch in my repo too.
Jamie
8<------
From: Jamie Iles <jamie@jamieiles.com>
Subject: [PATCHv3] ARM: vic: MULTI_IRQ_HANDLER handler
Add a handler for the VIC that is suitable for MULTI_IRQ_HANDLER
platforms. This can replace the ASM entry macros for platforms that use
the VIC.
v3: - simplify irq handling loop as suggested by Grant
- service interrupts from msb->lsb order
v2: - allow the handler be used for !CONFIG_OF
- use irq_domain_to_irq()
Cc: Rob Herring <robherring2@gmail.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/common/vic.c | 22 ++++++++++++++++++++++
arch/arm/include/asm/hardware/vic.h | 4 ++++
2 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 3f9c8f2..b22b83d 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -427,3 +427,25 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
return -EIO;
}
#endif /* CONFIG OF */
+
+#ifdef CONFIG_MULTI_IRQ_HANDLER
+static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs *regs)
+{
+ u32 stat, irq;
+
+ stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
+ while (stat) {
+ irq = ffs(stat) - 1;
+ handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
+ stat &= ~(1 << irq);
+ }
+}
+
+asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
+{
+ int i;
+
+ for (i = 0; i < vic_id; ++i)
+ vic_single_handle_irq(&vic_devices[i], regs);
+}
+#endif /* CONFIG_MULTI_IRQ_HANDLER */
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 0135215..c02fd6f 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -45,11 +45,15 @@
#include <linux/types.h>
struct device_node;
+struct pt_regs;
+
void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
#ifdef CONFIG_OF
int vic_of_init(struct device_node *node, struct device_node *parent);
#endif /* CONFIG_OF */
+void vic_handle_irq(struct pt_regs *regs);
+
#endif /* __ASSEMBLY__ */
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-29 9:30 ` Jamie Iles
@ 2011-09-29 16:55 ` Grant Likely
2011-11-02 13:40 ` Russell King - ARM Linux
1 sibling, 0 replies; 37+ messages in thread
From: Grant Likely @ 2011-09-29 16:55 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Sep 29, 2011 at 10:30:09AM +0100, Jamie Iles wrote:
> On Thu, Sep 29, 2011 at 08:55:08AM +0200, Linus Walleij wrote:
> > On Wed, Sep 28, 2011 at 10:39 PM, Grant Likely
> > <grant.likely@secretlab.ca> wrote:
> >
> > > Why isn't it simply written this way:
> > >
> > > ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > > ? ? ? ?while (stat) {
> > > ? ? ? ? ? ? ? ?irq = fls(stat) - 1;
> > > ? ? ? ? ? ? ? ?handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
> > > ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> > > ? ? ? ?}
> >
> > That is indeed closer to the assembly loop most platforms have
> > implemented.
> >
> > Jamie can you test this approach? And also use ffs() insteadof
> > fls()...
>
> OK, here it is (and it works)! That does make it a lot simpler, thanks
> guys! I've updated the vic-dt branch in my repo too.
>
> Jamie
>
> 8<------
> From: Jamie Iles <jamie@jamieiles.com>
> Subject: [PATCHv3] ARM: vic: MULTI_IRQ_HANDLER handler
>
> Add a handler for the VIC that is suitable for MULTI_IRQ_HANDLER
> platforms. This can replace the ASM entry macros for platforms that use
> the VIC.
>
> v3: - simplify irq handling loop as suggested by Grant
> - service interrupts from msb->lsb order
> v2: - allow the handler be used for !CONFIG_OF
> - use irq_domain_to_irq()
>
> Cc: Rob Herring <robherring2@gmail.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> arch/arm/common/vic.c | 22 ++++++++++++++++++++++
> arch/arm/include/asm/hardware/vic.h | 4 ++++
> 2 files changed, 26 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
> index 3f9c8f2..b22b83d 100644
> --- a/arch/arm/common/vic.c
> +++ b/arch/arm/common/vic.c
> @@ -427,3 +427,25 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
> return -EIO;
> }
> #endif /* CONFIG OF */
> +
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> +static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs *regs)
> +{
> + u32 stat, irq;
> +
> + stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> + while (stat) {
> + irq = ffs(stat) - 1;
> + handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
> + stat &= ~(1 << irq);
> + }
> +}
> +
> +asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
> +{
> + int i;
> +
> + for (i = 0; i < vic_id; ++i)
> + vic_single_handle_irq(&vic_devices[i], regs);
> +}
> +#endif /* CONFIG_MULTI_IRQ_HANDLER */
> diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
> index 0135215..c02fd6f 100644
> --- a/arch/arm/include/asm/hardware/vic.h
> +++ b/arch/arm/include/asm/hardware/vic.h
> @@ -45,11 +45,15 @@
> #include <linux/types.h>
>
> struct device_node;
> +struct pt_regs;
> +
> void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
>
> #ifdef CONFIG_OF
> int vic_of_init(struct device_node *node, struct device_node *parent);
> #endif /* CONFIG_OF */
>
> +void vic_handle_irq(struct pt_regs *regs);
> +
> #endif /* __ASSEMBLY__ */
> #endif
> --
> 1.7.4.1
>
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-29 9:30 ` Jamie Iles
2011-09-29 16:55 ` Grant Likely
@ 2011-11-02 13:40 ` Russell King - ARM Linux
2011-11-02 14:08 ` Jamie Iles
1 sibling, 1 reply; 37+ messages in thread
From: Russell King - ARM Linux @ 2011-11-02 13:40 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Sep 29, 2011 at 10:30:09AM +0100, Jamie Iles wrote:
> +#ifdef CONFIG_MULTI_IRQ_HANDLER
> +static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs *regs)
> +{
> + u32 stat, irq;
> +
> + stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> + while (stat) {
> + irq = ffs(stat) - 1;
> + handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
> + stat &= ~(1 << irq);
> + }
> +}
> +
> +asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
> +{
> + int i;
> +
> + for (i = 0; i < vic_id; ++i)
> + vic_single_handle_irq(&vic_devices[i], regs);
> +}
And if we receive another interrupt after the read of the register, we'll
have to exit all the way back (possibly to userspace) before re-entering
the IRQ handling paths back to this point to process it.
Is there any particular reason folk are destroying the built-in efficiency
of the IRQ handling which is common-place in the existing assembly
approach?
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-02 13:40 ` Russell King - ARM Linux
@ 2011-11-02 14:08 ` Jamie Iles
2011-11-03 12:29 ` Linus Walleij
0 siblings, 1 reply; 37+ messages in thread
From: Jamie Iles @ 2011-11-02 14:08 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Nov 02, 2011 at 01:40:24PM +0000, Russell King - ARM Linux wrote:
> On Thu, Sep 29, 2011 at 10:30:09AM +0100, Jamie Iles wrote:
> > +#ifdef CONFIG_MULTI_IRQ_HANDLER
> > +static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs *regs)
> > +{
> > + u32 stat, irq;
> > +
> > + stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > + while (stat) {
> > + irq = ffs(stat) - 1;
> > + handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
> > + stat &= ~(1 << irq);
> > + }
> > +}
> > +
> > +asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < vic_id; ++i)
> > + vic_single_handle_irq(&vic_devices[i], regs);
> > +}
>
> And if we receive another interrupt after the read of the register, we'll
> have to exit all the way back (possibly to userspace) before re-entering
> the IRQ handling paths back to this point to process it.
OK, so how about something like this instead:
static int vic_single_handle_irq(struct vic_device *vic,
struct pt_regs *regs)
{
u32 stat, irq;
int handled = 0;
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
while (stat) {
irq = ffs(stat) - 1;
handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
stat &= ~(1 << irq);
handled = 1;
}
return handled;
}
asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
{
int i, handled;
do {
handled = 0;
for (i = 0; i < vic_id; ++i)
if (vic_single_handle_irq(&vic_devices[i], regs))
handled = 1;
} while (handled);
}
which I think should keep handling IRQ's until no VIC has them pending
(or as best can be determined).
> Is there any particular reason folk are destroying the built-in efficiency
> of the IRQ handling which is common-place in the existing assembly
> approach?
Well this approach makes a single image kernel a bit easier. The other
thing is that it plays a lot nicer with dynamic irq_desc assignment.
Grant's IRQ domain patches make this quite easy here, but I can't see an
obvious way to do that with the assembly method.
Jamie
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-02 14:08 ` Jamie Iles
@ 2011-11-03 12:29 ` Linus Walleij
2011-11-03 12:51 ` Russell King - ARM Linux
0 siblings, 1 reply; 37+ messages in thread
From: Linus Walleij @ 2011-11-03 12:29 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Nov 2, 2011 at 3:08 PM, Jamie Iles <jamie@jamieiles.com> wrote:
> On Wed, Nov 02, 2011 at 01:40:24PM +0000, Russell King - ARM Linux wrote:
>>
>> And if we receive another interrupt after the read of the register, we'll
>> have to exit all the way back (possibly to userspace) before re-entering
>> the IRQ handling paths back to this point to process it.
>
> OK, so how about something like this instead:
>
> static int vic_single_handle_irq(struct vic_device *vic,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? struct pt_regs *regs)
Is it single really? This handles all active IRQs on the VIC instance.
Can it be renamed vic_handle_irq()?
> {
> ? ? ? ?u32 stat, irq;
> ? ? ? ?int handled = 0;
>
> ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> ? ? ? ?while (stat) {
> ? ? ? ? ? ? ? ?irq = ffs(stat) - 1;
> ? ? ? ? ? ? ? ?handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
> ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> ? ? ? ? ? ? ? ?handled = 1;
> ? ? ? ?}
>
> ? ? ? ?return handled;
> }
No, if we receive another IRQ *after* the read of the register was the
question, right?
Just replace
stat &= ~(1 << irq);
with a second
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
It'll work just fine, the IRQ line should be low when you read
it the second time, else it is probably fully proper to call
the IRQ handler again anyway.
Just my ?0.01..
Linus Walleij
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-03 12:29 ` Linus Walleij
@ 2011-11-03 12:51 ` Russell King - ARM Linux
2011-11-03 13:00 ` Linus Walleij
2011-11-03 13:49 ` Nicolas Pitre
0 siblings, 2 replies; 37+ messages in thread
From: Russell King - ARM Linux @ 2011-11-03 12:51 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 03, 2011 at 01:29:08PM +0100, Linus Walleij wrote:
> No, if we receive another IRQ *after* the read of the register was the
> question, right?
>
> Just replace
>
> stat &= ~(1 << irq);
>
> with a second
>
> stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
>
> It'll work just fine, the IRQ line should be low when you read
> it the second time, else it is probably fully proper to call
> the IRQ handler again anyway.
It depends on what kind of behaviour you want. There are two solutions:
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
while (stat) {
irq = ffs(stat) - 1;
handle_irq(irq);
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
}
This gives priority to the lowest numbered interrupts; if these get stuck
then they can exclude higher numbered interrupts. This is what we
implement in the assembly code versions, and as far as I know, no one has
ever complained about that behaviour.
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
while (stat) {
while (stat) {
irq = ffs(stat) - 1;
stat &= ~(1 << irq);
handle_irq(irq);
}
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
}
This ensures that we process all interrupts found pending before we
re-check for any new interrupts pending. Arguably this is a much
fairer implementation (and may mean if things get irrevokably stuck,
things like sysrq via the console uart may still work.)
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-03 12:51 ` Russell King - ARM Linux
@ 2011-11-03 13:00 ` Linus Walleij
2011-11-03 13:04 ` Jamie Iles
2011-11-03 13:31 ` Russell King - ARM Linux
2011-11-03 13:49 ` Nicolas Pitre
1 sibling, 2 replies; 37+ messages in thread
From: Linus Walleij @ 2011-11-03 13:00 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 3, 2011 at 1:51 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> ? ? ? ?while (stat) {
> ? ? ? ? ? ? ? ?while (stat) {
> ? ? ? ? ? ? ? ? ? ? ? ?irq = ffs(stat) - 1;
> ? ? ? ? ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> ? ? ? ? ? ? ? ? ? ? ? ?handle_irq(irq);
> ? ? ? ? ? ? ? ?}
> ? ? ? ? ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> ? ? ? ?}
>
> This ensures that we process all interrupts found pending before we
> re-check for any new interrupts pending. ?Arguably this is a much
> fairer implementation (and may mean if things get irrevokably stuck,
> things like sysrq via the console uart may still work.)
I really like the looks of this, Jamie can you do it like that?
Maybe some smallish comment about what's going on can be
good for future generations reading that code...
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-03 13:00 ` Linus Walleij
@ 2011-11-03 13:04 ` Jamie Iles
2011-11-03 13:31 ` Russell King - ARM Linux
1 sibling, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-11-03 13:04 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 03, 2011 at 02:00:15PM +0100, Linus Walleij wrote:
> On Thu, Nov 3, 2011 at 1:51 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
>
> > ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > ? ? ? ?while (stat) {
> > ? ? ? ? ? ? ? ?while (stat) {
> > ? ? ? ? ? ? ? ? ? ? ? ?irq = ffs(stat) - 1;
> > ? ? ? ? ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> > ? ? ? ? ? ? ? ? ? ? ? ?handle_irq(irq);
> > ? ? ? ? ? ? ? ?}
> > ? ? ? ? ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > ? ? ? ?}
> >
> > This ensures that we process all interrupts found pending before we
> > re-check for any new interrupts pending. ?Arguably this is a much
> > fairer implementation (and may mean if things get irrevokably stuck,
> > things like sysrq via the console uart may still work.)
>
> I really like the looks of this, Jamie can you do it like that?
Yup, I'll respin either tonight or tomorrow night and rebase ontop of
the asm/exception.h patch. Do we also want the behaviour so that it
keeps looping over all VIC's until there are no pending interrupts? I
think that's probably worth it.
> Maybe some smallish comment about what's going on can be
> good for future generations reading that code...
OK, will do.
Thanks Linus and Russell!
Jamie
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-03 13:00 ` Linus Walleij
2011-11-03 13:04 ` Jamie Iles
@ 2011-11-03 13:31 ` Russell King - ARM Linux
2011-11-03 15:03 ` Jamie Iles
1 sibling, 1 reply; 37+ messages in thread
From: Russell King - ARM Linux @ 2011-11-03 13:31 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 03, 2011 at 02:00:15PM +0100, Linus Walleij wrote:
> On Thu, Nov 3, 2011 at 1:51 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
>
> > ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > ? ? ? ?while (stat) {
> > ? ? ? ? ? ? ? ?while (stat) {
> > ? ? ? ? ? ? ? ? ? ? ? ?irq = ffs(stat) - 1;
> > ? ? ? ? ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> > ? ? ? ? ? ? ? ? ? ? ? ?handle_irq(irq);
> > ? ? ? ? ? ? ? ?}
> > ? ? ? ? ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > ? ? ? ?}
> >
> > This ensures that we process all interrupts found pending before we
> > re-check for any new interrupts pending. ?Arguably this is a much
> > fairer implementation (and may mean if things get irrevokably stuck,
> > things like sysrq via the console uart may still work.)
>
> I really like the looks of this, Jamie can you do it like that?
>
> Maybe some smallish comment about what's going on can be
> good for future generations reading that code...
Bear in mind that it gets a little more complex when you have more
than one VIC, because the outer loop should be across all VICs.
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-03 13:31 ` Russell King - ARM Linux
@ 2011-11-03 15:03 ` Jamie Iles
2011-11-03 15:11 ` Russell King - ARM Linux
0 siblings, 1 reply; 37+ messages in thread
From: Jamie Iles @ 2011-11-03 15:03 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 03, 2011 at 01:31:02PM +0000, Russell King - ARM Linux wrote:
> On Thu, Nov 03, 2011 at 02:00:15PM +0100, Linus Walleij wrote:
> > On Thu, Nov 3, 2011 at 1:51 PM, Russell King - ARM Linux
> > <linux@arm.linux.org.uk> wrote:
> >
> > > ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > > ? ? ? ?while (stat) {
> > > ? ? ? ? ? ? ? ?while (stat) {
> > > ? ? ? ? ? ? ? ? ? ? ? ?irq = ffs(stat) - 1;
> > > ? ? ? ? ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> > > ? ? ? ? ? ? ? ? ? ? ? ?handle_irq(irq);
> > > ? ? ? ? ? ? ? ?}
> > > ? ? ? ? ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > > ? ? ? ?}
> > >
> > > This ensures that we process all interrupts found pending before we
> > > re-check for any new interrupts pending. ?Arguably this is a much
> > > fairer implementation (and may mean if things get irrevokably stuck,
> > > things like sysrq via the console uart may still work.)
> >
> > I really like the looks of this, Jamie can you do it like that?
> >
> > Maybe some smallish comment about what's going on can be
> > good for future generations reading that code...
>
> Bear in mind that it gets a little more complex when you have more
> than one VIC, because the outer loop should be across all VICs.
OK, so I think what I posted yesterday does that (updated for slightly
better naming) and with a description. In the spirit of fairness
iterating over the VIC's this way seemed right to me.
/*
* Handle each interrupt in a single VIC. Returns non-zero if we've
* handled at least one interrupt. This does a single read of the
* status register and handles all interrupts in order from LSB first.
*/
static int handle_one_vic(struct vic_device *vic,
struct pt_regs *regs)
{
u32 stat, irq;
int handled = 0;
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
while (stat) {
irq = ffs(stat) - 1;
handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
stat &= ~(1 << irq);
handled = 1;
}
return handled;
}
/*
* Keep iterating over all registered VIC's until there are no pending
* interrupts.
*/
asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
{
int i, handled;
do {
for (i = 0, handled = 0; i < vic_id; ++i)
handled |= vic_single_handle_irq(&vic_devices[i],
regs))
} while (handled);
}
Jamie
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-03 15:03 ` Jamie Iles
@ 2011-11-03 15:11 ` Russell King - ARM Linux
0 siblings, 0 replies; 37+ messages in thread
From: Russell King - ARM Linux @ 2011-11-03 15:11 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Nov 03, 2011 at 03:03:37PM +0000, Jamie Iles wrote:
> On Thu, Nov 03, 2011 at 01:31:02PM +0000, Russell King - ARM Linux wrote:
> > On Thu, Nov 03, 2011 at 02:00:15PM +0100, Linus Walleij wrote:
> > > On Thu, Nov 3, 2011 at 1:51 PM, Russell King - ARM Linux
> > > <linux@arm.linux.org.uk> wrote:
> > >
> > > > ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > > > ? ? ? ?while (stat) {
> > > > ? ? ? ? ? ? ? ?while (stat) {
> > > > ? ? ? ? ? ? ? ? ? ? ? ?irq = ffs(stat) - 1;
> > > > ? ? ? ? ? ? ? ? ? ? ? ?stat &= ~(1 << irq);
> > > > ? ? ? ? ? ? ? ? ? ? ? ?handle_irq(irq);
> > > > ? ? ? ? ? ? ? ?}
> > > > ? ? ? ? ? ? ? ?stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > > > ? ? ? ?}
> > > >
> > > > This ensures that we process all interrupts found pending before we
> > > > re-check for any new interrupts pending. ?Arguably this is a much
> > > > fairer implementation (and may mean if things get irrevokably stuck,
> > > > things like sysrq via the console uart may still work.)
> > >
> > > I really like the looks of this, Jamie can you do it like that?
> > >
> > > Maybe some smallish comment about what's going on can be
> > > good for future generations reading that code...
> >
> > Bear in mind that it gets a little more complex when you have more
> > than one VIC, because the outer loop should be across all VICs.
>
> OK, so I think what I posted yesterday does that (updated for slightly
> better naming) and with a description. In the spirit of fairness
> iterating over the VIC's this way seemed right to me.
Yes.
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-11-03 12:51 ` Russell King - ARM Linux
2011-11-03 13:00 ` Linus Walleij
@ 2011-11-03 13:49 ` Nicolas Pitre
1 sibling, 0 replies; 37+ messages in thread
From: Nicolas Pitre @ 2011-11-03 13:49 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, 3 Nov 2011, Russell King - ARM Linux wrote:
> stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> while (stat) {
> while (stat) {
> irq = ffs(stat) - 1;
> stat &= ~(1 << irq);
> handle_irq(irq);
> }
> stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> }
The inner loop could be a do { } while() construct to avoid evaluating
stat twice on each outer loop itteration. Maybe gcc is smart enough to
notice though, maybe not.
Nicolas
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-28 10:41 ` [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler Jamie Iles
2011-09-28 11:09 ` Linus Walleij
2011-09-28 20:39 ` Grant Likely
@ 2011-09-29 15:03 ` Zoltan Devai
2011-09-29 15:13 ` Jamie Iles
2 siblings, 1 reply; 37+ messages in thread
From: Zoltan Devai @ 2011-09-29 15:03 UTC (permalink / raw)
To: linux-arm-kernel
2011/9/28 Jamie Iles <jamie@jamieiles.com>:
> Add a handler for the VIC that is suitable for MULTI_IRQ_HANDLER
> platforms. ?This can replace the ASM entry macros for platforms that use
> the VIC.
>
> v2: ? ? - allow the handler be used for !CONFIG_OF
> ? ? ? ?- use irq_domain_to_irq()
>
> Cc: Rob Herring <robherring2@gmail.com>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Signed-off-by: Jamie Iles <jamie@jamieiles.com>
> ---
> ?arch/arm/common/vic.c ? ? ? ? ? ? ? | ? 29 +++++++++++++++++++++++++++++
> ?arch/arm/include/asm/hardware/vic.h | ? ?4 ++++
> ?2 files changed, 33 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
> index 3f9c8f2..71adced 100644
> --- a/arch/arm/common/vic.c
> +++ b/arch/arm/common/vic.c
> +asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
> +{
> + ? ? ? int i;
> +
> + ? ? ? for (i = 0; i < vic_id; ++i)
> + ? ? ? ? ? ? ? vic_single_handle_irq(&vic_devices[i], regs);
> +}
> +#endif /* CONFIG_MULTI_IRQ_HANDLER */
__exception_irq_entry doesn't compile with CONFIG_FUNCTION_GRAPH_TRACER enabled.
Either this file, or arch/arm/include/asm/system.h needs an #include
<linux/ftrace.h>
Cheers,
Zoltan
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler
2011-09-29 15:03 ` Zoltan Devai
@ 2011-09-29 15:13 ` Jamie Iles
0 siblings, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-29 15:13 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Sep 29, 2011 at 05:03:34PM +0200, Zoltan Devai wrote:
> 2011/9/28 Jamie Iles <jamie@jamieiles.com>:
> > Add a handler for the VIC that is suitable for MULTI_IRQ_HANDLER
> > platforms. ?This can replace the ASM entry macros for platforms that use
> > the VIC.
> >
> > v2: ? ? - allow the handler be used for !CONFIG_OF
> > ? ? ? ?- use irq_domain_to_irq()
> >
> > Cc: Rob Herring <robherring2@gmail.com>
> > Cc: Grant Likely <grant.likely@secretlab.ca>
> > Signed-off-by: Jamie Iles <jamie@jamieiles.com>
> > ---
> > ?arch/arm/common/vic.c ? ? ? ? ? ? ? | ? 29 +++++++++++++++++++++++++++++
> > ?arch/arm/include/asm/hardware/vic.h | ? ?4 ++++
> > ?2 files changed, 33 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
> > index 3f9c8f2..71adced 100644
> > --- a/arch/arm/common/vic.c
> > +++ b/arch/arm/common/vic.c
>
> > +asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
> > +{
> > + ? ? ? int i;
> > +
> > + ? ? ? for (i = 0; i < vic_id; ++i)
> > + ? ? ? ? ? ? ? vic_single_handle_irq(&vic_devices[i], regs);
> > +}
> > +#endif /* CONFIG_MULTI_IRQ_HANDLER */
>
> __exception_irq_entry doesn't compile with CONFIG_FUNCTION_GRAPH_TRACER enabled.
> Either this file, or arch/arm/include/asm/system.h needs an #include
> <linux/ftrace.h>
Thanks Zoltan, I'm just sending a patch now!
Jamie
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 03/10] ARM: ep93xx: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
2011-09-28 10:41 ` [PATCHv2 01/10] ARM: vic: device tree binding Jamie Iles
2011-09-28 10:41 ` [PATCHv2 02/10] ARM: vic: MULTI_IRQ_HANDLER handler Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 11:15 ` Linus Walleij
2011-09-28 10:41 ` [PATCHv2 04/10] ARM: netx: " Jamie Iles
` (6 subsequent siblings)
9 siblings, 1 reply; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Now that there is a generic IRQ handler for multiple VIC devices use it
for ep93xx to help building multi platform kernels.
Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-ep93xx/adssphere.c | 2 +
arch/arm/mach-ep93xx/edb93xx.c | 9 +++++
arch/arm/mach-ep93xx/gesbc9312.c | 2 +
arch/arm/mach-ep93xx/include/mach/entry-macro.S | 42 -----------------------
arch/arm/mach-ep93xx/micro9.c | 5 +++
arch/arm/mach-ep93xx/simone.c | 2 +
arch/arm/mach-ep93xx/snappercl15.c | 2 +
arch/arm/mach-ep93xx/ts72xx.c | 2 +
9 files changed, 25 insertions(+), 42 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5ebc5d9..7facb7c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -377,6 +377,7 @@ config ARCH_EP93XX
select ARCH_REQUIRE_GPIOLIB
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_USES_GETTIMEOFFSET
+ select MULTI_IRQ_HANDLER
help
This enables support for the Cirrus EP93xx series of CPUs.
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 61b98ce..1c09d24 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -16,6 +16,7 @@
#include <mach/hardware.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -36,6 +37,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = adssphere_init_machine,
MACHINE_END
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 9969bb1..d2f0609 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -38,6 +38,7 @@
#include <mach/fb.h>
#include <mach/ep93xx_spi.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -243,6 +244,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = edb93xx_init_machine,
MACHINE_END
@@ -254,6 +256,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = edb93xx_init_machine,
MACHINE_END
@@ -265,6 +268,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = edb93xx_init_machine,
MACHINE_END
@@ -276,6 +280,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = edb93xx_init_machine,
MACHINE_END
@@ -287,6 +292,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = edb93xx_init_machine,
MACHINE_END
@@ -298,6 +304,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = edb93xx_init_machine,
MACHINE_END
@@ -309,6 +316,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = edb93xx_init_machine,
MACHINE_END
@@ -320,6 +328,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = edb93xx_init_machine,
MACHINE_END
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 9bd3152..5e646b9 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -16,6 +16,7 @@
#include <mach/hardware.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -36,6 +37,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = gesbc9312_init_machine,
MACHINE_END
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
index 96b85e2..9be6edc 100644
--- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
@@ -9,51 +9,9 @@
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
-#include <mach/ep93xx-regs.h>
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \base, =(EP93XX_AHB_VIRT_BASE)
- orr \base, \base, #0x000b0000
- mov \irqnr, #0
- ldr \irqstat, [\base] @ lower 32 interrupts
- cmp \irqstat, #0
- bne 1001f
-
- eor \base, \base, #0x00070000
- ldr \irqstat, [\base] @ upper 32 interrupts
- cmp \irqstat, #0
- beq 1002f
- mov \irqnr, #0x20
-
-1001:
- movs \tmp, \irqstat, lsl #16
- movne \irqstat, \tmp
- addeq \irqnr, \irqnr, #16
-
- movs \tmp, \irqstat, lsl #8
- movne \irqstat, \tmp
- addeq \irqnr, \irqnr, #8
-
- movs \tmp, \irqstat, lsl #4
- movne \irqstat, \tmp
- addeq \irqnr, \irqnr, #4
-
- movs \tmp, \irqstat, lsl #2
- movne \irqstat, \tmp
- addeq \irqnr, \irqnr, #2
-
- movs \tmp, \irqstat, lsl #1
- addeq \irqnr, \irqnr, #1
- orrs \base, \base, #1
-
-1002:
- .endm
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 7adea62..5b882b4 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -18,6 +18,7 @@
#include <mach/hardware.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -80,6 +81,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = micro9_init_machine,
MACHINE_END
@@ -91,6 +93,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
.boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = micro9_init_machine,
MACHINE_END
@@ -102,6 +105,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = micro9_init_machine,
MACHINE_END
@@ -113,6 +117,7 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
.boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = micro9_init_machine,
MACHINE_END
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 8392e95..cd5a263 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -25,6 +25,7 @@
#include <mach/hardware.h>
#include <mach/fb.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -69,6 +70,7 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = simone_init_machine,
MACHINE_END
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 2e9c614..8959764 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -31,6 +31,7 @@
#include <mach/hardware.h>
#include <mach/fb.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -166,6 +167,7 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = snappercl15_init_machine,
MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index c2d2cf4..75e1249 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -23,6 +23,7 @@
#include <mach/hardware.h>
#include <mach/ts72xx.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
@@ -260,6 +261,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ts72xx_map_io,
.init_irq = ep93xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &ep93xx_timer,
.init_machine = ts72xx_init_machine,
MACHINE_END
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 03/10] ARM: ep93xx: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 ` [PATCHv2 03/10] ARM: ep93xx: convert to MULTI_IRQ_HANDLER Jamie Iles
@ 2011-09-28 11:15 ` Linus Walleij
0 siblings, 0 replies; 37+ messages in thread
From: Linus Walleij @ 2011-09-28 11:15 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 28, 2011 at 12:41 PM, Jamie Iles <jamie@jamieiles.com> wrote:
> - ? ? ? ? ? ? ? .macro ?get_irqnr_and_base, irqnr, irqstat, base, tmp
> - ? ? ? ? ? ? ? ldr ? ? \base, =(EP93XX_AHB_VIRT_BASE)
> - ? ? ? ? ? ? ? orr ? ? \base, \base, #0x000b0000
> - ? ? ? ? ? ? ? mov ? ? \irqnr, #0
> - ? ? ? ? ? ? ? ldr ? ? \irqstat, [\base] ? ? ? ? ? ? ? @ lower 32 interrupts
> - ? ? ? ? ? ? ? cmp ? ? \irqstat, #0
> - ? ? ? ? ? ? ? bne ? ? 1001f
> -
> - ? ? ? ? ? ? ? eor ? ? \base, \base, #0x00070000
> - ? ? ? ? ? ? ? ldr ? ? \irqstat, [\base] ? ? ? ? ? ? ? @ upper 32 interrupts
> - ? ? ? ? ? ? ? cmp ? ? \irqstat, #0
> - ? ? ? ? ? ? ? beq ? ? 1002f
> - ? ? ? ? ? ? ? mov ? ? \irqnr, #0x20
Two VIC instances again...
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 04/10] ARM: netx: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
` (2 preceding siblings ...)
2011-09-28 10:41 ` [PATCHv2 03/10] ARM: ep93xx: convert to MULTI_IRQ_HANDLER Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 10:41 ` [PATCHv2 05/10] ARM: nomadik: " Jamie Iles
` (5 subsequent siblings)
9 siblings, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Now that there is a generic IRQ handler for multiple VIC devices use it
for netx to help building multi platform kernels.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-netx/include/mach/entry-macro.S | 13 -------------
arch/arm/mach-netx/nxdb500.c | 2 ++
arch/arm/mach-netx/nxdkn.c | 2 ++
arch/arm/mach-netx/nxeb500hmi.c | 2 ++
5 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7facb7c..b7cab06 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -416,6 +416,7 @@ config ARCH_NETX
select CPU_ARM926T
select ARM_VIC
select GENERIC_CLOCKEVENTS
+ select MULTI_IRQ_HANDLER
help
This enables support for systems based on the Hilscher NetX Soc
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S
index 844f1f9..6e9f1cb 100644
--- a/arch/arm/mach-netx/include/mach/entry-macro.S
+++ b/arch/arm/mach-netx/include/mach/entry-macro.S
@@ -18,22 +18,9 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#include <mach/hardware.h>
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =io_p2v(0x001ff000)
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \irqstat, [\base, #0]
- clz \irqnr, \irqstat
- rsb \irqnr, \irqnr, #31
- cmp \irqstat, #0
- .endm
-
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index ca8b203..e86aea8 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -28,6 +28,7 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
#include <mach/netx-regs.h>
#include <mach/eth.h>
@@ -203,6 +204,7 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
.boot_params = 0x80000100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &netx_timer,
.init_machine = nxdb500_init,
MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index d775cbe..b3170da 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -28,6 +28,7 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
#include <mach/netx-regs.h>
#include <mach/eth.h>
@@ -96,6 +97,7 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
.boot_params = 0x80000100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &netx_timer,
.init_machine = nxdkn_init,
MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index de369cd..dc6fa77 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -28,6 +28,7 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
#include <mach/netx-regs.h>
#include <mach/eth.h>
@@ -180,6 +181,7 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
.boot_params = 0x80000100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &netx_timer,
.init_machine = nxeb500hmi_init,
MACHINE_END
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 05/10] ARM: nomadik: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
` (3 preceding siblings ...)
2011-09-28 10:41 ` [PATCHv2 04/10] ARM: netx: " Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 11:12 ` Linus Walleij
2011-09-28 10:41 ` [PATCHv2 06/10] ARM: s3c64xx: " Jamie Iles
` (4 subsequent siblings)
9 siblings, 1 reply; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Now that there is a generic IRQ handler for multiple VIC devices use it
for nomadik to help building multi platform kernels.
Cc: Alessandro Rubini <rubini@unipv.it>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: STEricsson <STEricsson_nomadik_linux@list.st.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-nomadik/board-nhk8815.c | 2 +
arch/arm/mach-nomadik/include/mach/entry-macro.S | 30 ----------------------
3 files changed, 3 insertions(+), 30 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b7cab06..8d131a2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -859,6 +859,7 @@ config ARCH_NOMADIK
select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS
select ARCH_REQUIRE_GPIOLIB
+ select MULTI_IRQ_HANDLER
help
Support for the Nomadik platform by ST-Ericsson
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 1399303..46d9dce 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -21,6 +21,7 @@
#include <linux/mtd/onenand.h>
#include <linux/mtd/partitions.h>
#include <linux/io.h>
+#include <asm/hardware/vic.h>
#include <asm/sizes.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -279,6 +280,7 @@ MACHINE_START(NOMADIK, "NHK8815")
.boot_params = 0x100,
.map_io = cpu8815_map_io,
.init_irq = cpu8815_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &nomadik_timer,
.init_machine = nhk8815_platform_init,
MACHINE_END
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S
index 49f1aa3..98ea1c1 100644
--- a/arch/arm/mach-nomadik/include/mach/entry-macro.S
+++ b/arch/arm/mach-nomadik/include/mach/entry-macro.S
@@ -6,38 +6,8 @@
* warranty of any kind, whether express or implied.
*/
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =IO_ADDRESS(NOMADIK_IC_BASE)
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-
- /* This stanza gets the irq mask from one of two status registers */
- mov \irqnr, #0
- ldr \irqstat, [\base, #VIC_REG_IRQSR0] @ get masked status
- cmp \irqstat, #0
- bne 1001f
- add \irqnr, \irqnr, #32
- ldr \irqstat, [\base, #VIC_REG_IRQSR1] @ get masked status
-
-1001: tst \irqstat, #15
- bne 1002f
- add \irqnr, \irqnr, #4
- movs \irqstat, \irqstat, lsr #4
- bne 1001b
-1002: tst \irqstat, #1
- bne 1003f
- add \irqnr, \irqnr, #1
- movs \irqstat, \irqstat, lsr #1
- bne 1002b
-1003: /* EQ will be set if no irqs pending */
- .endm
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 05/10] ARM: nomadik: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 ` [PATCHv2 05/10] ARM: nomadik: " Jamie Iles
@ 2011-09-28 11:12 ` Linus Walleij
0 siblings, 0 replies; 37+ messages in thread
From: Linus Walleij @ 2011-09-28 11:12 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 28, 2011 at 12:41 PM, Jamie Iles <jamie@jamieiles.com> wrote:
> - ? ? ? /* This stanza gets the irq mask from one of two status registers */
> - ? ? ? mov ? ? \irqnr, #0
> - ? ? ? ldr ? ? \irqstat, [\base, #VIC_REG_IRQSR0] ? ? ?@ get masked status
> - ? ? ? cmp ? ? \irqstat, #0
> - ? ? ? bne ? ? 1001f
> - ? ? ? add ? ? \irqnr, \irqnr, #32
> - ? ? ? ldr ? ? \irqstat, [\base, #VIC_REG_IRQSR1] ? ? ?@ get masked status
As you can see the Nomadik also has two daisy-chained VICs,
just like the U300, so this also breaks.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 06/10] ARM: s3c64xx: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
` (4 preceding siblings ...)
2011-09-28 10:41 ` [PATCHv2 05/10] ARM: nomadik: " Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 10:41 ` [PATCHv2 07/10] ARM: spear: " Jamie Iles
` (3 subsequent siblings)
9 siblings, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Now that there is a generic IRQ handler for multiple VIC devices use it
for s3c64xx to help building multi platform kernels.
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-s3c64xx/include/mach/entry-macro.S | 7 ++++---
arch/arm/mach-s3c64xx/mach-anw6410.c | 2 ++
arch/arm/mach-s3c64xx/mach-crag6410.c | 2 ++
arch/arm/mach-s3c64xx/mach-hmt.c | 2 ++
arch/arm/mach-s3c64xx/mach-mini6410.c | 2 ++
arch/arm/mach-s3c64xx/mach-ncp.c | 2 ++
arch/arm/mach-s3c64xx/mach-real6410.c | 2 ++
arch/arm/mach-s3c64xx/mach-smartq5.c | 2 ++
arch/arm/mach-s3c64xx/mach-smartq7.c | 2 ++
arch/arm/mach-s3c64xx/mach-smdk6400.c | 2 ++
arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 ++
12 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8d131a2..0b9a984 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -734,6 +734,7 @@ config ARCH_S3C64XX
select SAMSUNG_GPIOLIB_4BIT
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
+ select MULTI_IRQ_HANDLER
help
Samsung S3C64XX series based systems
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
index dd36260..dc2bc15 100644
--- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -12,7 +12,8 @@
* warranty of any kind, whether express or implied.
*/
-#include <mach/map.h>
-#include <mach/irqs.h>
+ .macro disable_fiq
+ .endm
-#include <asm/entry-macro-vic2.S>
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index cb88643..714a8cc 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -30,6 +30,7 @@
#include <video/platform_lcd.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
@@ -236,6 +237,7 @@ MACHINE_START(ANW6410, "A&W6410")
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = anw6410_map_io,
.init_machine = anw6410_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index af0c2fe..ae74fe1 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,7 @@
#include <linux/mfd/wm831x/irq.h>
#include <linux/mfd/wm831x/gpio.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -768,6 +769,7 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = crag6410_map_io,
.init_machine = crag6410_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index b3d93cc..6b60f50 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -29,6 +29,7 @@
#include <mach/hardware.h>
#include <mach/map.h>
+#include <asm/hardware/vic.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
@@ -267,6 +268,7 @@ MACHINE_START(HMT, "Airgoo-HMT")
/* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = hmt_map_io,
.init_machine = hmt_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 527f49b..f23ff04 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -24,6 +24,7 @@
#include <linux/serial_core.h>
#include <linux/types.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -351,6 +352,7 @@ MACHINE_START(MINI6410, "MINI6410")
/* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = mini6410_map_io,
.init_machine = mini6410_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 01c6857..8190cd2 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -25,6 +25,7 @@
#include <video/platform_lcd.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
@@ -99,6 +100,7 @@ MACHINE_START(NCP, "NCP")
/* Maintainer: Samsung Electronics */
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = ncp_map_io,
.init_machine = ncp_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 95b04b1..79bbf3c 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -25,6 +25,7 @@
#include <linux/serial_core.h>
#include <linux/types.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -332,6 +333,7 @@ MACHINE_START(REAL6410, "REAL6410")
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = real6410_map_io,
.init_machine = real6410_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 342e8df..6ea050a 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -17,6 +17,7 @@
#include <linux/leds.h>
#include <linux/platform_device.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -148,6 +149,7 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
/* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smartq_map_io,
.init_machine = smartq5_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index 5796397..bd3168c 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -17,6 +17,7 @@
#include <linux/leds.h>
#include <linux/platform_device.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -164,6 +165,7 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
/* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smartq_map_io,
.init_machine = smartq7_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index 3cca642..64560b2 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -22,6 +22,7 @@
#include <asm/mach-types.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
@@ -88,6 +89,7 @@ MACHINE_START(SMDK6400, "SMDK6400")
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6400_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smdk6400_map_io,
.init_machine = smdk6400_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index ecbea92..47a835b 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -43,6 +43,7 @@
#include <video/platform_lcd.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
@@ -745,6 +746,7 @@ MACHINE_START(SMDK6410, "SMDK6410")
.boot_params = S3C64XX_PA_SDRAM + 0x100,
.init_irq = s3c6410_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smdk6410_map_io,
.init_machine = smdk6410_machine_init,
.timer = &s3c24xx_timer,
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 07/10] ARM: spear: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
` (5 preceding siblings ...)
2011-09-28 10:41 ` [PATCHv2 06/10] ARM: s3c64xx: " Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 10:41 ` [PATCHv2 08/10] ARM: u300: " Jamie Iles
` (2 subsequent siblings)
9 siblings, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Now that there is a generic IRQ handler for multiple VIC devices use it
for spear to help building multi platform kernels.
Cc: Viresh Kumar <viresh.kumar@st.com>
Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-spear3xx/include/mach/entry-macro.S | 27 ---------------
arch/arm/mach-spear3xx/spear300_evb.c | 2 +
arch/arm/mach-spear3xx/spear310_evb.c | 2 +
arch/arm/mach-spear3xx/spear320_evb.c | 2 +
arch/arm/mach-spear6xx/include/mach/entry-macro.S | 36 ---------------------
arch/arm/mach-spear6xx/spear600_evb.c | 2 +
7 files changed, 9 insertions(+), 63 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0b9a984..eb23c6e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -897,6 +897,7 @@ config PLAT_SPEAR
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select HAVE_CLK
+ select MULTI_IRQ_HANDLER
help
Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 53da422..de3bb41 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,35 +11,8 @@
* warranty of any kind, whether express or implied.
*/
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
- teq \irqstat, #0
- beq 1001f @ this will set/reset
- @ zero register
- /*
- * Following code will find bit position of least significang
- * bit set in irqstat, using following equation
- * least significant bit set in n = (n & ~(n-1))
- */
- sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
- mvn \tmp, \tmp @ tmp = ~tmp
- and \irqstat, \irqstat, \tmp @ irqstat &= tmp
- /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
- clz \tmp, \irqstat @ tmp = leading zeros
- rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1
-
-1001: /* EQ will be set if no irqs pending */
- .endm
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index 69006f6..f013659 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
.boot_params = 0x00000100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear300_evb_init,
MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index c8684ce..4e1b4e3 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
.boot_params = 0x00000100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear310_evb_init,
MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index a12b353..197ed44 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
.boot_params = 0x00000100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear320_evb_init,
MACHINE_END
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index 8a0b0ed..d490a91 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -11,44 +11,8 @@
* warranty of any kind, whether express or implied.
*/
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
- mov \irqnr, #0
- teq \irqstat, #0
- bne 1001f
- ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
- teq \irqstat, #0
- beq 1002f @ this will set/reset
- @ zero register
- mov \irqnr, #32
-1001:
- /*
- * Following code will find bit position of least significang
- * bit set in irqstat, using following equation
- * least significant bit set in n = (n & ~(n-1))
- */
- sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
- mvn \tmp, \tmp @ tmp = ~tmp
- and \irqstat, \irqstat, \tmp @ irqstat &= tmp
- /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
- clz \tmp, \irqstat @ tmp = leading zeros
-
- rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1
- add \irqnr, \irqnr, \tmp
-
-1002: /* EQ will be set if no irqs pending */
- .endm
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index f19cefe..ec986cb 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -46,6 +47,7 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
.boot_params = 0x00000100,
.map_io = spear6xx_map_io,
.init_irq = spear6xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear6xx_timer,
.init_machine = spear600_evb_init,
MACHINE_END
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 08/10] ARM: u300: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
` (6 preceding siblings ...)
2011-09-28 10:41 ` [PATCHv2 07/10] ARM: spear: " Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 11:03 ` Linus Walleij
2011-09-28 10:41 ` [PATCHv2 09/10] ARM: versatile: " Jamie Iles
2011-09-28 10:41 ` [PATCHv2 10/10] ARM: samsung: " Jamie Iles
9 siblings, 1 reply; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Now that there is a generic IRQ handler for multiple VIC devices use it
for u300 to help building multi platform kernels.
Cc: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-u300/include/mach/entry-macro.S | 24 ------------------------
arch/arm/mach-u300/u300.c | 2 ++
3 files changed, 3 insertions(+), 24 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index eb23c6e..6587e20 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -838,6 +838,7 @@ config ARCH_U300
select CLKDEV_LOOKUP
select HAVE_MACH_CLKDEV
select GENERIC_GPIO
+ select MULTI_IRQ_HANDLER
help
Support for ST-Ericsson U300 series mobile platforms.
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
index 20731ae..7181d6a 100644
--- a/arch/arm/mach-u300/include/mach/entry-macro.S
+++ b/arch/arm/mach-u300/include/mach/entry-macro.S
@@ -8,33 +8,9 @@
* Low-level IRQ helper macros for ST-Ericsson U300
* Author: Linus Walleij <linus.walleij@stericsson.com>
*/
-#include <mach/hardware.h>
-#include <asm/hardware/vic.h>
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
- mov \irqnr, #0
- teq \irqstat, #0
- bne 1002f
-1001: ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
- mov \irqnr, #32
- teq \irqstat, #0
- beq 1003f
-1002: tst \irqstat, #1
- bne 1003f
- add \irqnr, \irqnr, #1
- movs \irqstat, \irqstat, lsr #1
- bne 1002b
-1003: /* EQ will be set if no irqs pending */
- .endm
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index 48b3b7f..6292920 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -19,6 +19,7 @@
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/platform.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/memory.h>
@@ -65,6 +66,7 @@ MACHINE_START(U300, MACH_U300_STRING)
.map_io = u300_map_io,
.reserve = u300_reserve,
.init_irq = u300_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &u300_timer,
.init_machine = u300_init_machine,
MACHINE_END
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 08/10] ARM: u300: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 ` [PATCHv2 08/10] ARM: u300: " Jamie Iles
@ 2011-09-28 11:03 ` Linus Walleij
2011-09-28 12:03 ` Jamie Iles
0 siblings, 1 reply; 37+ messages in thread
From: Linus Walleij @ 2011-09-28 11:03 UTC (permalink / raw)
To: linux-arm-kernel
Hold your horses:
On Wed, Sep 28, 2011 at 12:41 PM, Jamie Iles <jamie@jamieiles.com> wrote:
> diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
> index 20731ae..7181d6a 100644
> --- a/arch/arm/mach-u300/include/mach/entry-macro.S
> +++ b/arch/arm/mach-u300/include/mach/entry-macro.S
> @@ -8,33 +8,9 @@
> ?* Low-level IRQ helper macros for ST-Ericsson U300
> ?* Author: Linus Walleij <linus.walleij@stericsson.com>
> ?*/
> -#include <mach/hardware.h>
> -#include <asm/hardware/vic.h>
>
> ? ? ? ?.macro ?disable_fiq
> ? ? ? ?.endm
>
> - ? ? ? .macro ?get_irqnr_preamble, base, tmp
> - ? ? ? .endm
> -
> ? ? ? ?.macro ?arch_ret_to_user, tmp1, tmp2
> ? ? ? ?.endm
> -
> - ? ? ? .macro ?get_irqnr_and_base, irqnr, irqstat, base, tmp
> - ? ? ? ldr ? ? \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
> - ? ? ? ldr ? ? \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
> - ? ? ? mov ? ? \irqnr, #0
> - ? ? ? teq ? ? \irqstat, #0
> - ? ? ? bne ? ? 1002f
> -1001: ?ldr ? ? \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
> - ? ? ? ldr ? ? \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
> - ? ? ? mov ? ? \irqnr, #32
> - ? ? ? teq ? ? \irqstat, #0
> - ? ? ? beq ? ? 1003f
> -1002: ?tst ? ? \irqstat, #1
> - ? ? ? bne ? ? 1003f
> - ? ? ? add ? ? \irqnr, \irqnr, #1
> - ? ? ? movs ? ?\irqstat, \irqstat, lsr #1
> - ? ? ? bne ? ? 1002b
> -1003: ? ? ? ? ?/* EQ will be set if no irqs pending */
> - ? ? ? .endm
When I inspect patch 2 in this series I get the feeling that it assumes that
there is one and only one VIC bank with 32 interrupts involved. This is
not the case in the U300, it has 64 possible IRQ sources by OR:in the
output IRQ signal from two VIC:s and feeding the resulting IRQ line
into the CPU.
So in the code above we first check the 32 bits at the first VIC instance,
and if that is zero we go on to check the other 32 bits.
vic_single_handle_irq() needs to be modified to handle several
ranges or atleast two.
Note that in mach-u300/core.c we initialize each VIC like this:
vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
So I think the easiest may be to let vic_init() add registered VIC
ranges to a list or array, and increas some num_vics variable
to that vic_single_handle_irq() can traverse both ranges in
order.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 08/10] ARM: u300: convert to MULTI_IRQ_HANDLER
2011-09-28 11:03 ` Linus Walleij
@ 2011-09-28 12:03 ` Jamie Iles
2011-09-28 12:18 ` Linus Walleij
0 siblings, 1 reply; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 12:03 UTC (permalink / raw)
To: linux-arm-kernel
Hi Linus,
On Wed, Sep 28, 2011 at 01:03:34PM +0200, Linus Walleij wrote:
> Hold your horses:
>
> On Wed, Sep 28, 2011 at 12:41 PM, Jamie Iles <jamie@jamieiles.com> wrote:
>
> > diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
> > index 20731ae..7181d6a 100644
> > --- a/arch/arm/mach-u300/include/mach/entry-macro.S
> > +++ b/arch/arm/mach-u300/include/mach/entry-macro.S
> > @@ -8,33 +8,9 @@
> > ?* Low-level IRQ helper macros for ST-Ericsson U300
> > ?* Author: Linus Walleij <linus.walleij@stericsson.com>
> > ?*/
> > -#include <mach/hardware.h>
> > -#include <asm/hardware/vic.h>
> >
> > ? ? ? ?.macro ?disable_fiq
> > ? ? ? ?.endm
> >
> > - ? ? ? .macro ?get_irqnr_preamble, base, tmp
> > - ? ? ? .endm
> > -
> > ? ? ? ?.macro ?arch_ret_to_user, tmp1, tmp2
> > ? ? ? ?.endm
> > -
> > - ? ? ? .macro ?get_irqnr_and_base, irqnr, irqstat, base, tmp
> > - ? ? ? ldr ? ? \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
> > - ? ? ? ldr ? ? \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
> > - ? ? ? mov ? ? \irqnr, #0
> > - ? ? ? teq ? ? \irqstat, #0
> > - ? ? ? bne ? ? 1002f
> > -1001: ?ldr ? ? \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
> > - ? ? ? ldr ? ? \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
> > - ? ? ? mov ? ? \irqnr, #32
> > - ? ? ? teq ? ? \irqstat, #0
> > - ? ? ? beq ? ? 1003f
> > -1002: ?tst ? ? \irqstat, #1
> > - ? ? ? bne ? ? 1003f
> > - ? ? ? add ? ? \irqnr, \irqnr, #1
> > - ? ? ? movs ? ?\irqstat, \irqstat, lsr #1
> > - ? ? ? bne ? ? 1002b
> > -1003: ? ? ? ? ?/* EQ will be set if no irqs pending */
> > - ? ? ? .endm
>
> When I inspect patch 2 in this series I get the feeling that it assumes that
> there is one and only one VIC bank with 32 interrupts involved. This is
> not the case in the U300, it has 64 possible IRQ sources by OR:in the
> output IRQ signal from two VIC:s and feeding the resulting IRQ line
> into the CPU.
No, it will handle more than one vic, and it will check them in the
order the vic_init() is called. I've tested this on picoxcell that has
2 vic's in the same configuration as this.
> So in the code above we first check the 32 bits at the first VIC instance,
> and if that is zero we go on to check the other 32 bits.
>
> vic_single_handle_irq() needs to be modified to handle several
> ranges or atleast two.
The platform IRQ handler is actually vic_handle_irq() that internally
calls vic_single_handle_irq() for each registered vic (in the order of
registration).
> Note that in mach-u300/core.c we initialize each VIC like this:
> vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
> vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
>
> So I think the easiest may be to let vic_init() add registered VIC
> ranges to a list or array, and increas some num_vics variable
> to that vic_single_handle_irq() can traverse both ranges in
> order.
Jamie
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 08/10] ARM: u300: convert to MULTI_IRQ_HANDLER
2011-09-28 12:03 ` Jamie Iles
@ 2011-09-28 12:18 ` Linus Walleij
2011-09-28 12:29 ` Jamie Iles
0 siblings, 1 reply; 37+ messages in thread
From: Linus Walleij @ 2011-09-28 12:18 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 28, 2011 at 2:03 PM, Jamie Iles <jamie@jamieiles.com> wrote:
>> vic_single_handle_irq() needs to be modified to handle several
>> ranges or atleast two.
>
> The platform IRQ handler is actually vic_handle_irq() that internally
> calls vic_single_handle_irq() for each registered vic (in the order of
> registration).
Ah I get it I'm dead wrong as usual :-)
I tried to apply them to test but Iget into dependency trouble with
the referenced required patches, do you have some handy
git branch with all stuff applied in order that I can pull in and
test off?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 08/10] ARM: u300: convert to MULTI_IRQ_HANDLER
2011-09-28 12:18 ` Linus Walleij
@ 2011-09-28 12:29 ` Jamie Iles
0 siblings, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 12:29 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 28, 2011 at 02:18:14PM +0200, Linus Walleij wrote:
> On Wed, Sep 28, 2011 at 2:03 PM, Jamie Iles <jamie@jamieiles.com> wrote:
>
> >> vic_single_handle_irq() needs to be modified to handle several
> >> ranges or atleast two.
> >
> > The platform IRQ handler is actually vic_handle_irq() that internally
> > calls vic_single_handle_irq() for each registered vic (in the order of
> > registration).
>
> Ah I get it I'm dead wrong as usual :-)
>
> I tried to apply them to test but Iget into dependency trouble with
> the referenced required patches, do you have some handy
> git branch with all stuff applied in order that I can pull in and
> test off?
Sure,
git://github.com/jamieiles/linux-2.6-ji.git vic-dt
has all of the dependencies in there too. Thanks for taking a look at
the patches Linus!
Jamie
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCHv2 09/10] ARM: versatile: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
` (7 preceding siblings ...)
2011-09-28 10:41 ` [PATCHv2 08/10] ARM: u300: " Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
2011-09-28 10:41 ` [PATCHv2 10/10] ARM: samsung: " Jamie Iles
9 siblings, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Now that there is a generic IRQ handler for multiple VIC devices use it
for versatile to help building multi platform kernels.
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-versatile/include/mach/entry-macro.S | 30 --------------------
arch/arm/mach-versatile/versatile_ab.c | 2 +
arch/arm/mach-versatile/versatile_dt.c | 2 +
arch/arm/mach-versatile/versatile_pb.c | 2 +
5 files changed, 7 insertions(+), 30 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6587e20..5e6c744 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -277,6 +277,7 @@ config ARCH_VERSATILE
select PLAT_VERSATILE_CLCD
select PLAT_VERSATILE_FPGA_IRQ
select ARM_TIMER_SP804
+ select MULTI_IRQ_HANDLER
help
This enables support for ARM Ltd Versatile board.
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
index e6f7c16..b6f0dbf 100644
--- a/arch/arm/mach-versatile/include/mach/entry-macro.S
+++ b/arch/arm/mach-versatile/include/mach/entry-macro.S
@@ -7,39 +7,9 @@
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
-#include <mach/hardware.h>
-#include <mach/platform.h>
-#include <asm/hardware/vic.h>
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
- mov \irqnr, #0
- teq \irqstat, #0
- beq 1003f
-
-1001: tst \irqstat, #15
- bne 1002f
- add \irqnr, \irqnr, #4
- movs \irqstat, \irqstat, lsr #4
- bne 1001b
-1002: tst \irqstat, #1
- bne 1003f
- add \irqnr, \irqnr, #1
- movs \irqstat, \irqstat, lsr #1
- bne 1002b
-1003: /* EQ will be set if no irqs pending */
-
-@ clz \irqnr, \irqstat
- at 1003: /* EQ will be set if we reach MAXIRQNUM */
- .endm
-
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index f8ae64b..29b1f34 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -27,6 +27,7 @@
#include <mach/hardware.h>
#include <asm/irq.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -39,6 +40,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
.map_io = versatile_map_io,
.init_early = versatile_init_early,
.init_irq = versatile_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &versatile_timer,
.init_machine = versatile_init,
MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index 54e037c..f4d1e0f 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -24,6 +24,7 @@
#include <linux/init.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -45,6 +46,7 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
.map_io = versatile_map_io,
.init_early = versatile_init_early,
.init_irq = versatile_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &versatile_timer,
.init_machine = versatile_dt_init,
.dt_compat = versatile_dt_match,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 37c23df..229d0a3b 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -28,6 +28,7 @@
#include <linux/io.h>
#include <mach/hardware.h>
+#include <asm/hardware/vic.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
@@ -107,6 +108,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
.map_io = versatile_map_io,
.init_early = versatile_init_early,
.init_irq = versatile_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &versatile_timer,
.init_machine = versatile_pb_init,
MACHINE_END
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCHv2 10/10] ARM: samsung: convert to MULTI_IRQ_HANDLER
2011-09-28 10:41 [PATCHv2 00/10] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
` (8 preceding siblings ...)
2011-09-28 10:41 ` [PATCHv2 09/10] ARM: versatile: " Jamie Iles
@ 2011-09-28 10:41 ` Jamie Iles
9 siblings, 0 replies; 37+ messages in thread
From: Jamie Iles @ 2011-09-28 10:41 UTC (permalink / raw)
To: linux-arm-kernel
Now that there is a generic IRQ handler for multiple VIC devices use it
for samsung to help building multi platform kernels.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
---
arch/arm/Kconfig | 3 ++
arch/arm/mach-s5p64x0/include/mach/entry-macro.S | 7 ++--
arch/arm/mach-s5p64x0/mach-smdk6440.c | 2 +
arch/arm/mach-s5p64x0/mach-smdk6450.c | 2 +
arch/arm/mach-s5pc100/include/mach/entry-macro.S | 25 ---------------
arch/arm/mach-s5pc100/mach-smdkc100.c | 2 +
arch/arm/mach-s5pv210/include/mach/entry-macro.S | 37 ----------------------
arch/arm/mach-s5pv210/mach-aquila.c | 2 +
arch/arm/mach-s5pv210/mach-goni.c | 2 +
arch/arm/mach-s5pv210/mach-smdkc110.c | 2 +
arch/arm/mach-s5pv210/mach-smdkv210.c | 2 +
arch/arm/mach-s5pv210/mach-torbreck.c | 2 +
12 files changed, 23 insertions(+), 65 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5e6c744..5d9b70f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -751,6 +751,7 @@ config ARCH_S5P64X0
select HAVE_SCHED_CLOCK
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
+ select MULTI_IRQ_HANDLER
help
Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
SMDK6450.
@@ -766,6 +767,7 @@ config ARCH_S5PC100
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG
+ select MULTI_IRQ_HANDLER
help
Samsung S5PC100 series based systems
@@ -785,6 +787,7 @@ config ARCH_S5PV210
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG
+ select MULTI_IRQ_HANDLER
help
Samsung S5PV210/S5PC110 series based systems
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
index 10b62b4..fbb246d 100644
--- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -10,7 +10,8 @@
* published by the Free Software Foundation.
*/
-#include <mach/map.h>
-#include <plat/irqs.h>
+ .macro disable_fiq
+ .endm
-#include <asm/entry-macro-vic2.S>
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 346f8df..5d482c3 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -24,6 +24,7 @@
#include <linux/gpio.h>
#include <linux/pwm_backlight.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/irq.h>
@@ -174,6 +175,7 @@ MACHINE_START(SMDK6440, "SMDK6440")
.boot_params = S5P64X0_PA_SDRAM + 0x100,
.init_irq = s5p6440_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smdk6440_map_io,
.init_machine = smdk6440_machine_init,
.timer = &s5p_timer,
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 33f2adf..805f2a9 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -24,6 +24,7 @@
#include <linux/gpio.h>
#include <linux/pwm_backlight.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/irq.h>
@@ -193,6 +194,7 @@ MACHINE_START(SMDK6450, "SMDK6450")
.boot_params = S5P64X0_PA_SDRAM + 0x100,
.init_irq = s5p6450_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smdk6450_map_io,
.init_machine = smdk6450_machine_init,
.timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index ba76af0..b8c242e 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -12,39 +12,14 @@
* warranty of any kind, whether express or implied.
*/
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
-
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
- ldr \base, =VA_VIC0
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-
- @ check the vic0
- mov \irqnr, # S5P_IRQ_OFFSET + 31
- ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
- teq \irqstat, #0
-
- @ otherwise try vic1
- addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
- addeq \irqnr, \irqnr, #32
- ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
- teqeq \irqstat, #0
-
- @ otherwise try vic2
- addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
- addeq \irqnr, \irqnr, #32
- ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
- teqeq \irqstat, #0
-
- clzne \irqstat, \irqstat
- subne \irqnr, \irqnr, \irqstat
.endm
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 227d890..49c0b51 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -25,6 +25,7 @@
#include <linux/input.h>
#include <linux/pwm_backlight.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -256,6 +257,7 @@ MACHINE_START(SMDKC100, "SMDKC100")
/* Maintainer: Byungho Min <bhmin@samsung.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
.init_irq = s5pc100_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smdkc100_map_io,
.init_machine = smdkc100_machine_init,
.timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
index 3aa41ac..bebca1b 100644
--- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -10,45 +10,8 @@
* published by the Free Software Foundation.
*/
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
-
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =VA_VIC0
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-
- @ check the vic0
- mov \irqnr, # S5P_IRQ_OFFSET + 31
- ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
- teq \irqstat, #0
-
- @ otherwise try vic1
- addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
- addeq \irqnr, \irqnr, #32
- ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
- teqeq \irqstat, #0
-
- @ otherwise try vic2
- addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
- addeq \irqnr, \irqnr, #32
- ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
- teqeq \irqstat, #0
-
- @ otherwise try vic3
- addeq \tmp, \base, #(VA_VIC3 - VA_VIC0)
- addeq \irqnr, \irqnr, #32
- ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
- teqeq \irqstat, #0
-
- clzne \irqstat, \irqstat
- subne \irqnr, \irqnr, \irqstat
- .endm
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 509627f..858aa0f 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -22,6 +22,7 @@
#include <linux/input.h>
#include <linux/gpio.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/setup.h>
@@ -680,6 +681,7 @@ MACHINE_START(AQUILA, "Aquila")
Kyungmin Park <kyungmin.park@samsung.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
.init_irq = s5pv210_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = aquila_map_io,
.init_machine = aquila_machine_init,
.timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 85c2d51..cb1277b 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -27,6 +27,7 @@
#include <linux/gpio.h>
#include <linux/interrupt.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/setup.h>
@@ -899,6 +900,7 @@ MACHINE_START(GONI, "GONI")
/* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
.init_irq = s5pv210_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = goni_map_io,
.init_machine = goni_machine_init,
.timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 6c412c8..f1f7f9a 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -15,6 +15,7 @@
#include <linux/i2c.h>
#include <linux/sysdev.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/setup.h>
@@ -138,6 +139,7 @@ MACHINE_START(SMDKC110, "SMDKC110")
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
.init_irq = s5pv210_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smdkc110_map_io,
.init_machine = smdkc110_machine_init,
.timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 5e011fc..3d0211f 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -20,6 +20,7 @@
#include <linux/delay.h>
#include <linux/pwm_backlight.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/setup.h>
@@ -321,6 +322,7 @@ MACHINE_START(SMDKV210, "SMDKV210")
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
.init_irq = s5pv210_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = smdkv210_map_io,
.init_machine = smdkv210_machine_init,
.timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 925fc0d..53623e8 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -14,6 +14,7 @@
#include <linux/init.h>
#include <linux/serial_core.h>
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/setup.h>
@@ -127,6 +128,7 @@ MACHINE_START(TORBRECK, "TORBRECK")
/* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
.boot_params = S5P_PA_SDRAM + 0x100,
.init_irq = s5pv210_init_irq,
+ .handle_irq = vic_handle_irq,
.map_io = torbreck_map_io,
.init_machine = torbreck_machine_init,
.timer = &s5p_timer,
--
1.7.4.1
^ permalink raw reply related [flat|nested] 37+ messages in thread