From: nicolas.ferre@atmel.com (Nicolas Ferre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 05/12] ARM: at91: add ioremap_registers entry point to soc setup
Date: Mon, 14 Nov 2011 15:38:35 +0100 [thread overview]
Message-ID: <4EC127EB.8090400@atmel.com> (raw)
In-Reply-To: <1321207952-13556-5-git-send-email-plagnioj@jcrosoft.com>
On 11/13/2011 07:12 PM, Jean-Christophe PLAGNIOL-VILLARD :
> this will allow to ioremap the register of the PIT, PMC and others
> and make the code soc independent
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> arch/arm/mach-at91/at91cap9.c | 5 +++++
> arch/arm/mach-at91/at91rm9200.c | 5 +++++
> arch/arm/mach-at91/at91sam9260.c | 5 +++++
> arch/arm/mach-at91/at91sam9261.c | 5 +++++
> arch/arm/mach-at91/at91sam9263.c | 5 +++++
> arch/arm/mach-at91/at91sam9g45.c | 5 +++++
> arch/arm/mach-at91/at91sam9rl.c | 5 +++++
> arch/arm/mach-at91/setup.c | 2 ++
> arch/arm/mach-at91/soc.h | 1 +
> 9 files changed, 38 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
> index fe00dce..3687207 100644
> --- a/arch/arm/mach-at91/at91cap9.c
> +++ b/arch/arm/mach-at91/at91cap9.c
> @@ -333,6 +333,10 @@ static void __init at91cap9_map_io(void)
> at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
> }
>
> +static void __init at91cap9_ioremap_registers(void)
> +{
> +}
> +
> static void __init at91cap9_initialize(void)
> {
> at91_arch_reset = at91cap9_reset;
> @@ -394,6 +398,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
> struct at91_init_soc __initdata at91cap9_soc = {
> .map_io = at91cap9_map_io,
> .default_irq_priority = at91cap9_default_irq_priority,
> + .ioremap_registers = at91cap9_ioremap_registers,
> .register_clocks = at91cap9_register_clocks,
> .init = at91cap9_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> index 8ce8675..c67d50c 100644
> --- a/arch/arm/mach-at91/at91rm9200.c
> +++ b/arch/arm/mach-at91/at91rm9200.c
> @@ -307,6 +307,10 @@ static void __init at91rm9200_map_io(void)
> iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
> }
>
> +static void __init at91rm9200_ioremap_registers(void)
> +{
> +}
> +
> static void __init at91rm9200_initialize(void)
> {
> at91_arch_reset = at91rm9200_reset;
> @@ -366,6 +370,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
> struct at91_init_soc __initdata at91rm9200_soc = {
> .map_io = at91rm9200_map_io,
> .default_irq_priority = at91rm9200_default_irq_priority,
> + .ioremap_registers = at91rm9200_ioremap_registers,
> .register_clocks = at91rm9200_register_clocks,
> .init = at91rm9200_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
> index 1e9c79f..0e54928 100644
> --- a/arch/arm/mach-at91/at91sam9260.c
> +++ b/arch/arm/mach-at91/at91sam9260.c
> @@ -325,6 +325,10 @@ static void __init at91sam9260_map_io(void)
> }
> }
>
> +static void __init at91sam9260_ioremap_registers(void)
> +{
> +}
> +
> static void __init at91sam9260_initialize(void)
> {
> at91_arch_reset = at91sam9_alt_reset;
> @@ -381,6 +385,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
> struct at91_init_soc __initdata at91sam9260_soc = {
> .map_io = at91sam9260_map_io,
> .default_irq_priority = at91sam9260_default_irq_priority,
> + .ioremap_registers = at91sam9260_ioremap_registers,
> .register_clocks = at91sam9260_register_clocks,
> .init = at91sam9260_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
> index 574aa6b..dde8318 100644
> --- a/arch/arm/mach-at91/at91sam9261.c
> +++ b/arch/arm/mach-at91/at91sam9261.c
> @@ -285,6 +285,10 @@ static void __init at91sam9261_map_io(void)
> at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
> }
>
> +static void __init at91sam9261_ioremap_registers(void)
> +{
> +}
> +
> static void __init at91sam9261_initialize(void)
> {
> at91_arch_reset = at91sam9_alt_reset;
> @@ -341,6 +345,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
> struct at91_init_soc __initdata at91sam9261_soc = {
> .map_io = at91sam9261_map_io,
> .default_irq_priority = at91sam9261_default_irq_priority,
> + .ioremap_registers = at91sam9261_ioremap_registers,
> .register_clocks = at91sam9261_register_clocks,
> .init = at91sam9261_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
> index dee0ed7..fc442dd 100644
> --- a/arch/arm/mach-at91/at91sam9263.c
> +++ b/arch/arm/mach-at91/at91sam9263.c
> @@ -303,6 +303,10 @@ static void __init at91sam9263_map_io(void)
> at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
> }
>
> +static void __init at91sam9263_ioremap_registers(void)
> +{
> +}
> +
> static void __init at91sam9263_initialize(void)
> {
> at91_arch_reset = at91sam9_alt_reset;
> @@ -358,6 +362,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
> struct at91_init_soc __initdata at91sam9263_soc = {
> .map_io = at91sam9263_map_io,
> .default_irq_priority = at91sam9263_default_irq_priority,
> + .ioremap_registers = at91sam9263_ioremap_registers,
> .register_clocks = at91sam9263_register_clocks,
> .init = at91sam9263_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
> index 404d70c..56282b2 100644
> --- a/arch/arm/mach-at91/at91sam9g45.c
> +++ b/arch/arm/mach-at91/at91sam9g45.c
> @@ -338,6 +338,10 @@ static void __init at91sam9g45_map_io(void)
> init_consistent_dma_size(SZ_4M);
> }
>
> +static void __init at91sam9g45_ioremap_registers(void)
> +{
> +}
> +
> static void __init at91sam9g45_initialize(void)
> {
> at91_arch_reset = at91sam9g45_reset;
> @@ -393,6 +397,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
> struct at91_init_soc __initdata at91sam9g45_soc = {
> .map_io = at91sam9g45_map_io,
> .default_irq_priority = at91sam9g45_default_irq_priority,
> + .ioremap_registers = at91sam9g45_ioremap_registers,
> .register_clocks = at91sam9g45_register_clocks,
> .init = at91sam9g45_initialize,
> };
> diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
> index c4004e2..29dae9b 100644
> --- a/arch/arm/mach-at91/at91sam9rl.c
> +++ b/arch/arm/mach-at91/at91sam9rl.c
> @@ -290,6 +290,10 @@ static void __init at91sam9rl_map_io(void)
> at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
> }
>
> +static void __init at91sam9rl_ioremap_registers(void)
> +{
> +}
> +
> static void __init at91sam9rl_initialize(void)
> {
> at91_arch_reset = at91sam9_alt_reset;
> @@ -345,6 +349,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
> struct at91_init_soc __initdata at91sam9rl_soc = {
> .map_io = at91sam9rl_map_io,
> .default_irq_priority = at91sam9rl_default_irq_priority,
> + .ioremap_registers = at91sam9rl_ioremap_registers,
> .register_clocks = at91sam9rl_register_clocks,
> .init = at91sam9rl_initialize,
> };
> diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
> index aa64294..63b3ac2 100644
> --- a/arch/arm/mach-at91/setup.c
> +++ b/arch/arm/mach-at91/setup.c
> @@ -287,6 +287,8 @@ void __init at91_map_io(void)
>
> void __init at91_initialize(unsigned long main_clock)
> {
> + at91_boot_soc.ioremap_registers();
> +
> /* Init clock subsystem */
> at91_clock_init(main_clock);
>
> diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
> index cdf6ccf..f860a2e 100644
> --- a/arch/arm/mach-at91/soc.h
> +++ b/arch/arm/mach-at91/soc.h
> @@ -7,6 +7,7 @@
> struct at91_init_soc {
> unsigned int *default_irq_priority;
> void (*map_io)(void);
> + void (*ioremap_registers)(void);
> void (*register_clocks)(void);
> void (*init)(void);
> };
--
Nicolas Ferre
next prev parent reply other threads:[~2011-11-14 14:38 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-13 18:09 [PATCH 0/12] ARM: at91: make aic/ccfg/dbgu/dma/ecc/gpio/pit/rtt/smc/watchdog register base soc.h independant Jean-Christophe PLAGNIOL-VILLARD
2011-11-13 18:12 ` [PATCH 01/12] ARM: at91: make gpio register base soc independent Jean-Christophe PLAGNIOL-VILLARD
2011-11-13 18:12 ` [PATCH 02/12] ARM: at91: make ecc " Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 14:36 ` Nicolas Ferre
2011-11-13 18:12 ` [PATCH 03/12] ARM: at91: make dma " Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 14:36 ` Nicolas Ferre
2011-11-13 18:12 ` [PATCH 04/12] ARM: at91: make rtt " Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 14:37 ` Nicolas Ferre
2011-11-13 18:12 ` [PATCH 05/12] ARM: at91: add ioremap_registers entry point to soc setup Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 14:38 ` Nicolas Ferre [this message]
2011-11-13 18:12 ` [PATCH 06/12] ARM: at91: make pit register base soc independent Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 14:43 ` Nicolas Ferre
2011-11-13 18:12 ` [PATCH 07/12] ARM: at91: make smc " Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 14:50 ` Nicolas Ferre
2011-11-13 18:12 ` [PATCH 08/12] ARM: at91: make CCFG " Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 14:52 ` Nicolas Ferre
2011-11-13 18:12 ` [PATCH 09/12] ARM: at91: make shutdown controler " Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 15:16 ` Nicolas Ferre
2011-11-13 18:12 ` [PATCH 10/12] ARM: at91: make watchdog drivers " Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 12:39 ` Wim Van Sebroeck
2011-11-14 15:20 ` Nicolas Ferre
2011-11-14 20:24 ` Andrew Victor
2011-11-13 18:12 ` [PATCH 11/12] ARM: at91: make DBGU " Jean-Christophe PLAGNIOL-VILLARD
2011-11-14 15:29 ` Nicolas Ferre
2011-11-13 18:12 ` [PATCH 12/12] ARM: at91: make aic " Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 01/13 v2] ARM: at91: make gpio register base soc independant Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 1/2] ARM: at91: switch gpio clock to clkdev Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 2/2] ARM: at91: gpio make struct at91_gpio_bank an initdata Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 02/13 v2] ARM: at91: make ecc register base soc independant Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 03/13 v2] ARM: at91: make dma " Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 04/13 v2] ARM: at91: make rtt " Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 05/13 v2] ARM: at91: add ioremap_registers entry point to soc setup Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 06/13 v2] ARM: at91: make pit register base soc independent Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 07/13 v2] ARM: at91: make smc " Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 08/13 v2] ARM: at91: drop CCFG Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 09/13 v2] ARM: at91: make shutdown controler soc independent Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 10/13 v2] ARM: at91: make watchdog drivers " Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 11/13 v2] ARM: at91: make DBGU " Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 12/13] ARM: at91: make aic " Jean-Christophe PLAGNIOL-VILLARD
2011-11-15 20:40 ` [PATCH 13/13] ARM: at91: make rm9200 rtc drivers " Jean-Christophe PLAGNIOL-VILLARD
2011-11-21 13:47 ` Nicolas Ferre
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4EC127EB.8090400@atmel.com \
--to=nicolas.ferre@atmel.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).