From: bill4carson@gmail.com (bill4carson)
To: linux-arm-kernel@lists.infradead.org
Subject: Query about: ARM11 MPCore: preemption/task migration cache coherency
Date: Thu, 31 May 2012 13:06:00 +0800 [thread overview]
Message-ID: <4FC6FC38.8090904@gmail.com> (raw)
In-Reply-To: <CAHkRjk4suj4x-mJwvLeOYCNga_YvudNmnz7YxTSzFZ4Jj0iJ+w@mail.gmail.com>
On 2012?05?31? 11:58, Catalin Marinas wrote:
> On 31 May 2012 11:38, bill4carson<bill4carson@gmail.com> wrote:
>> On 2012?05?31? 11:19, Catalin Marinas wrote:
>>> BTW, see this as a starting point (and a hack):
>>>
>>> http://article.gmane.org/gmane.linux.ports.arm.kernel/51556
>>
>> I think we has some mis-understanding here :(
>>
>> As for:v6_flush_kern_dcache_area/v6_flush_kern_dcache_all
>> these two hooks is supposed to be globally effective, *not*
>> locally!
>>
>> Hence, there should below fix to make it as globally effective.
>>
>>
>> +#ifdef CONFIG_SMP
>> + ldr r2, [r0] @ read for ownership
>> + str r2, [r0] @ write for ownership
>> +#endif /* CONFIG_SMP */
>>
>> Or there maybe some other better solution for this issue.
>
> I still didn't fully understand what the problem is. So, to make sure,
> if you run some applications from flash using a yaffs filesystem, you
> get random crashes. Is this correct? If yes, a solution is to actually
> call flush_dcache_page() on the CPU that does the page copying from
> flash into RAM, which could be the yaffs filesystem.
>
The story goes like this:
function "flush_dcache_page" should be global effective
but in ARMv6 MPCore, it was not, it was just local effective due
to hardware design. This may cause error in some cases for example:
1) Task running on Core-0 loading text section into memory.
It was preempted and then migrate into Core-1;
2) On Core-1, this task continue loading it and then
"flush_dcache_page" to make sure the loaded text section write
into main memory.
3) Task tend to the loaded text section and running it.
If the "flush_dcache_page" was not global effective,
there maybe data still in Core-0's data cache, not write
into main memory. Thus in step 3, error instruction maybe
fetched thus cause strange error.
If I'm missing something here, please let me know.
thanks
--
Love each day!
--bill
next prev parent reply other threads:[~2012-05-31 5:06 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-09 9:11 Query about: ARM11 MPCore: preemption/task migration cache coherency bill4carson
2012-05-11 8:51 ` Will Deacon
2012-05-11 9:53 ` bill4carson
2012-05-29 5:28 ` bill4carson
2012-05-30 6:38 ` Will Deacon
2012-05-30 10:01 ` bill4carson
2012-05-31 3:00 ` Catalin Marinas
2012-05-31 3:11 ` bill4carson
2012-05-31 3:12 ` Catalin Marinas
2012-05-31 3:19 ` Catalin Marinas
2012-05-31 3:38 ` bill4carson
2012-05-31 3:58 ` Catalin Marinas
2012-05-31 5:06 ` bill4carson [this message]
2012-05-31 5:19 ` Catalin Marinas
2012-05-31 5:51 ` bill4carson
2012-05-31 6:56 ` Catalin Marinas
2012-05-31 7:21 ` bill4carson
2012-05-31 7:46 ` snakky.zhang at gmail.com
2012-05-31 16:04 ` Catalin Marinas
2012-06-01 1:11 ` snakky.zhang at gmail.com
2012-06-01 3:25 ` Catalin Marinas
2012-06-01 5:21 ` snakky.zhang at gmail.com
2012-06-01 1:34 ` snakky.zhang at gmail.com
2012-06-01 3:29 ` Catalin Marinas
2012-06-03 11:34 ` Russell King - ARM Linux
2012-06-04 9:20 ` snakky.zhang at gmail.com
2012-06-05 4:06 ` George G. Davis
2012-06-05 4:50 ` bill4carson
2012-06-06 6:18 ` Andrew Yan-Pai Chen
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