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From: bill4carson@gmail.com (bill4carson)
To: linux-arm-kernel@lists.infradead.org
Subject: Query about: ARM11 MPCore: preemption/task migration cache coherency
Date: Thu, 31 May 2012 13:51:22 +0800	[thread overview]
Message-ID: <4FC706DA.5040308@gmail.com> (raw)
In-Reply-To: <CAHkRjk4jJphxST86km4ybuVTGxAr-a=3Ag9cQpEysLYxBt-6WQ@mail.gmail.com>



On 2012?05?31? 13:19, Catalin Marinas wrote:
> On 31 May 2012 13:06, bill4carson<bill4carson@gmail.com>  wrote:
>> On 2012?05?31? 11:58, Catalin Marinas wrote:
>>> I still didn't fully understand what the problem is. So, to make sure,
>>> if you run some applications from flash using a yaffs filesystem, you
>>> get random crashes. Is this correct? If yes, a solution is to actually
>>> call flush_dcache_page() on the CPU that does the page copying from
>>> flash into RAM, which could be the yaffs filesystem.
>>
>> The story goes like this:
>> function "flush_dcache_page" should be global effective
>> but in ARMv6 MPCore, it was not, it was just local effective due
>> to hardware design.
>
> Yes, I know this.
>
Then, why not fix "flush_dcache_page" to make it globally effective?


>> This may cause error in some cases for example:
>>
>> 1) Task running on Core-0 loading text section into memory.
>>    It was preempted and then migrate into Core-1;
>
> BTW, do you have CONFIG_PREEMPT enabled?
>
Yes, CONFIG_PREEMPT enabled. Thus cause the task was preempted. :-)


> To be clear - is your application reading some data from flash and
> trying to execute or it's the kernel doing the load via the
> page/prefetch abort mechanism?
>

In my current case, it is yaffs root file system.

> If the latter, task running on core 0 gets a prefetch abort when
> trying to execute some code. The kernel reads the page from flash (via
> mtd, block layer, VFS) and copies it into RAM. It can be on any CPU as
> long as it calls flush_dcache_page on the same CPU that copied the
> data.
>
> No matter where the task was running or migrated to, if the code doing
> the copy also called flush_dcache_page() on the same core, there is no
> data left in the D-cache for that page.

Yes, I agree with it.
But how to flush the data cache on the same core with PREEMPT enabled?
And, I think according to the design, there is no such operation that
guarantee it.


>
>> 2) On Core-1, this task continue loading it and then
>>    "flush_dcache_page" to make sure the loaded text section write
>>    into main memory.
>
> The flush_dcache_page() must be called by the code doing the copy. If
> that copy happened on core 0, the call is done there and not where the
> task migrated. We don't do lazy flushing on ARM11MPCore.
>
WHY?

>> 3) Task tend to the loaded text section and running it.
>>
>> If the "flush_dcache_page" was not global effective,
>> there maybe data still in Core-0's data cache, not write
>> into main memory. Thus in step 3, error instruction maybe
>> fetched thus cause strange error.
>
> This can only happen if you have either preempt enabled (so that the
> kernel code doing the copy is migrated) or the mtd driver or fs do not
> call flush_dcache_page().
>


PREEMPT + MTD root file system. :-)

But any way, I think flush_dcache_page should be global effective.
If ARMv6 MPCore didn't make it, we should try to accomplish it.



-- 
Love each day!

--bill

  reply	other threads:[~2012-05-31  5:51 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-05-09  9:11 Query about: ARM11 MPCore: preemption/task migration cache coherency bill4carson
2012-05-11  8:51 ` Will Deacon
2012-05-11  9:53   ` bill4carson
2012-05-29  5:28   ` bill4carson
2012-05-30  6:38     ` Will Deacon
2012-05-30 10:01       ` bill4carson
2012-05-31  3:00         ` Catalin Marinas
2012-05-31  3:11           ` bill4carson
2012-05-31  3:12             ` Catalin Marinas
2012-05-31  3:19             ` Catalin Marinas
2012-05-31  3:38               ` bill4carson
2012-05-31  3:58                 ` Catalin Marinas
2012-05-31  5:06                   ` bill4carson
2012-05-31  5:19                     ` Catalin Marinas
2012-05-31  5:51                       ` bill4carson [this message]
2012-05-31  6:56                         ` Catalin Marinas
2012-05-31  7:21                           ` bill4carson
2012-05-31  7:46                             ` snakky.zhang at gmail.com
2012-05-31 16:04                               ` Catalin Marinas
2012-06-01  1:11                                 ` snakky.zhang at gmail.com
2012-06-01  3:25                                   ` Catalin Marinas
2012-06-01  5:21                                     ` snakky.zhang at gmail.com
2012-06-01  1:34                                 ` snakky.zhang at gmail.com
2012-06-01  3:29                                   ` Catalin Marinas
2012-06-03 11:34                                     ` Russell King - ARM Linux
2012-06-04  9:20                                       ` snakky.zhang at gmail.com
2012-06-05  4:06 ` George G. Davis
2012-06-05  4:50   ` bill4carson
2012-06-06  6:18     ` Andrew Yan-Pai Chen

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