* [PATCH] clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
@ 2012-07-04 10:49 Lauri Hintsala
2012-07-04 13:35 ` Shawn Guo
2012-07-05 3:06 ` Shawn Guo
0 siblings, 2 replies; 6+ messages in thread
From: Lauri Hintsala @ 2012-07-04 10:49 UTC (permalink / raw)
To: linux-arm-kernel
SSP0 and SSP1 use ref_io0 which has decreased frequency. Expand
the frequency fix for ref_io1 to get SSP2 and SSP3 to work.
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
---
drivers/clk/mxs/clk-imx28.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 2826a26..0097c3a 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
/*
* 480 MHz seems too high to be ssp clock source directly,
- * so set frac0 to get a 288 MHz ref_io0.
+ * so set frac0 to get a 288 MHz ref_io0 and ref_io1.
*/
val = readl_relaxed(FRAC0);
- val &= ~(0x3f << BP_FRAC0_IO0FRAC);
- val |= 30 << BP_FRAC0_IO0FRAC;
+ val &= ~((0x3f << BP_FRAC0_IO0FRAC) | (0x3f << BP_FRAC0_IO1FRAC));
+ val |= (30 << BP_FRAC0_IO0FRAC) | (30 << BP_FRAC0_IO1FRAC);
writel_relaxed(val, FRAC0);
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
2012-07-04 10:49 [PATCH] clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3 Lauri Hintsala
@ 2012-07-04 13:35 ` Shawn Guo
2012-07-04 14:02 ` Lauri Hintsala
2012-07-04 16:23 ` Marek Vasut
2012-07-05 3:06 ` Shawn Guo
1 sibling, 2 replies; 6+ messages in thread
From: Shawn Guo @ 2012-07-04 13:35 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jul 04, 2012 at 01:49:54PM +0300, Lauri Hintsala wrote:
> SSP0 and SSP1 use ref_io0 which has decreased frequency. Expand
> the frequency fix for ref_io1 to get SSP2 and SSP3 to work.
>
The patch looks okay. Just to confirm that you are running SSP2&SSP3
into the same frequency problem that we had with SSP0&SSP1? I never
got a board to verify that for SSP2&SSP3.
Regards,
Shawn
> Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
> ---
> drivers/clk/mxs/clk-imx28.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
> index 2826a26..0097c3a 100644
> --- a/drivers/clk/mxs/clk-imx28.c
> +++ b/drivers/clk/mxs/clk-imx28.c
> @@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
>
> /*
> * 480 MHz seems too high to be ssp clock source directly,
> - * so set frac0 to get a 288 MHz ref_io0.
> + * so set frac0 to get a 288 MHz ref_io0 and ref_io1.
> */
> val = readl_relaxed(FRAC0);
> - val &= ~(0x3f << BP_FRAC0_IO0FRAC);
> - val |= 30 << BP_FRAC0_IO0FRAC;
> + val &= ~((0x3f << BP_FRAC0_IO0FRAC) | (0x3f << BP_FRAC0_IO1FRAC));
> + val |= (30 << BP_FRAC0_IO0FRAC) | (30 << BP_FRAC0_IO1FRAC);
> writel_relaxed(val, FRAC0);
> }
>
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
2012-07-04 13:35 ` Shawn Guo
@ 2012-07-04 14:02 ` Lauri Hintsala
2012-07-04 16:23 ` Marek Vasut
1 sibling, 0 replies; 6+ messages in thread
From: Lauri Hintsala @ 2012-07-04 14:02 UTC (permalink / raw)
To: linux-arm-kernel
On 07/04/2012 04:35 PM, Shawn Guo wrote:
> On Wed, Jul 04, 2012 at 01:49:54PM +0300, Lauri Hintsala wrote:
>> SSP0 and SSP1 use ref_io0 which has decreased frequency. Expand
>> the frequency fix for ref_io1 to get SSP2 and SSP3 to work.
>>
> The patch looks okay. Just to confirm that you are running SSP2&SSP3
> into the same frequency problem that we had with SSP0&SSP1? I never
> got a board to verify that for SSP2&SSP3.
SDIO device connected to SSP2 is not detect without this change. I don't
know what is the history of ref_io0 frequency change but the same change
is needed for ref_io1 to get SSP2 to work on our imx28 based module.
Regards,
Lauri
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
2012-07-04 13:35 ` Shawn Guo
2012-07-04 14:02 ` Lauri Hintsala
@ 2012-07-04 16:23 ` Marek Vasut
2012-07-04 16:39 ` Fabio Estevam
1 sibling, 1 reply; 6+ messages in thread
From: Marek Vasut @ 2012-07-04 16:23 UTC (permalink / raw)
To: linux-arm-kernel
Dear Shawn Guo,
> On Wed, Jul 04, 2012 at 01:49:54PM +0300, Lauri Hintsala wrote:
> > SSP0 and SSP1 use ref_io0 which has decreased frequency. Expand
> > the frequency fix for ref_io1 to get SSP2 and SSP3 to work.
>
> The patch looks okay. Just to confirm that you are running SSP2&SSP3
> into the same frequency problem that we had with SSP0&SSP1? I never
> got a board to verify that for SSP2&SSP3.
What problem is that? I've been running the SPI driver against two types of SPI
flashes on SSP2 without trouble ...
> Regards,
> Shawn
>
> > Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
> > ---
> >
> > drivers/clk/mxs/clk-imx28.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
> > index 2826a26..0097c3a 100644
> > --- a/drivers/clk/mxs/clk-imx28.c
> > +++ b/drivers/clk/mxs/clk-imx28.c
> > @@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
> >
> > /*
> >
> > * 480 MHz seems too high to be ssp clock source directly,
> >
> > - * so set frac0 to get a 288 MHz ref_io0.
> > + * so set frac0 to get a 288 MHz ref_io0 and ref_io1.
> >
> > */
> >
> > val = readl_relaxed(FRAC0);
> >
> > - val &= ~(0x3f << BP_FRAC0_IO0FRAC);
> > - val |= 30 << BP_FRAC0_IO0FRAC;
> > + val &= ~((0x3f << BP_FRAC0_IO0FRAC) | (0x3f << BP_FRAC0_IO1FRAC));
> > + val |= (30 << BP_FRAC0_IO0FRAC) | (30 << BP_FRAC0_IO1FRAC);
> >
> > writel_relaxed(val, FRAC0);
> >
> > }
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
2012-07-04 10:49 [PATCH] clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3 Lauri Hintsala
2012-07-04 13:35 ` Shawn Guo
@ 2012-07-05 3:06 ` Shawn Guo
1 sibling, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2012-07-05 3:06 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jul 04, 2012 at 01:49:54PM +0300, Lauri Hintsala wrote:
> SSP0 and SSP1 use ref_io0 which has decreased frequency. Expand
> the frequency fix for ref_io1 to get SSP2 and SSP3 to work.
>
> Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Applied, thanks.
> ---
> drivers/clk/mxs/clk-imx28.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
> index 2826a26..0097c3a 100644
> --- a/drivers/clk/mxs/clk-imx28.c
> +++ b/drivers/clk/mxs/clk-imx28.c
> @@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
>
> /*
> * 480 MHz seems too high to be ssp clock source directly,
> - * so set frac0 to get a 288 MHz ref_io0.
> + * so set frac0 to get a 288 MHz ref_io0 and ref_io1.
> */
> val = readl_relaxed(FRAC0);
> - val &= ~(0x3f << BP_FRAC0_IO0FRAC);
> - val |= 30 << BP_FRAC0_IO0FRAC;
> + val &= ~((0x3f << BP_FRAC0_IO0FRAC) | (0x3f << BP_FRAC0_IO1FRAC));
> + val |= (30 << BP_FRAC0_IO0FRAC) | (30 << BP_FRAC0_IO1FRAC);
> writel_relaxed(val, FRAC0);
> }
>
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 6+ messages in thread
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2012-07-04 10:49 [PATCH] clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3 Lauri Hintsala
2012-07-04 13:35 ` Shawn Guo
2012-07-04 14:02 ` Lauri Hintsala
2012-07-04 16:23 ` Marek Vasut
2012-07-04 16:39 ` Fabio Estevam
2012-07-05 3:06 ` Shawn Guo
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