From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D8536CCF9F8 for ; Fri, 7 Nov 2025 07:56:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:References:Cc:To:From:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vv6qk5Zpr17e0IDW5t1IS6sWqsJZk5AzteKVx+1EjvA=; b=lBrygDSMtqhvpE+50jHo7LHg+C Fzrq0iP2Y92OujGogagJ4UIwO35b7AzWGBnOJspDWnrIZ2aeKxj9IZmb1ILPQh/sBh1KXPToikdKo 0PRh3uuL4jrv9jzqSe04mbVn4bb0kdLbMYHNX7S8W1iRQmT2egJHNuOCzApi6eJkswMFkzAWzb0he OvAFxCAc/ZwcVjX54zQv6Y0leKjEbQcPb5zP54f44FAPcsQr3VmQIaFWWmokNh6SmfQ3I2sLdp1L4 lQAg5S81FbEBtujxK8SDXXlNFsk6I3rPNdPg43fEUjNiaMWMCDlDGjrZ9E87cOjsL6ruOso/aA7+n YIUrK5ew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vHHKt-0000000GpEa-1xWv; Fri, 07 Nov 2025 07:56:43 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vHHKq-0000000GpEG-3WND for linux-arm-kernel@lists.infradead.org; Fri, 07 Nov 2025 07:56:41 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 3F02343AFA; Fri, 7 Nov 2025 07:56:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17B45C113D0; Fri, 7 Nov 2025 07:56:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762502200; bh=7SeThI/GyvzdlsSjTq1A4LDVdLrB275PlAkljcI1F8g=; h=Date:Subject:From:To:Cc:References:In-Reply-To:From; b=c+SSYVZKKVQjWz0shHKqp/MRoMngGuKuIqsxHpq5YCP6WDZ0BHE07qRBjQ2n52C3D x+de6YxrXksrrgPeGnBWMPSQKCfH0nEozamZa8do5pa7ez35oFCP/IV9+pK/ZvFR3D NKOElNukb0ayF0H8xhnbEunj9F1jjJPET7cewZOJ+SMfnnhDYqlbywiMyvRHjSPDrc tX40alCh4KvlBfawu5wOuEVw7kJW1z4gnBkHNUc7ztXfXZRRwXTpkpEw3Sd7msC1f9 tbEebxYY7fHIQ9axTDXvWYRF2/AK/WFlqHAIyJ4vb0UPNBWKu+NBAx0b4F7n2VgLMu dLp+GJo0Qp49g== Message-ID: <4aa4f664-0dc4-4f7d-8ecb-f1602e5cbfcc@kernel.org> Date: Fri, 7 Nov 2025 08:56:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RESEND PATCH v2 1/5] dt-bindings: display: ti,am65x-dss: Add clk property for data edge synchronization From: Krzysztof Kozlowski To: Swamil Jain Cc: jyri.sarha@iki.fi, tomi.valkeinen@ideasonboard.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, louis.chauvet@bootlin.com, aradhya.bhatia@linux.dev, devarsht@ti.com, praneeth@ti.com, h-shenoy@ti.com, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20251106141227.899054-1-s-jain1@ti.com> <20251106141227.899054-2-s-jain1@ti.com> <20251107-amaranth-platypus-from-betelgeuse-7673b9@kuoka> Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251106_235640_944570_E8C1F4CE X-CRM114-Status: GOOD ( 17.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 07/11/2025 08:54, Krzysztof Kozlowski wrote: > On Thu, Nov 06, 2025 at 07:42:23PM +0530, Swamil Jain wrote: >> From: Louis Chauvet >> >> The dt-bindings for the display, specifically ti,am65x-dss, need to >> include a clock property for data edge synchronization. The current > > clock properties are called "clocks". Please rephrase commit msg or use > proper clocks to indicate you access here a clock (if that's the case). > >> implementation does not correctly apply the data edge sampling property. > > Where is "data edge sampling property"? I do not see it in this binding. > >> >> To address this, synchronization of writes to two different registers is > > How this binding achieves that "synchronization"? What are you even > describing here? > >> required: one in the TIDSS IP (which is already described in the tidss >> node) and one is in the Memory Mapped Control Register Modules. >> >> As the Memory Mapped Control Register Modules is located in a different > > And now another therm - MMCR... > > This commit msg is barely parseable - language is correct but it is a > mix of completely wrong terms. > > In case you used LLM to write this - don't. Ever. > >> IP, we need to use a phandle to write values in its registers. >> >> Fixes: ad2ac9dc9426 ("drm/tidss: Add support for AM625 DSS") >> Fixes: 5cc5ea7b6d7b ("drm/tidss: Add support for AM62A7 DSS") > > You still did not describe the actual bug being fixed here. > Actually, NAK, because you ignored entire previous feedback! Best regards, Krzysztof