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bh=yNki/BaaXgqFuAU7Rhxq4DYyRe0qZNwLMs+MQ5hVwvM=; b=O6MG2TeioBcAI1Qnb54BydAhuwf7Sbw68IacAKC7rClD0YCZTkxWf+oANHet08+Q4rOb3R of0jNuOcN2rTJxe1WpK5J3ZVocemDBwGWUlGpft0fVQN7oElFkngn/CJO3Cujk/s7uOApj rXtfDcWpqazz3Fjb0n6pCkvas8UIh4i40VO8lqjO5bWo4S0XyZ2E0RzgQPNu8IJGJPJmDU QbIeQzaZ7uTSPQsEifpXENxQU1cD7sBJ3VbtXtBOshefcFPeHQaiKmSD+4X5RFHNysx8hP lNAg0ssWH1K9brcMEa9uCjOj5LFO3BQREHj/rjRSJgquUE9C5BzN6XYq5cHeBw== Message-ID: <4b5fc903-f2c1-4e7e-8a4f-629566bff3ad@mailbox.org> Date: Mon, 31 Mar 2025 15:45:18 +0200 MIME-Version: 1.0 Subject: Re: [PATCH 1/4] dt-bindings: PCI: rcar-gen4-pci-host: Document optional aux clock To: Krzysztof Kozlowski Cc: linux-arm-kernel@lists.infradead.org, =?UTF-8?Q?Krzysztof_Wilczy=C5=84sk?= =?UTF-8?Q?i?= , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , Aradhya Bhatia , Bjorn Helgaas , Conor Dooley , Geert Uytterhoeven , Heiko Stuebner , Junhao Xie , Kever Yang , Krzysztof Kozlowski , Kuninori Morimoto , Lorenzo Pieralisi , Magnus Damm , Manivannan Sadhasivam , Neil Armstrong , Rob Herring , Yoshihiro Shimoda , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org References: <20250330195715.332106-1-marek.vasut+renesas@mailbox.org> <20250330195715.332106-2-marek.vasut+renesas@mailbox.org> <20250331-excellent-nautilus-of-apotheosis-fbd30a@krzk-bin> Content-Language: en-US From: Marek Vasut In-Reply-To: <20250331-excellent-nautilus-of-apotheosis-fbd30a@krzk-bin> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-MBO-RS-META: 8qjyfopxbb8111g3aaicaxtrreq91134 X-MBO-RS-ID: a0dc09d5d8d0cbf734d X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250331_064537_945959_36FF21D4 X-CRM114-Status: GOOD ( 13.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 3/31/25 10:19 AM, Krzysztof Kozlowski wrote: > On Sun, Mar 30, 2025 at 09:56:09PM +0200, Marek Vasut wrote: >> diff --git a/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml >> index bb3f843c59d91..5e2624d4c62c7 100644 >> --- a/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml >> +++ b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml >> @@ -46,12 +46,14 @@ properties: >> - const: app >> >> clocks: >> - maxItems: 2 >> + minItems: 2 >> + maxItems: 3 >> >> clock-names: > > missing minItems: 2 > > (xxx and xxx-names are always synced in dimensions) Fixed, noted, thanks ! > I understand that clock is optional? Your diagram in commit msg suggests > that clock is there always. The clocks which supply the PCIe controller ("ref" clock) and PCIe bus ("aux" clock) can be modeled as either, single clock (one clock for both controller AND bus, i.e. single "ref" clock), or two separate clocks (one for controller AND one for bus, i.e. "ref" clock AND "aux" clock). That depends on whether the clock generator (the 9FGV0441 brick in the ASCII schematic in the commit message in this case) has one flip switch to enable both clock (controller and bus, i.e. "ref" clock only), or has separate flip switches to enable the different outputs (controller or bus, i.e. "ref" and "aux" clock). So yes, the "aux" is optional from the software side, but on the hardware side, the "aux" bus clock are always there. They however do not always have separate flip switch to enable/disable them. -- Best regards, Marek Vasut