From: James Clark <james.clark@linaro.org>
To: Leo Yan <leo.yan@arm.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Yeoreum Yun <yeoreum.yun@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: Re: [PATCH v5 00/10] coresight: Fix and improve clock usage
Date: Fri, 25 Jul 2025 09:45:27 +0100 [thread overview]
Message-ID: <4c1161d3-fc7d-4b3c-8197-7b632e85280f@linaro.org> (raw)
In-Reply-To: <20250724-arm_cs_fix_clock_v4-v5-0-63f648dae021@arm.com>
On 24/07/2025 4:22 pm, Leo Yan wrote:
> This series fixes and improves clock usage in the Arm CoreSight drivers.
>
> Based on the DT binding documents, the trace clock (atclk) is defined in
> some CoreSight modules, but support is absent. In most cases, the issue
> is hidden because the atclk clock is shared by multiple CoreSight
> modules and the clock is enabled anyway by other drivers. The first
> three patches address this issue.
>
> The programming clock (pclk) management in CoreSight drivers does not
> use the devm_XXX() variant APIs, the drivers needs to manually disable
> and release clocks for errors and for normal module exit. However, the
> drivers miss to disable clocks during module exit. The atclk may also
> not be disabled in CoreSight drivers during module exit. By using devm
> APIs, patches 04 and 05 fix clock disabling issues.
>
> Another issue is pclk might be enabled twice in init phase - once by
> AMBA bus driver, and again by CoreSight drivers. This is fixed in
> patch 06.
>
> Patches 07 to 10 refactor the clock related code. Patch 07 consolidates
> the clock initialization into a central place. Patch 08 polishes driver
> data allocation. Patch 09 makes the clock enabling sequence consistent.
> Patch 09 removes redundant condition checks and adds error handling in
> runtime PM.
>
> This series has been verified on Arm64 Juno platform, for both DT and
> ACPI modes.
>
Tested on N1SDP with ACPI:
Tested-by: James Clark <james.clark@linaro.org>
> ---
> Changes in v5:
> - Skip clock management for ACPI devices (Suzuki).
> - Link to v4: https://lore.kernel.org/r/20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com
>
> Changes in v4:
> - Separated patch 07 into two patches, one is for clock consolidation
> and another is for polishing driver data allocation (Anshuman).
>
> Changes in v3:
> - Updated subjects for patches 04 and 05 (Anshuman).
> - Refined condition checking "if (dev_is_amba(dev))" in patch 07
> (Anshuman).
>
> ---
> Leo Yan (10):
> coresight: tmc: Support atclk
> coresight: catu: Support atclk
> coresight: etm4x: Support atclk
> coresight: Appropriately disable programming clocks
> coresight: Appropriately disable trace bus clocks
> coresight: Avoid enable programming clock duplicately
> coresight: Consolidate clock enabling
> coresight: Refactor driver data allocation
> coresight: Make clock sequence consistent
> coresight: Refactor runtime PM
>
> drivers/hwtracing/coresight/coresight-catu.c | 53 ++++++++---------
> drivers/hwtracing/coresight/coresight-catu.h | 1 +
> drivers/hwtracing/coresight/coresight-core.c | 48 ++++++++++++++++
> drivers/hwtracing/coresight/coresight-cpu-debug.c | 41 +++++---------
> drivers/hwtracing/coresight/coresight-ctcu-core.c | 24 +++-----
> drivers/hwtracing/coresight/coresight-etb10.c | 18 ++----
> drivers/hwtracing/coresight/coresight-etm3x-core.c | 17 ++----
> drivers/hwtracing/coresight/coresight-etm4x-core.c | 32 ++++++-----
> drivers/hwtracing/coresight/coresight-etm4x.h | 4 +-
> drivers/hwtracing/coresight/coresight-funnel.c | 66 ++++++++--------------
> drivers/hwtracing/coresight/coresight-replicator.c | 63 ++++++++-------------
> drivers/hwtracing/coresight/coresight-stm.c | 34 +++++------
> drivers/hwtracing/coresight/coresight-tmc-core.c | 48 ++++++++--------
> drivers/hwtracing/coresight/coresight-tmc.h | 2 +
> drivers/hwtracing/coresight/coresight-tpiu.c | 36 +++++-------
> include/linux/coresight.h | 31 +---------
> 16 files changed, 228 insertions(+), 290 deletions(-)
> ---
> base-commit: a80198ba650f50d266d7fc4a6c5262df9970f9f2
> change-id: 20250627-arm_cs_fix_clock_v4-e24b1e1f8920
>
> Best regards,
next prev parent reply other threads:[~2025-07-25 8:48 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-24 15:22 [PATCH v5 00/10] coresight: Fix and improve clock usage Leo Yan
2025-07-24 15:22 ` [PATCH v5 01/10] coresight: tmc: Support atclk Leo Yan
2025-07-24 15:22 ` [PATCH v5 02/10] coresight: catu: " Leo Yan
2025-07-24 15:22 ` [PATCH v5 03/10] coresight: etm4x: " Leo Yan
2025-07-24 15:22 ` [PATCH v5 04/10] coresight: Appropriately disable programming clocks Leo Yan
2025-07-28 16:18 ` Mark Brown
2025-07-28 16:44 ` Mark Brown
2025-07-29 11:31 ` Mark Brown
2025-07-29 12:30 ` Suzuki K Poulose
2025-07-30 8:56 ` Leo Yan
2025-07-30 9:27 ` Suzuki K Poulose
2025-07-30 10:54 ` Leo Yan
2025-07-30 11:01 ` Suzuki K Poulose
2025-07-30 11:09 ` Mark Brown
2025-07-30 17:57 ` Leo Yan
2025-07-24 15:22 ` [PATCH v5 05/10] coresight: Appropriately disable trace bus clocks Leo Yan
2025-07-24 15:22 ` [PATCH v5 06/10] coresight: Avoid enable programming clock duplicately Leo Yan
2025-07-24 15:22 ` [PATCH v5 07/10] coresight: Consolidate clock enabling Leo Yan
2025-07-24 15:22 ` [PATCH v5 08/10] coresight: Refactor driver data allocation Leo Yan
2025-07-24 15:22 ` [PATCH v5 09/10] coresight: Make clock sequence consistent Leo Yan
2025-07-24 15:22 ` [PATCH v5 10/10] coresight: Refactor runtime PM Leo Yan
2025-07-25 8:45 ` James Clark [this message]
2025-07-25 9:22 ` [PATCH v5 00/10] coresight: Fix and improve clock usage Suzuki K Poulose
2025-07-29 12:31 ` Suzuki K Poulose
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