From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8606EC38145 for ; Wed, 7 Sep 2022 11:34:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uNdkGdHc8Hwt7uFbIcU2VPDq8djPGDwwRfk9s2r+HOQ=; b=SGA19nprpbrMTW HueNHqFI/Et4zeG1N2HawBaK6llAM0lRFF+TNDddNLS6nPq7GGsdOmVBMqK6dokP3GOpyrhtBpaZR F4HgDXhrU2SvCb/JKan5HF0EgoLeVhiWcjqHM03WCWwfkvvIZOjKOQ6gJdXjRJQfHPmSOsO+obz/M 9ByZqlcuuTlJz1XJloFVVNnGZAdDhIFm6gjnQnvBj/kHl7t0J5MKxRttqG2PF1/AGMmspP4RoXUbp 23Y6LRC9tkuzBQA/D7/Pd2APm7aaQWxyCrAFR6FmYFfMmBmvEBLOARx39UsyCRXBnpCaTKsNIXtXw GCAki++LcEZwurlxR8Yw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVtJY-005jRG-QQ; Wed, 07 Sep 2022 11:33:52 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVtJV-005jAv-Qo for linux-arm-kernel@lists.infradead.org; Wed, 07 Sep 2022 11:33:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A8A4E1042; Wed, 7 Sep 2022 04:33:31 -0700 (PDT) Received: from [10.57.15.197] (unknown [10.57.15.197]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 63EA73F7B4; Wed, 7 Sep 2022 04:33:20 -0700 (PDT) Message-ID: <4ca6383e-bd21-59bf-cc4e-cf3313164957@arm.com> Date: Wed, 7 Sep 2022 12:33:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:102.0) Gecko/20100101 Thunderbird/102.2.1 Subject: Re: [RFC PATCH v3 4/7] bus/cdx: add cdx-MSI domain with gic-its domain as parent Content-Language: en-GB To: Marc Zyngier , Jason Gunthorpe Cc: Nipun Gupta , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, gregkh@linuxfoundation.org, rafael@kernel.org, eric.auger@redhat.com, alex.williamson@redhat.com, cohuck@redhat.com, puneet.gupta@amd.com, song.bao.hua@hisilicon.com, mchehab+huawei@kernel.org, f.fainelli@gmail.com, jeffrey.l.hugo@gmail.com, saravanak@google.com, Michael.Srba@seznam.cz, mani@kernel.org, yishaih@nvidia.com, will@kernel.org, joro@8bytes.org, masahiroy@kernel.org, ndesaulniers@google.com, linux-arm-kernel@lists.infradead.org, linux-kbuild@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, okaya@kernel.org, harpreet.anand@amd.com, nikhil.agarwal@amd.com, michal.simek@amd.com, aleksandar.radovanovic@amd.com, git@amd.com References: <20220803122655.100254-1-nipun.gupta@amd.com> <20220906134801.4079497-1-nipun.gupta@amd.com> <20220906134801.4079497-5-nipun.gupta@amd.com> <87leqvv3g7.wl-maz@kernel.org> From: Robin Murphy In-Reply-To: <87leqvv3g7.wl-maz@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220907_043349_937446_EBBB28E6 X-CRM114-Status: GOOD ( 21.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2022-09-07 12:17, Marc Zyngier wrote: > On Tue, 06 Sep 2022 18:19:06 +0100, > Jason Gunthorpe wrote: >> >> On Tue, Sep 06, 2022 at 07:17:58PM +0530, Nipun Gupta wrote: >> >>> +static void cdx_msi_write_msg(struct irq_data *irq_data, >>> + struct msi_msg *msg) >>> +{ >>> + /* >>> + * Do nothing as CDX devices have these pre-populated >>> + * in the hardware itself. >>> + */ >>> +} >> >> Huh? >> >> There is no way it can be pre-populated, the addr/data pair, >> especially on ARM, is completely under SW control. > > There is nothing in the GIC spec that says that. > >> There is some commonly used IOVA base in Linux for the ITS page, but >> no HW should hardwire that. > > That's not strictly true. It really depends on how this block is > integrated, and there is a number of existing blocks that know *in HW* > how to signal an LPI. > > See, as the canonical example, how the mbigen driver doesn't need to > know about the address of GITS_TRANSLATER. > > Yes, this messes with translation (the access is downstream of the > SMMU) if you relied on it to have some isolation, and it has a "black > hole" effect as nobody can have an IOVA that overlaps with the > physical address of the GITS_TRANSLATER register. > > But is it illegal as per the architecture? No. It's just stupid. If that were the case, then we'd also need a platform quirk so the SMMU driver knows about it. Yuck. But even then, are you suggesting there is some way to convince the ITS driver to allocate a specific predetermined EventID when a driver requests an MSI? Asking for a friend... Cheers, Robin. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel