From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC062CA5FD2 for ; Thu, 1 Oct 2026 15:01:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=7bW5MafubFoYnhuJLpqKkMD8gQQoCRhnHRElEH1UNac=; b=gRdsCGo+ldXmQECy8HJM1r9ePE S/rL+bamQaw03Eo8VAW3y1U/CRZ+ITM+8xBV/QR4qQ9qO9rKtW6KG8obeAUASuC6IDjesIYx2HPO9 G55PtR7wY90sn/VuyV4IVrd2zz6QZ+p0Sw72Q0geNRWEIVx6gLditBU1ZhQY35iurdSUJrmr6MJHM Mdg46OYLwpIU7oxQjIsYND+GkfFrHnr64UxxLXmc1frr2cEDfgOM3oJD+Q5fqnXj9OgM2Joon23CI 0giAds8zIekjLAafil6SInBRvcjN+tmpHr4XgDWWb3da4OsxaAcmyYKX4xfD6Q+VcTS9Ps9ES9+an puyzSSOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xCIHq-00000009T2i-20ef; Thu, 01 Oct 2026 15:01:30 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xCIHj-00000009T0S-1RqA for linux-arm-kernel@lists.infradead.org; Thu, 01 Oct 2026 15:01:27 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DD88E497; Thu, 1 Oct 2026 08:01:17 -0700 (PDT) Received: from [192.168.178.24] (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 953FB3F85F; Thu, 1 Oct 2026 08:01:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1790866881; bh=XTVRVF8m0N+oPT7x4//CBmcmJrGUeaN4+yGD8CNBiOM=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=G/j4cpmaNURwJkDqE/EaZyyFQYGzqEP++n8HFWe72Pw+38oyxBYNXYyXPa1SEW/AB k1nn88RJyGZFpJgREFG+BIQtYTl3gdp/xFuMGoFJMvEVsYxwrIBfOf51IalmSMHgsG Zsaxu2rNyH47XphizEDyGo3TUU7P67Y5FcEeFQ5w= Message-ID: <4cf07f55-9fe0-4083-bd4f-3ee1a2b85753@arm.com> Date: Thu, 1 Oct 2026 17:01:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 08/13] arm_mpam: propagate MSC access errors for interrupt control To: Jonathan Cameron Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J . Wysocki" , Len Brown , James Morse , Ben Horgan , Reinette Chatre , Fenghua Yu , Jonathan Cameron , Srivathsa L Rao , Ganapatrao Kulkarni , Trilok Soni , Srinivas Ramana , Niyas Sait , Lee Trager , Ritwick Sharma , Gavin Shan , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20260924152739.2865510-1-andre.przywara@arm.com> <20260924152739.2865510-9-andre.przywara@arm.com> <20260924152017.00004ec8@oss.qualcomm.com> Content-Language: en-GB From: Andre Przywara In-Reply-To: <20260924152017.00004ec8@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261001_080125_419291_9C492329 X-CRM114-Status: GOOD ( 21.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Jonathan, On 9/25/26 00:20, Jonathan Cameron wrote: > On Thu, 24 Sep 2026 17:27:34 +0200 > Andre Przywara wrote: > >> Allow the functions dealing with interrupt registration and enablement >> to check for and return errors, and propagate MSC read and write errors >> from the lower level up. >> This does not cover the IRQ handler yet, as this needs some more >> attention. >> >> Signed-off-by: Andre Przywara >> Reviewed-by: Srivathsa L Rao > > A few trivial things below. Anyhow, I don't really care about them so Your comments make sense, and since they shrink the diff, I am all for them. Thanks for the tag! Cheers, Andre > > Reviewed-by: Jonathan Cameron > >> --- >> drivers/resctrl/mpam_devices.c | 31 +++++++++++++++---------------- >> 1 file changed, 15 insertions(+), 16 deletions(-) >> >> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c >> index 558efab75f911..eb26c25b9f970 100644 >> --- a/drivers/resctrl/mpam_devices.c >> +++ b/drivers/resctrl/mpam_devices.c >> @@ -1105,7 +1105,9 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc) >> } >> >> /* Clear any stale errors */ >> - mpam_msc_clear_esr(msc); >> + ret = mpam_msc_clear_esr(msc); >> + if (ret) >> + return ret; >> >> spin_lock(&partid_max_lock); >> mpam_partid_max = min(mpam_partid_max, msc->partid_max); >> @@ -2668,9 +2670,7 @@ static int mpam_enable_msc_ecr(void *_msc) >> { >> struct mpam_msc *msc = _msc; >> >> - __mpam_write_reg(msc, MPAMF_ECR, MPAMF_ECR_INTEN); >> - >> - return 0; >> + return __mpam_write_reg(msc, MPAMF_ECR, MPAMF_ECR_INTEN); >> } >> >> /* This can run in mpam_disable(), and the interrupt handler on the same CPU */ >> @@ -2678,9 +2678,7 @@ static int mpam_disable_msc_ecr(void *_msc) >> { >> struct mpam_msc *msc = _msc; >> >> - __mpam_write_reg(msc, MPAMF_ECR, 0); >> - >> - return 0; >> + return __mpam_write_reg(msc, MPAMF_ECR, 0); >> } >> >> static irqreturn_t __mpam_irq_handler(int irq, struct mpam_msc *msc) >> @@ -2777,11 +2775,13 @@ static int mpam_register_irqs(void) >> return err; >> } >> >> - mutex_lock(&msc->error_irq_lock); >> - msc->error_irq_req = true; >> - mpam_touch_msc(msc, mpam_enable_msc_ecr, msc); >> - msc->error_irq_hw_enabled = true; >> - mutex_unlock(&msc->error_irq_lock); >> + scoped_guard(mutex, &msc->error_irq_lock) { >> + msc->error_irq_req = true; >> + err = mpam_touch_msc(msc, mpam_enable_msc_ecr, msc); >> + if (err) >> + return err; >> + msc->error_irq_hw_enabled = true; >> + } > > Scope ends here so unless something else gets added in later patches, you > could just use a guard() and reduce the noise. > >> } >> >> return 0; >> @@ -2800,10 +2800,10 @@ static void mpam_unregister_irqs(void) >> if (irq <= 0) >> continue; >> >> - mutex_lock(&msc->error_irq_lock); > > Given you don't return early as a result this is an unrelated change. I don't > really mind but in ideal world would be a separate patch. > >> + guard(mutex)(&msc->error_irq_lock); >> if (msc->error_irq_hw_enabled) { >> - mpam_touch_msc(msc, mpam_disable_msc_ecr, msc); >> - msc->error_irq_hw_enabled = false; >> + if (!mpam_touch_msc(msc, mpam_disable_msc_ecr, msc)) >> + msc->error_irq_hw_enabled = false; >> } >> >> if (msc->error_irq_req) { >> @@ -2815,7 +2815,6 @@ static void mpam_unregister_irqs(void) >> } >> msc->error_irq_req = false; >> } >> - mutex_unlock(&msc->error_irq_lock); >> } >> } >> >