From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39BA8C433E9 for ; Mon, 25 Jan 2021 22:06:48 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E938C2100A for ; Mon, 25 Jan 2021 22:06:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E938C2100A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=TuLhH/bz7egi5UBES+q2yaUuEef75iqTvyDpU/C6Iro=; b=1NMVPd9XPkgS/3X/TEkDmPfZR v+IM5sviezDvmdObWAKv1PcmVSlE0R98AW1Ii6CzEzh6ukW/rTu3rRZ8pN0pIIA4ChRuw+/i7Lg+W FZptmmOyTf39v6Dr2b021y1fIY+wqjqBLwvESWigMfLZAdICHzYDu/b7qtkStgJm3lw2k01mC6Mr+ EKKtAodS/gT6e9NpVLvC5OPwrcZ2t4luLqj/dIsWderlcjup97mVkG1W6o6hkL+TnRlWP0zcoEJa5 FESPcogRwaOno9VP3oGGDvh6LSkiNgfI9NwQifx8aiNDy57CSPW09wZYwpLEsFbSFQmT4BwWYCRyb mNuhbXupw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l49zD-00071N-2r; Mon, 25 Jan 2021 22:05:27 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l49z9-00070P-0p for linux-arm-kernel@lists.infradead.org; Mon, 25 Jan 2021 22:05:24 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CC646D6E; Mon, 25 Jan 2021 14:05:20 -0800 (PST) Received: from [10.57.40.145] (unknown [10.57.40.145]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A96753F68F; Mon, 25 Jan 2021 14:05:18 -0800 (PST) Subject: Re: [PATCH v7 00/28] coresight: etm4x: Support for system instructions To: Mathieu Poirier References: <20210110224850.1880240-1-suzuki.poulose@arm.com> <20210125184950.GC894394@xps15> From: Suzuki K Poulose Message-ID: <4f1171f1-8d3c-cba7-ac5c-d88264e959bc@arm.com> Date: Mon, 25 Jan 2021 22:05:12 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.1 MIME-Version: 1.0 In-Reply-To: <20210125184950.GC894394@xps15> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210125_170523_178091_2DE4C7A2 X-CRM114-Status: GOOD ( 18.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: anshuman.khandual@arm.com, catalin.marinas@arm.com, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, jonathan.zhouwen@huawei.com, leo.yan@linaro.org, linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/25/21 6:49 PM, Mathieu Poirier wrote: > On Sun, Jan 10, 2021 at 10:48:22PM +0000, Suzuki K Poulose wrote: >> CoreSight ETMv4.4 obsoletes memory mapped access to ETM and >> mandates the system instructions for registers. >> This also implies that they may not be on the amba bus. >> Right now all the CoreSight components are accessed via memory >> map. Also, we have some common routines in coresight generic >> code driver (e.g, CS_LOCK, claim/disclaim), which assume the >> mmio. In order to preserve the generic algorithms at a single >> place and to allow dynamic switch for ETMs, this series introduces >> an abstraction layer for accessing a coresight device. It is >> designed such that the mmio access are fast tracked (i.e, without >> an indirect function call). >> >> This will also help us to get rid of the driver+attribute specific >> sysfs show/store routines and replace them with a single routine >> to access a given register offset (which can be embedded in the >> dev_ext_attribute). This is not currently implemented in the series, >> but can be achieved. >> >> Further we switch the generic routines to work with the abstraction. >> With this in place, we refactor the etm4x code a bit to allow for >> supporting the system instructions with very little new code. >> >> We use TRCDEVARCH for the detection of the ETM component, which >> is a standard register as per CoreSight architecture, rather than >> the etm specific id register TRCIDR1. This is for making sure >> that we are able to detect the ETM via system instructions accurately, >> when the the trace unit could be anything (etm or a custom trace unit). >> To keep the backward compatibility for any existing broken >> impelementation which may not implement TRCDEVARCH, we fall back to TRCIDR1. >> Also this covers us for the changes in the future architecture [0]. >> >> Also, v8.4 self-hosted tracing extensions (coupled with ETMv4.4) adds >> new filtering registers for trace by exception level. So on a v8.4 >> system, with Trace Filtering support, without the appropriate >> programming of the Trace filter registers (TRFCR_ELx), tracing >> will not be enabled. This series also includes the TraceFiltering >> support to cover the ETM-v4.4 support. >> >> The series has been mildly tested on a model for system instructions. >> I would really appreciate any testing on real hardware. >> >> Applies on coresight/next. A tree is available here [1]. > > I have applied this set. Thanks Mathieu, appreciate it. Cheers Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel