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Tue, 29 Sep 2020 14:52:13 +0100 MIME-Version: 1.0 Date: Tue, 29 Sep 2020 14:52:12 +0100 From: Marc Zyngier To: Alexander Graf Subject: Re: [PATCH v3] KVM: arm64: Preserve PMCR immutable values across reset In-Reply-To: <20200910164243.29253-1-graf@amazon.com> References: <20200910164243.29253-1-graf@amazon.com> User-Agent: Roundcube Webmail/1.4.8 Message-ID: <4f33899554e54e3c4485612394898864@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: graf@amazon.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, robin.murphy@arm.com, mark.rutland@arm.com, eric.auger@redhat.com, drjones@redhat.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200929_095216_266510_B4BB3AD6 X-CRM114-Status: GOOD ( 26.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Andrew Jones , kvm@vger.kernel.org, Suzuki K Poulose , Eric Auger , James Morse , linux-arm-kernel@lists.infradead.org, Robin Murphy , kvmarm@lists.cs.columbia.edu, Julien Thierry Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-09-10 17:42, Alexander Graf wrote: > We allow user space to set the PMCR register to any value. However, > when time comes for a vcpu reset (for example on PSCI online), PMCR > is reset to the hardware capabilities. > > I would like to explicitly expose different PMU capabilities (number > of supported event counters) to the guest than hardware supports. > Ideally across vcpu resets. > > So this patch adopts the reset path to only populate the immutable > PMCR register bits from hardware when they were not initialized > previously. This effectively means that on a normal reset, only the > guest settable fields are reset, while on vcpu creation the register > gets populated from hardware like before. > > With this in place and a change in user space to invoke SET_ONE_REG > on the PMCR for every vcpu, I can reliably set the PMU event counter > number to arbitrary values. > > Signed-off-by: Alexander Graf > --- > arch/arm64/kvm/sys_regs.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 20ab2a7d37ca..28f67550db7f 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -663,7 +663,14 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, > const struct sys_reg_desc *r) > { > u64 pmcr, val; > > - pmcr = read_sysreg(pmcr_el0); > + /* > + * If we already received PMCR from a previous ONE_REG call, > + * maintain its immutable flags > + */ > + pmcr = __vcpu_sys_reg(vcpu, r->reg); > + if (!__vcpu_sys_reg(vcpu, r->reg)) > + pmcr = read_sysreg(pmcr_el0); > + > /* > * Writable bits of PMCR_EL0 (ARMV8_PMU_PMCR_MASK) are reset to > UNKNOWN > * except PMCR.E resetting to zero. I'm afraid you may need a bit more than just this hack. At the moment, although we can write junk into the shadow copy of PMCR_EL0, the reset will make that behave correctly. With this patch, the junk sticks and gets exposed to the guest. You need at least a .set_user callback to the handling of PMCR_EL0 so that the value stored is legal, follows the architectural behaviour, and matches the host capabilities. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel