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From: Philipp Zabel <p.zabel@pengutronix.de>
To: robby.cai@oss.nxp.com, Frank.Li@nxp.com, s.hauer@pengutronix.de,
	 festevam@gmail.com
Cc: krzk+dt@kernel.org, andrew.smirnov@gmail.com,
	kernel@pengutronix.de,  imx@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org, aisheng.dong@nxp.com,
	guoniu.zhou@nxp.com
Subject: Re: [PATCH v3 1/1] reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQ
Date: Thu, 02 Jul 2026 17:53:43 +0200	[thread overview]
Message-ID: <4fa5149db18bfac88780382cf8d2d6ee18470c71.camel@pengutronix.de> (raw)
In-Reply-To: <20260619073115.3778313-1-robby.cai@oss.nxp.com>

On Fr, 2026-06-19 at 15:31 +0800, robby.cai@oss.nxp.com wrote:
> From: Robby Cai <robby.cai@nxp.com>
> 
> On i.MX8MQ, the MIPI CSI reset lines are active-low and not self-clearing.
> Writing '0' asserts reset and it remains asserted until explicitly
> deasserted by software.
> 
> This driver previously treated the MIPI CSI reset signals as active-high,
> which led to incorrect reset assert/deassert sequencing. This issue was
> exposed by commit 6d79bb8fd2aa ("media: imx8mq-mipi-csi2: Explicitly
> release reset").
> 
> Fix this by reflecting the correct reset polarity and ensuring proper
> reset handling.
[...]

Applied to reset/fixes, thanks!

[1/1] reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQ
      https://git.kernel.org/pub/scm/linux/kernel/git/pza/linux.git/commit/?id=71827776667f

regards
Philipp


      parent reply	other threads:[~2026-07-02 15:53 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-19  7:31 [PATCH v3 1/1] reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQ robby.cai
2026-06-19 14:20 ` Frank Li
2026-06-22  9:50 ` guoniu.zhou
2026-07-02 15:53 ` Philipp Zabel [this message]

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