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Fri, 11 Oct 2024 03:28:59 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.23]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c9371533c4sm1763989a12.54.2024.10.11.03.28.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Oct 2024 03:28:57 -0700 (PDT) Message-ID: <4ff318b0-cd7c-4857-888c-a07c8985fce9@tuxon.dev> Date: Fri, 11 Oct 2024 13:28:55 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 08/12] arm64: dts: renesas: r9a08g045: Add RTC node Content-Language: en-US To: Geert Uytterhoeven Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, alexandre.belloni@bootlin.com, magnus.damm@gmail.com, p.zabel@pengutronix.de, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea References: <20240830130218.3377060-1-claudiu.beznea.uj@bp.renesas.com> <20240830130218.3377060-9-claudiu.beznea.uj@bp.renesas.com> From: claudiu beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241011_112902_931464_656A0F94 X-CRM114-Status: GOOD ( 18.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Geert, On 10.10.2024 18:22, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Fri, Aug 30, 2024 at 3:02 PM Claudiu wrote: >> From: Claudiu Beznea >> >> Add the DT node for the RTC IP available on the Renesas RZ/G3S SoC. >> >> Signed-off-by: Claudiu Beznea >> --- >> >> Changes in v3: >> - added CPG clock, power domain, reset >> - and assigned-clocks, assigned-clock-parents to configure the >> VBATTCLK >> - included dt-bindings/clock/r9a08g045-vbattb.h > > Thanks for your patch! > >> --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi >> +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi >> @@ -160,6 +161,22 @@ i2c3: i2c@10090c00 { >> status = "disabled"; >> }; >> >> + rtc: rtc@1004ec00 { > > Please insert this after serial@1004b800, to preserve sort order. You're right. I though I have already checked this. > >> + compatible = "renesas,r9a08g045-rtca3", "renesas,rz-rtca3"; >> + reg = <0 0x1004ec00 0 0x400>; >> + interrupts = , >> + , >> + ; >> + interrupt-names = "alarm", "period", "carry"; >> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb VBATTB_VBATTCLK>; >> + clock-names = "bus", "counter"; >> + assigned-clocks = <&vbattb VBATTB_MUX>; >> + assigned-clock-parents = <&vbattb VBATTB_XC>; > > Don't the assigned-clock* properties belong in the board DTS? It makes sense to be in the board DTS, indeed. > In addition, I think they should be documented in the DT bindings, > and be made required, so board developers don't forget about them. It would be better, indeed. Thank you, Claudiu Beznea > >> + power-domains = <&cpg>; >> + resets = <&cpg R9A08G045_VBAT_BRESETN>; >> + status = "disabled"; >> + }; >> + >> vbattb: vbattb@1005c000 { >> compatible = "renesas,r9a08g045-vbattb"; >> reg = <0 0x1005c000 0 0x1000>; > > The rest LGTM. > > Gr{oetje,eeting}s, > > Geert >