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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id q17-20020a17090676d100b006fea59ef3a5sm7115446ejn.32.2022.06.21.00.00.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Jun 2022 00:00:37 -0700 (PDT) Message-ID: <4ff85493-665a-ee58-07d3-80178c49223b@linaro.org> Date: Tue, 21 Jun 2022 09:00:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH v5 04/15] dt-bindings: spi: dw: Add AMD Pensando Elba SoC SPI Controller bindings Content-Language: en-US To: Serge Semin Cc: Brad Larson , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, adrian.hunter@intel.com, alcooperx@gmail.com, andy.shevchenko@gmail.com, arnd@arndb.de, blarson@amd.com, brijeshkumar.singh@amd.com, catalin.marinas@arm.com, gsomlo@gmail.com, gerg@linux-m68k.org, krzysztof.kozlowski+dt@linaro.org, lee.jones@linaro.org, broonie@kernel.org, yamada.masahiro@socionext.com, p.zabel@pengutronix.de, piotrs@cadence.com, p.yadav@ti.com, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, ulf.hansson@linaro.org, will@kernel.org, devicetree@vger.kernel.org References: <20220613195658.5607-1-brad@pensando.io> <20220613195658.5607-5-brad@pensando.io> <20220620193044.ihxfn6kddif7j5la@mobilestation> <0a68aa72-df85-cf78-dcca-2d75038234c6@kernel.org> <20220620200445.yew3vo3pnjhos7rs@mobilestation> From: Krzysztof Kozlowski In-Reply-To: <20220620200445.yew3vo3pnjhos7rs@mobilestation> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220621_000043_717716_1937990A X-CRM114-Status: GOOD ( 21.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 20/06/2022 22:04, Serge Semin wrote: > On Mon, Jun 20, 2022 at 09:46:25PM +0200, Krzysztof Kozlowski wrote: >> On 20/06/2022 21:30, Serge Semin wrote: >>> On Mon, Jun 13, 2022 at 12:56:47PM -0700, Brad Larson wrote: >>>> From: Brad Larson >>>> >>>> The AMD Pensando Elba SoC has integrated the DW APB SPI Controller >>>> >>>> Signed-off-by: Brad Larson >>>> --- >>>> Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 2 ++ >>>> 1 file changed, 2 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml >>>> index e25d44c218f2..2a55b947cffc 100644 >>>> --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml >>>> +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml >>>> @@ -73,6 +73,8 @@ properties: >>>> - renesas,r9a06g032-spi # RZ/N1D >>>> - renesas,r9a06g033-spi # RZ/N1S >>>> - const: renesas,rzn1-spi # RZ/N1 >>> >>>> + - description: AMD Pensando Elba SoC SPI Controller >>>> + const: amd,pensando-elba-spi >>> >>> Not enough. The driver requires to have a phandle reference to the >>> Pensando System Controller. So the property like >>> "amd,pensando-elba-syscon" is also needed to be added to the DT schema >>> otherwise should the dt-schema tool correctly handle the >>> "unevaluatedProperties: false" setting (Rob says it isn't fully >>> supported at the moment), the dtbs_check procedure will fail on your >>> dts evaluation. >> > >> The property was here before, now removed, so I assume it was also >> removed from the driver and DTS. Isn't that the case? > > Ah, the property has been indeed removed. The driver now searches for > the system controller by the next compatible string: > "amd,pensando-elba-syscon" using the > syscon_regmap_lookup_by_compatible() method. My mistake. Sorry for the > noise. > > * Though personally I'd prefer to have a property with the phandle > reference in order to signify the connection between the system controller > and the SPI-controller. Otherwise the implicit DT bindings like having > the "amd,pensando-elba-syscon"-compatible syscon gets to be > hidden behind the DT scene. But seeing we have already got the Microsemi > platform with such semantic, I can't insist on fixing this. I agree entirely, this should be explicit syscon-type property. Looking up for compatibles: - creates hidden (not expressed via bindings) dependency between nodes, - is not portable and several people struggled with it later and needed backward-compatible code (many examples, let's just give recent one: [1]) [1] https://lore.kernel.org/all/20220619151225.209029-10-tmaimon77@gmail.com/ Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel