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Tue, 25 Feb 2025 17:23:27 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 0290540074; Tue, 25 Feb 2025 17:22:19 +0100 (CET) Received: from Webmail-eu.st.com (eqndag1node4.st.com [10.75.129.133]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id EBEE141878C; Tue, 25 Feb 2025 15:58:48 +0100 (CET) Received: from SAFDAG1NODE1.st.com (10.75.90.17) by EQNDAG1NODE4.st.com (10.75.129.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 25 Feb 2025 15:58:48 +0100 Received: from [10.48.86.222] (10.48.86.222) by SAFDAG1NODE1.st.com (10.75.90.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 25 Feb 2025 15:58:47 +0100 Message-ID: <4ffc3fe3-78ab-43b2-b0d5-8f9cb545f9c5@foss.st.com> Date: Tue, 25 Feb 2025 15:58:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/8] counter: stm32-lptimer-cnt: add support for stm32mp25 To: Krzysztof Kozlowski CC: , , , , , , , , , , , , , , , , , , References: <20250224180150.3689638-1-fabrice.gasnier@foss.st.com> <20250224180150.3689638-7-fabrice.gasnier@foss.st.com> <20250225-pelican-of-pleasurable-might-e9a7e8@krzk-bin> Content-Language: en-US From: Fabrice Gasnier In-Reply-To: <20250225-pelican-of-pleasurable-might-e9a7e8@krzk-bin> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.86.222] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SAFDAG1NODE1.st.com (10.75.90.17) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-25_05,2025-02-25_03,2024-11-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_082334_299722_A677FF7A X-CRM114-Status: GOOD ( 17.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/25/25 13:02, Krzysztof Kozlowski wrote: > On Mon, Feb 24, 2025 at 07:01:48PM +0100, Fabrice Gasnier wrote: >> Add support for STM32MP25 SoC. Use newly introduced compatible to handle >> this new HW variant, even if no major change is expected on the counter >> driver. >> >> Signed-off-by: Fabrice Gasnier >> --- >> drivers/counter/stm32-lptimer-cnt.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c >> index b249c8647639..a5dce017c37b 100644 >> --- a/drivers/counter/stm32-lptimer-cnt.c >> +++ b/drivers/counter/stm32-lptimer-cnt.c >> @@ -508,6 +508,7 @@ static SIMPLE_DEV_PM_OPS(stm32_lptim_cnt_pm_ops, stm32_lptim_cnt_suspend, >> >> static const struct of_device_id stm32_lptim_cnt_of_match[] = { >> { .compatible = "st,stm32-lptimer-counter", }, >> + { .compatible = "st,stm32mp25-lptimer-counter", }, > > So fully compatible? Why this change then? Hi Krzysztof, I should have mentioned it in the commit message: Currently, same feature list as on STM32MP1x is supported. New capture input stage is now available in the hardware. It's not added yet to the driver. The Low Power Timer (LPTIM) hardware isn't fully backward compatible, hence add a new compatible to properly support it. Best regards, Fabrice > > Best regards, > Krzysztof >