From: cyril@ti.com (Cyril Chemparathy)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 21/23] ARM: keystone: introducing TI Keystone platform
Date: Tue, 24 Jul 2012 13:56:29 -0400 [thread overview]
Message-ID: <500EE1CD.6030701@ti.com> (raw)
In-Reply-To: <201207241446.53401.arnd@arndb.de>
Arnd,
Thanks for taking the time to dig through this.
On 7/24/2012 10:46 AM, Arnd Bergmann wrote:
> On Tuesday 24 July 2012, Cyril Chemparathy wrote:
>
>> diff --git a/arch/arm/boot/dts/keystone-sim.dts b/arch/arm/boot/dts/keystone-sim.dts
>> new file mode 100644
>> index 0000000..118d631
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/keystone-sim.dts
>> @@ -0,0 +1,77 @@
>> +/dts-v1/;
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> + model = "Texas Instruments Keystone 2 SoC";
>> + compatible = "ti,keystone-evm";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>
> I would assume that you need at least #address-cells=<2>, possibly
> also #size-cells=<2>, in order to express large memory ranges.
>
Thanks, will fix.
>> diff --git a/arch/arm/mach-keystone/include/mach/entry-macro.S b/arch/arm/mach-keystone/include/mach/entry-macro.S
>> new file mode 100644
>> index 0000000..7f486f3
>> --- /dev/null
>> +++ b/arch/arm/mach-keystone/include/mach/entry-macro.S
>>
>> + .macro disable_fiq
>> + .endm
>> +
>> + .macro arch_ret_to_user, tmp1, tmp2
>> + .endm
>
> I think it would be better to enable MULTI_IRQ_HANDLER and remove
> this file.
>
Agreed.
>> diff --git a/arch/arm/mach-keystone/include/mach/io.h b/arch/arm/mach-keystone/include/mach/io.h
>> new file mode 100644
>> index 0000000..844d659
>> --- /dev/null
>> +++ b/arch/arm/mach-keystone/include/mach/io.h
>
>> +#ifndef __MACH_IO_H
>> +#define __MACH_IO_H
>> +
>> +#define __io(a) ({ (void)(a); __typesafe_io(0); })
>> +#define __mem_pci(a) (a)
>> +
>> +#endif
>
> This should also be removed.
>
Agreed.
>> diff --git a/arch/arm/mach-keystone/include/mach/memory.h b/arch/arm/mach-keystone/include/mach/memory.h
>> new file mode 100644
>> index 0000000..7c78b1e
>> --- /dev/null
>> +++ b/arch/arm/mach-keystone/include/mach/memory.h
>
>> +#ifndef __ASM_MACH_MEMORY_H
>> +#define __ASM_MACH_MEMORY_H
>> +
>> +#define MAX_PHYSMEM_BITS 36
>> +#define SECTION_SIZE_BITS 34
>> +
>> +#endif /* __ASM_MACH_MEMORY_H */
>
> I wonder if there is anything we can do to make these generic. What you
> have here is ok for now, but we will need to do this differently once
> we are building multiplatform kernels with keystone and sparse memory.
>
Understood. Any ideas on the general direction towards solving this?
>> diff --git a/arch/arm/mach-keystone/include/mach/system.h b/arch/arm/mach-keystone/include/mach/system.h
>> new file mode 100644
>> index 0000000..4887b4c
>> --- /dev/null
>> +++ b/arch/arm/mach-keystone/include/mach/system.h
>
>> +#ifndef __MACH_SYSTEM_H
>> +#define __MACH_SYSTEM_H
>> +
>> +static inline void arch_idle(void)
>> +{
>> + cpu_do_idle();
>> +}
>> +
>> +static inline void arch_reset(char mode, const char *cmd)
>> +{
>> + while (1)
>> + ;
>> +}
>> +
>> +#endif
>
> These are no longer used, please remove the file.
>
Sure.
>
>> diff --git a/arch/arm/mach-keystone/include/mach/vmalloc.h b/arch/arm/mach-keystone/include/mach/vmalloc.h
>> new file mode 100644
>> index 0000000..9d34c09
>> --- /dev/null
>> +++ b/arch/arm/mach-keystone/include/mach/vmalloc.h
>
>> +
>> +#define VMALLOC_END 0xFE800000UL
>> +
>> +#endif
>
> same here.
>
Sure.
>> +DT_MACHINE_START(KEYSTONE, "Keystone")
>> + .map_io = keystone_map_io,
>> + .init_irq = keystone_init_irq,
>> + .timer = &keystone_timer,
>> + .handle_irq = gic_handle_irq,
>> + .init_machine = keystone_init,
>> + .dt_compat = keystone_match,
>> + .nr_irqs = 480,
>> +MACHINE_END
>
> IIRC, you don't need to set the nr_irqs this high in advance,
> they will be allocated automatically since you have enabled
> sparse IRQs.
>
We were seeing a complaint without nr_irqs set, but I'll dig into that
further.
--
Thanks
- Cyril
next prev parent reply other threads:[~2012-07-24 17:56 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-24 1:09 [RFC 00/23] Introducing the TI Keystone platform Cyril Chemparathy
2012-07-24 1:09 ` [RFC 01/23] ARM: LPAE: disable phys-to-virt patching on PAE systems Cyril Chemparathy
2012-07-24 9:41 ` Catalin Marinas
2012-07-24 10:43 ` Cyril Chemparathy
2012-07-24 1:09 ` [RFC 05/23] ARM: LPAE: use phys_addr_t in free_memmap() Cyril Chemparathy
2012-07-24 1:09 ` [RFC 02/23] ARM: LPAE: use signed arithmetic for mask definitions Cyril Chemparathy
2012-07-24 10:05 ` Catalin Marinas
2012-07-24 10:52 ` Cyril Chemparathy
2012-07-31 15:35 ` Cyril Chemparathy
2012-07-24 1:10 ` [RFC 04/23] ARM: LPAE: use phys_addr_t in alloc_init_pud() Cyril Chemparathy
2012-07-24 1:10 ` [RFC 08/23] ARM: LPAE: use 64-bit pgd physical address in switch_mm() Cyril Chemparathy
2012-07-24 1:10 ` [RFC 16/23] ARM: LPAE: accomodate >32-bit addresses for page table base Cyril Chemparathy
2012-07-24 1:10 ` [RFC 07/23] ARM: LPAE: use phys_addr_t for membank size Cyril Chemparathy
2012-07-24 10:04 ` Will Deacon
2012-07-24 10:46 ` Cyril Chemparathy
2012-07-24 1:10 ` [RFC 11/23] ARM: mm: cleanup checks for membank overlap with vmalloc area Cyril Chemparathy
2012-07-24 1:10 ` [RFC 20/23] mm: bootmem: use phys_addr_t for physical addresses Cyril Chemparathy
2012-07-24 1:10 ` [RFC 12/23] ARM: mm: clean up membank size limit checks Cyril Chemparathy
2012-07-24 1:10 ` [RFC 17/23] ARM: add machine desc hook for early memory/paging initialization Cyril Chemparathy
2012-07-24 14:32 ` Arnd Bergmann
2012-07-24 14:47 ` Cyril Chemparathy
2012-07-24 1:10 ` [RFC 09/23] ARM: LPAE: use 64-bit accessors for TTBR registers Cyril Chemparathy
2012-07-24 1:10 ` [RFC 18/23] ARM: add virt_to_idmap for interconnect aliasing Cyril Chemparathy
2012-07-24 1:10 ` [RFC 03/23] ARM: LPAE: use phys_addr_t on virt <--> phys conversion Cyril Chemparathy
2012-07-24 10:37 ` Catalin Marinas
2012-07-24 10:55 ` Cyril Chemparathy
2012-07-24 11:02 ` Catalin Marinas
2012-07-24 1:10 ` [RFC 13/23] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem Cyril Chemparathy
2012-07-24 1:10 ` [RFC 10/23] ARM: mm: use physical addresses in highmem sanity checks Cyril Chemparathy
2012-07-24 1:10 ` [RFC 15/23] ARM: LPAE: allow proc override of TTB setup Cyril Chemparathy
2012-07-24 1:10 ` [RFC 22/23] ARM: keystone: enable SMP on Keystone machines Cyril Chemparathy
2012-07-24 1:33 ` [RFC 23/23] ARM: keystone: add switch over to high physical address range Cyril Chemparathy
2012-07-24 9:49 ` Catalin Marinas
2012-07-24 14:39 ` Arnd Bergmann
2012-07-24 14:59 ` Cyril Chemparathy
2012-07-24 1:33 ` [RFC 06/23] ARM: LPAE: use phys_addr_t for initrd location and size Cyril Chemparathy
2012-07-24 1:38 ` [RFC 19/23] drivers: cma: fix addressing on PAE machines Cyril Chemparathy
2012-07-24 1:38 ` [RFC 21/23] ARM: keystone: introducing TI Keystone platform Cyril Chemparathy
2012-07-24 14:46 ` Arnd Bergmann
2012-07-24 17:56 ` Cyril Chemparathy [this message]
2012-07-24 18:45 ` Arnd Bergmann
2012-07-24 1:38 ` [RFC 14/23] ARM: LPAE: factor out T1SZ and TTBR1 computations Cyril Chemparathy
2012-07-24 9:08 ` [RFC 00/23] Introducing the TI Keystone platform Will Deacon
2012-07-24 10:41 ` Cyril Chemparathy
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