Re: [PATCH v9 2/2] arm64: dts: rockchip: Add rk3576 pcie nodes

[Nicolas Frattaroli <nicolas.frattaroli@collabora.com>]

On Monday, 14 April 2025 16:51:10 Central European Summer Time Kever Yang wrote:
> rk3576 has two pcie controllers, both are pcie2x1 work with
> naneng-combphy.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> Tested-by: Shawn Lin <Shawn.lin@rock-chips.com>
> ---
> 
> Changes in v9:
> - rebase on 6.15-rc1
> - Add test tag
> 
> Changes in v8: None
> Changes in v7:
> - re-order the properties.
> 
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3:
> - Update the subject
> 
> Changes in v2:
> - Update clock and reset names and sequence to pass DTB check
> 
>  arch/arm64/boot/dts/rockchip/rk3576.dtsi | 108 +++++++++++++++++++++++
>  1 file changed, 108 insertions(+)
> 

Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

Successfully used this on an ArmSoM Sige5 RK3576 board. PCIe works.
Properties look correct, though the `ranges = ` doesn't separate out the
different ranges into individual `<cells>` but this doesn't seem to make
any difference and doesn't cause any warnings either. The only added
warning is "simple-bus unit address format error" which seems like a
bug in the thing generating the warning and not the device-tree itself,
as it doesn't seem to notice that the address of the node is within the
regs array, just not as the first cell.

I think this looks good for merging, I'll also send out a Sige5 enablement
patch shortly.

Thank you!

Regards,
Nicolas Frattaroli