From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Chen-Yu Tsai <wens@csie.org>,
Samuel Holland <samuel@sholland.org>,
Andre Przywara <andre.przywara@arm.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@gentoo.org>,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev
Subject: Re: [RFC PATCH 1/9] pinctrl: sunxi: rename SUNXI_PINCTRL_NEW_REG_LAYOUT
Date: Mon, 08 Sep 2025 15:53:11 +0200 [thread overview]
Message-ID: <5037008.31r3eYUQgx@jernej-laptop> (raw)
In-Reply-To: <20250821004232.8134-2-andre.przywara@arm.com>
Dne četrtek, 21. avgust 2025 ob 02:42:24 Srednjeevropski poletni čas je Andre Przywara napisal(a):
> After keeping the pinctrl IP mostly register compatible for almost a
> decade, in 2021 Allwinner introduced some changes to the register
> layout, which made us use a flag called SUNXI_PINCTRL_NEW_REG_LAYOUT.
> Now with their latest SoC (A733), Allwinner changed the pinctrl IP
> again, so "NEW" isn't really a fitting name anymore.
That was bound to happen.
>
> Rename the symbol to SUNXI_PINCTRL_NCAT2_REG_LAYOUT, with "NCAT2" being
> a name often used in vendor source code to signify this "new" generation
> of SoCs.
>
> Just a rename of the symbol, no actual code changes.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviwed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
> ---
> drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c | 2 +-
> drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c | 2 +-
> drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c | 2 +-
> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 2 +-
> drivers/pinctrl/sunxi/pinctrl-sunxi.h | 2 +-
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c b/drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
> index 8efe35b77af4d..37a60e5d1163b 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
> @@ -821,7 +821,7 @@ static const struct sunxi_pinctrl_desc d1_pinctrl_data = {
> static int d1_pinctrl_probe(struct platform_device *pdev)
> {
> return sunxi_pinctrl_init_with_flags(pdev, &d1_pinctrl_data,
> - SUNXI_PINCTRL_NEW_REG_LAYOUT);
> + SUNXI_PINCTRL_NCAT2_REG_LAYOUT);
> }
>
> static const struct of_device_id d1_pinctrl_match[] = {
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
> index 69cd2b4ebd7d7..86a12bce0e335 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
> @@ -36,7 +36,7 @@ static int a523_r_pinctrl_probe(struct platform_device *pdev)
> return sunxi_pinctrl_dt_table_init(pdev, a523_r_nr_bank_pins,
> a523_r_irq_bank_muxes,
> &a523_r_pinctrl_data,
> - SUNXI_PINCTRL_NEW_REG_LAYOUT);
> + SUNXI_PINCTRL_NCAT2_REG_LAYOUT);
> }
>
> static const struct of_device_id a523_r_pinctrl_match[] = {
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
> index 7d2308c37d29e..0f703cacfe5e3 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
> @@ -35,7 +35,7 @@ static int a523_pinctrl_probe(struct platform_device *pdev)
> return sunxi_pinctrl_dt_table_init(pdev, a523_nr_bank_pins,
> a523_irq_bank_muxes,
> &a523_pinctrl_data,
> - SUNXI_PINCTRL_NEW_REG_LAYOUT |
> + SUNXI_PINCTRL_NCAT2_REG_LAYOUT |
> SUNXI_PINCTRL_ELEVEN_BANKS);
> }
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> index 0fb057a07dccb..0a5acbd978da9 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> @@ -1521,7 +1521,7 @@ int sunxi_pinctrl_init_with_flags(struct platform_device *pdev,
> pctl->dev = &pdev->dev;
> pctl->desc = desc;
> pctl->variant = flags & SUNXI_PINCTRL_VARIANT_MASK;
> - if (flags & SUNXI_PINCTRL_NEW_REG_LAYOUT) {
> + if (flags & SUNXI_PINCTRL_NCAT2_REG_LAYOUT) {
> pctl->bank_mem_size = D1_BANK_MEM_SIZE;
> pctl->pull_regs_offset = D1_PULL_REGS_OFFSET;
> pctl->dlevel_field_width = D1_DLEVEL_FIELD_WIDTH;
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
> index ad26e4de16a85..fb17fae2dab69 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
> @@ -88,7 +88,7 @@
> #define SUN4I_FUNC_IRQ 6
>
> #define SUNXI_PINCTRL_VARIANT_MASK GENMASK(7, 0)
> -#define SUNXI_PINCTRL_NEW_REG_LAYOUT BIT(8)
> +#define SUNXI_PINCTRL_NCAT2_REG_LAYOUT BIT(8)
> #define SUNXI_PINCTRL_PORTF_SWITCH BIT(9)
> #define SUNXI_PINCTRL_ELEVEN_BANKS BIT(10)
>
>
next prev parent reply other threads:[~2025-09-08 17:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-21 0:42 [RFC PATCH 0/9] pinctrl: sunxi: Allwinner A733 support Andre Przywara
2025-08-21 0:42 ` [RFC PATCH 1/9] pinctrl: sunxi: rename SUNXI_PINCTRL_NEW_REG_LAYOUT Andre Przywara
2025-09-08 13:53 ` Jernej Škrabec [this message]
2025-08-21 0:42 ` [RFC PATCH 2/9] pinctrl: sunxi: pass down flags to pinctrl routines Andre Przywara
2025-08-21 0:42 ` [RFC PATCH 3/9] pinctrl: sunxi: only use PortK special handling on A523 Andre Przywara
2025-08-21 0:42 ` [RFC PATCH 4/9] pinctrl: sunxi: refactor IRQ register accessors Andre Przywara
2025-08-21 0:42 ` [RFC PATCH 5/9] pinctrl: sunxi: support A733 generation MMIO register layout Andre Przywara
2025-08-21 0:42 ` [RFC PATCH 6/9] pinctrl: sunxi: add support for set/clear regs Andre Przywara
2025-08-21 12:35 ` Linus Walleij
2025-08-21 0:42 ` [RFC PATCH 7/9] dt-bindings: pinctrl: add compatible for Allwinner A733 Andre Przywara
2025-08-21 18:14 ` Conor Dooley
2025-08-21 0:42 ` [RFC PATCH 8/9] pinctrl: sunxi: a523-r: add a733-r compatible string Andre Przywara
2025-08-23 23:09 ` Julian Calaby
2025-08-21 0:42 ` [RFC PATCH 9/9] pinctrl: sunxi: Add support for the Allwinner A733 Andre Przywara
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