[PATCH 1/6 v2] ARM: integrator: call common init function from machine

[PATCH 1/6 v2] ARM: integrator: call common init function from machine

[Linus Walleij]

There is currently a common integrator_init() function set up
to be called from an arch_initcall(). The problem is that it is
using machine_is_integrator() which is not working with device
tree, let's call this from respective machine initilization
function and add a parameter to tell whether it's the
Integrator/AP or Integrator/CP instead.

There are still machine_is*() calls in the Integrator
machines directory, but this one needs to be fixed lest we
don't even get a UART console on the Integrator/AP after a
Device Tree boot.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/mach-integrator/common.h        | 1 +
 arch/arm/mach-integrator/core.c          | 6 ++----
 arch/arm/mach-integrator/integrator_ap.c | 2 ++
 arch/arm/mach-integrator/integrator_cp.c | 1 +
 4 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index 899561d..c4338e2 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,3 +1,4 @@
 void integrator_init_early(void);
+int integrator_init(bool is_cp);
 void integrator_reserve(void);
 void integrator_restart(char, const char *);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 3fa6c51..5ba4bc8 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -61,7 +61,7 @@ static struct amba_device *amba_devs[] __initdata = {
 	&kmi1_device,
 };
 
-static int __init integrator_init(void)
+int __init integrator_init(bool is_cp)
 {
 	int i;
 
@@ -70,7 +70,7 @@ static int __init integrator_init(void)
 	 * hard-code them. The Integator/CP and forward have proper cell IDs.
 	 * Else we leave them undefined to the bus driver can autoprobe them.
 	 */
-	if (machine_is_integrator()) {
+	if (!is_cp) {
 		rtc_device.periphid	= 0x00041030;
 		uart0_device.periphid	= 0x00041010;
 		uart1_device.periphid	= 0x00041010;
@@ -86,8 +86,6 @@ static int __init integrator_init(void)
 	return 0;
 }
 
-arch_initcall(integrator_init);
-
 /*
  * On the Integrator platform, the port RTS and DTR are provided by
  * bits in the following SC_CTRLS register bits:
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 3b22675..ff966d8 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -312,6 +312,8 @@ static void __init ap_init(void)
 
 		lm_device_register(lmdev);
 	}
+
+	integrator_init(false);
 }
 
 /*
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 82d5c83..2b40bc1 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -366,6 +366,7 @@ static void __init intcp_init(void)
 		struct amba_device *d = amba_devs[i];
 		amba_device_register(d, &iomem_resource);
 	}
+	integrator_init(true);
 }
 
 #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
-- 
1.7.11.4

[PATCH 2/6 v2] ARM: integrator: check PL010 device name rather than base address

[Linus Walleij]

In the PL010 UART callback a comparison against the base address is
done to figure out which UART is doing the callback. This does not
play well with device tree, so let's check the dev_name() of the
device instead.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/mach-integrator/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 5ba4bc8..67ea181 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -100,7 +100,7 @@ static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *bas
 {
 	unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
 
-	if (dev == &uart0_device) {
+	if (!strcmp(dev_name(&dev->dev), "uart0")) {
 		rts_mask = 1 << 4;
 		dtr_mask = 1 << 5;
 	} else {
-- 
1.7.11.4

[PATCH 3/6 v2] ARM: plat-versatile: add DT support to FPGA IRQ controller

[Linus Walleij]

This adds Device Tree probing support to the Versatile FPGA
IRQ controller.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Stop passing the Linux IRQ number in the DT node, bad idea.
  Register descriptors dynamically, and use whatever IRQ number
  base we get. Assume we will switch everything using this over to
  DT and live with it.
---
 .../devicetree/bindings/arm/versatile-fpga-irq.txt | 31 ++++++++++++++
 arch/arm/plat-versatile/fpga-irq.c                 | 47 ++++++++++++++++++++++
 arch/arm/plat-versatile/include/plat/fpga-irq.h    |  2 +
 3 files changed, 80 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt

diff --git a/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt b/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
new file mode 100644
index 0000000..9989eda
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
@@ -0,0 +1,31 @@
+* ARM Versatile FPGA interrupt controller
+
+One or more FPGA IRQ controllers can be synthesized in an ARM reference board
+such as the Integrator or Versatile family. The output of these different
+controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
+instance can handle up to 32 interrupts.
+
+Required properties:
+- compatible: "arm,versatile-fpga-irq"
+- interrupt-controller: Identifies the node as an interrupt controller
+- #interrupt-cells: The number of cells to define the interrupts.  Must be 1
+  as the FPGA IRQ controller has no configuration options for interrupt
+  sources.  The cell is a u32 and defines the interrupt number.
+- reg: The register bank for the FPGA interrupt controller.
+- clear-mask: a u32 number representing the mask written to clear all IRQs
+  on the controller at boot for example.
+- valid-mask: a u32 number representing a bit mask determining which of
+  the interrupts are valid. Unconnected/unused lines are set to 0, and
+  the system till not make it possible for devices to request these
+  interrupts.
+
+Example:
+
+pic: pic at 14000000 {
+        compatible = "arm,versatile-fpga-irq";
+        #interrupt-cells = <1>;
+        interrupt-controller;
+        reg = <0x14000000 0x100>;
+        clear-mask = <0xffffffff>;
+        valid-mask = <0x003fffff>;
+};
diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c
index 6e70d03..1ca595c 100644
--- a/arch/arm/plat-versatile/fpga-irq.c
+++ b/arch/arm/plat-versatile/fpga-irq.c
@@ -5,6 +5,8 @@
 #include <linux/io.h>
 #include <linux/irqdomain.h>
 #include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
@@ -14,6 +16,13 @@
 #define IRQ_RAW_STATUS		0x04
 #define IRQ_ENABLE_SET		0x08
 #define IRQ_ENABLE_CLEAR	0x0c
+#define INT_SOFT_SET		0x10
+#define INT_SOFT_CLEAR		0x14
+#define FIQ_STATUS		0x20
+#define FIQ_RAW_STATUS		0x24
+#define FIQ_ENABLE		0x28
+#define FIQ_ENABLE_SET		0x28
+#define FIQ_ENABLE_CLEAR	0x2C
 
 /**
  * struct fpga_irq_data - irq data container for the FPGA IRQ controller
@@ -156,3 +165,41 @@ void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
 
 	fpga_irq_id++;
 }
+
+#ifdef CONFIG_OF
+int __init fpga_irq_of_init(struct device_node *node,
+			    struct device_node *parent)
+{
+	void __iomem *base;
+	u32 irq_start;
+	u32 clear_mask;
+	u32 valid_mask;
+
+	if (WARN_ON(!node))
+		return -ENODEV;
+
+	base = of_iomap(node, 0);
+	WARN(!base, "unable to map fpga irq registers\n");
+
+	if (of_property_read_u32(node, "clear-mask", &clear_mask))
+		clear_mask = 0;
+
+	if (of_property_read_u32(node, "valid-mask", &valid_mask))
+		valid_mask = 0;
+
+	irq_start = irq_alloc_descs(-1, 0, fls(valid_mask), numa_node_id());
+	if (WARN_ON(irq_start < 0))
+		goto out_unmap;
+
+	writel(clear_mask, base + IRQ_ENABLE_CLEAR);
+	writel(clear_mask, base + FIQ_ENABLE_CLEAR);
+
+	fpga_irq_init(base, node->name, irq_start, -1, valid_mask, node);
+
+	return 0;
+
+out_unmap:
+	iounmap(base);
+	return -EIO;
+}
+#endif
diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/arch/arm/plat-versatile/include/plat/fpga-irq.h
index 91bcfb6..1fac965 100644
--- a/arch/arm/plat-versatile/include/plat/fpga-irq.h
+++ b/arch/arm/plat-versatile/include/plat/fpga-irq.h
@@ -7,5 +7,7 @@ struct pt_regs;
 void fpga_handle_irq(struct pt_regs *regs);
 void fpga_irq_init(void __iomem *, const char *, int, int, u32,
 		struct device_node *node);
+int fpga_irq_of_init(struct device_node *node,
+		     struct device_node *parent);
 
 #endif
-- 
1.7.11.4

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Linus Walleij]

This is initial device tree support for the ARM Integrator family,
we create a very basic device tree, #ifdef out the non-DT machines
when compiling for device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Also switch over clocksource and clockevent to device tree.
  Else the IRQ mapping goes bananas.
---
 Documentation/devicetree/bindings/arm/arm-boards |  12 ++
 arch/arm/boot/dts/integratorap.dts               |  51 ++++++++
 arch/arm/boot/dts/integratorcp.dts               |  69 ++++++++++
 arch/arm/mach-integrator/integrator_ap.c         | 137 ++++++++++++++++----
 arch/arm/mach-integrator/integrator_cp.c         | 152 ++++++++++++++++-------
 5 files changed, 353 insertions(+), 68 deletions(-)
 create mode 100644 arch/arm/boot/dts/integratorap.dts
 create mode 100644 arch/arm/boot/dts/integratorcp.dts

diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards
index 91f2614..fc81a7d 100644
--- a/Documentation/devicetree/bindings/arm/arm-boards
+++ b/Documentation/devicetree/bindings/arm/arm-boards
@@ -1,3 +1,15 @@
+ARM Integrator/AP (Application Platform) and Integrator/CP (Compact Platform)
+-----------------------------------------------------------------------------
+ARM's oldest Linux-supported platform with connectors for different core
+tiles of ARMv4, ARMv5 and ARMv6 type.
+
+Required properties (in root node):
+	compatible = "arm,integrator-ap";  /* Application Platform */
+	compatible = "arm,integrator-cp";  /* Compact Platform */
+
+FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
+
+
 ARM Versatile Application and Platform Baseboards
 -------------------------------------------------
 ARM's development hardware platform with connectors for customizable
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
new file mode 100644
index 0000000..928a7be
--- /dev/null
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -0,0 +1,51 @@
+/*
+ * Device Tree for the ARM Integrator/AP platform
+ */
+
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+	model = "ARM Integrator/AP";
+	compatible = "arm,integrator-ap";
+	ranges;
+
+	aliases {
+		arm,integrator-clocksource = &timer2;
+		arm,integrator-clockevent = &timer1;
+	};
+
+	chosen {
+		bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
+	};
+
+	timer0: timer at 13000000 {
+		compatible = "arm,integrator-timer";
+		reg = <0x13000000 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <5>;
+	};
+
+	timer1: timer at 13000100 {
+		compatible = "arm,integrator-timer";
+		reg = <0x13000100 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <6>;
+	};
+
+	timer2: timer at 13000200 {
+		compatible = "arm,integrator-timer";
+		reg = <0x13000200 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <7>;
+	};
+
+	pic: pic at 14000000 {
+		compatible = "arm,versatile-fpga-irq";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		reg = <0x14000000 0x100>;
+		clear-mask = <0xffffffff>;
+		valid-mask = <0x003fffff>;
+	};
+};
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
new file mode 100644
index 0000000..8fad5a1
--- /dev/null
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -0,0 +1,69 @@
+/*
+ * Device Tree for the ARM Integrator/CP platform
+ */
+
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+	model = "ARM Integrator/CP";
+	compatible = "arm,integrator-cp";
+	ranges;
+
+	aliases {
+		arm,integrator-clocksource = &timer2;
+		arm,integrator-clockevent = &timer1;
+	};
+
+	chosen {
+		bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
+	};
+
+	timer0: timer at 13000000 {
+		compatible = "arm,sp804", "arm,primecell";
+		reg = <0x13000000 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <5>;
+	};
+
+	timer1: timer at 13000100 {
+		compatible = "arm,sp804", "arm,primecell";
+		reg = <0x13000100 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <6>;
+	};
+
+	timer2: timer at 13000200 {
+		compatible = "arm,sp804", "arm,primecell";
+		reg = <0x13000200 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <7>;
+	};
+
+	pic: pic at 14000000 {
+		compatible = "arm,versatile-fpga-irq";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		reg = <0x14000000 0x100>;
+		clear-mask = <0xffffffff>;
+		valid-mask = <0x1fc003ff>;
+	};
+
+	cic: cic at 10000040 {
+		compatible = "arm,versatile-fpga-irq";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		reg = <0x10000040 0x100>;
+		clear-mask = <0xffffffff>;
+		valid-mask = <0x00000007>;
+	};
+
+	sic: sic at ca000000 {
+		compatible = "arm,versatile-fpga-irq";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		reg = <0xca000000 0x100>;
+		clear-mask = <0x00000fff>;
+		valid-mask = <0x00000fff>;
+	};
+};
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index ff966d8..26d4d8c 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -34,6 +34,8 @@
 #include <linux/mtd/physmap.h>
 #include <linux/clk.h>
 #include <linux/platform_data/clk-integrator.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
 #include <video/vga.h>
 
 #include <mach/hardware.h>
@@ -161,23 +163,6 @@ static void __init ap_map_io(void)
 	vga_base = PCI_MEMORY_VADDR;
 }
 
-#define INTEGRATOR_SC_VALID_INT	0x003fffff
-
-static void __init ap_init_irq(void)
-{
-	/* Disable all interrupts initially. */
-	/* Do the core module ones */
-	writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
-
-	/* do the header card stuff next */
-	writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
-	writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
-
-	fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
-		-1, INTEGRATOR_SC_VALID_INT, NULL);
-	integrator_clk_init(false);
-}
-
 #ifdef CONFIG_PM
 static unsigned long ic_irq_enable;
 
@@ -330,9 +315,9 @@ static u32 notrace integrator_read_sched_clock(void)
 	return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
 }
 
-static void integrator_clocksource_init(unsigned long inrate)
+static void integrator_clocksource_init(unsigned long inrate,
+					void __iomem *base)
 {
-	void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
 	u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
 	unsigned long rate = inrate;
 
@@ -349,7 +334,7 @@ static void integrator_clocksource_init(unsigned long inrate)
 	setup_sched_clock(integrator_read_sched_clock, 16, rate);
 }
 
-static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
+static void __iomem * clkevt_base;
 
 /*
  * IRQ handler for the timer
@@ -421,11 +406,13 @@ static struct irqaction integrator_timer_irq = {
 	.dev_id		= &integrator_clockevent,
 };
 
-static void integrator_clockevent_init(unsigned long inrate)
+static void integrator_clockevent_init(unsigned long inrate,
+				void __iomem *base, int irq)
 {
 	unsigned long rate = inrate;
 	unsigned int ctrl = 0;
 
+	clkevt_base = base;
 	/* Calculate and program a divisor */
 	if (rate > 0x100000 * HZ) {
 		rate /= 256;
@@ -437,7 +424,7 @@ static void integrator_clockevent_init(unsigned long inrate)
 	timer_reload = rate / HZ;
 	writel(ctrl, clkevt_base + TIMER_CTRL);
 
-	setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
+	setup_irq(irq, &integrator_timer_irq);
 	clockevents_config_and_register(&integrator_clockevent,
 					rate,
 					1,
@@ -448,9 +435,89 @@ void __init ap_init_early(void)
 {
 }
 
+#ifdef CONFIG_OF
+
+static void __init ap_init_timer_of(void)
+{
+	struct device_node *node;
+	const char *path;
+	void __iomem *base;
+	int err;
+	int irq;
+	struct clk *clk;
+	unsigned long rate;
+
+	clk = clk_get_sys("ap_timer", NULL);
+	BUG_ON(IS_ERR(clk));
+	clk_prepare_enable(clk);
+	rate = clk_get_rate(clk);
+
+	err = of_property_read_string(of_aliases,
+				"arm,integrator-clocksource", &path);
+	if (WARN_ON(err))
+		return;
+	node = of_find_node_by_path(path);
+	base = of_iomap(node, 0);
+	if (WARN_ON(!base))
+		return;
+	writel(0, base + TIMER_CTRL);
+	integrator_clocksource_init(rate, base);
+
+	err = of_property_read_string(of_aliases,
+				"arm,integrator-clockevent", &path);
+	if (WARN_ON(err))
+		return;
+	node = of_find_node_by_path(path);
+	base = of_iomap(node, 0);
+	if (WARN_ON(!base))
+		return;
+	irq = irq_of_parse_and_map(node, 0);
+	writel(0, base + TIMER_CTRL);
+	integrator_clockevent_init(rate, base, irq);
+}
+
+static struct sys_timer ap_of_timer = {
+	.init		= ap_init_timer_of,
+};
+
+static const struct of_device_id fpga_irq_of_match[] __initconst = {
+	{ .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
+	{ /* Sentinel */ }
+};
+
+static void __init ap_init_irq_of(void)
+{
+	/* disable core module IRQs */
+	writel(0xffffffffU, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
+	of_irq_init(fpga_irq_of_match);
+	integrator_clk_init(false);
+}
+
+static const char * ap_dt_board_compat[] = {
+	"arm,integrator-ap",
+	NULL,
+};
+
+DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
+	.reserve	= integrator_reserve,
+	.map_io		= ap_map_io,
+	.nr_irqs	= NR_IRQS_INTEGRATOR_AP,
+	.init_early	= ap_init_early,
+	.init_irq	= ap_init_irq_of,
+	.handle_irq	= fpga_handle_irq,
+	.timer		= &ap_of_timer,
+	.init_machine	= ap_init,
+	.restart	= integrator_restart,
+	.dt_compat      = ap_dt_board_compat,
+MACHINE_END
+
+#else
+
 /*
- * Set up timer(s).
+ * This is where non-devicetree initialization code is collected and stashed
+ * for eventual deletion.
  */
+
 static void __init ap_init_timer(void)
 {
 	struct clk *clk;
@@ -465,14 +532,32 @@ static void __init ap_init_timer(void)
 	writel(0, TIMER1_VA_BASE + TIMER_CTRL);
 	writel(0, TIMER2_VA_BASE + TIMER_CTRL);
 
-	integrator_clocksource_init(rate);
-	integrator_clockevent_init(rate);
+	integrator_clocksource_init(rate, (void __iomem *)TIMER2_VA_BASE);
+	integrator_clockevent_init(rate, (void __iomem *)TIMER1_VA_BASE,
+				IRQ_TIMERINT1);
 }
 
 static struct sys_timer ap_timer = {
 	.init		= ap_init_timer,
 };
 
+#define INTEGRATOR_SC_VALID_INT	0x003fffff
+
+static void __init ap_init_irq(void)
+{
+	/* Disable all interrupts initially. */
+	/* Do the core module ones */
+	writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
+
+	/* do the header card stuff next */
+	writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
+	writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
+
+	fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
+		-1, INTEGRATOR_SC_VALID_INT, NULL);
+	integrator_clk_init(false);
+}
+
 MACHINE_START(INTEGRATOR, "ARM-Integrator")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
@@ -486,3 +571,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
 	.init_machine	= ap_init,
 	.restart	= integrator_restart,
 MACHINE_END
+
+#endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 2b40bc1..e7f2fb6 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -23,6 +23,8 @@
 #include <linux/gfp.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_data/clk-integrator.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -53,10 +55,6 @@
 
 #define INTCP_PA_CLCD_BASE		0xc0000000
 
-#define INTCP_VA_CIC_BASE		__io_address(INTEGRATOR_HDR_BASE + 0x40)
-#define INTCP_VA_PIC_BASE		__io_address(INTEGRATOR_IC_BASE)
-#define INTCP_VA_SIC_BASE		__io_address(INTEGRATOR_CP_SIC_BASE)
-
 #define INTCP_ETH_SIZE			0x10
 
 #define INTCP_VA_CTRL_BASE		IO_ADDRESS(INTEGRATOR_CP_CTL_BASE)
@@ -143,37 +141,6 @@ static void __init intcp_map_io(void)
 	iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
 }
 
-static void __init intcp_init_irq(void)
-{
-	u32 pic_mask, cic_mask, sic_mask;
-
-	/* These masks are for the HW IRQ registers */
-	pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
-	pic_mask |= (~((~0u) << (29 - 22))) << 22;
-	cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
-	sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
-
-	/*
-	 * Disable all interrupt sources
-	 */
-	writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
-	writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
-	writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
-	writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
-	writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
-	writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
-
-	fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
-		      -1, pic_mask, NULL);
-
-	fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
-		      -1, cic_mask, NULL);
-
-	fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
-		      IRQ_CP_CPPLDINT, sic_mask, NULL);
-	integrator_clk_init(true);
-}
-
 /*
  * Flash handling.
  */
@@ -356,17 +323,114 @@ static void __init intcp_init_early(void)
 #endif
 }
 
-static void __init intcp_init(void)
+static void __init intcp_timer_init_of(void)
+{
+	struct device_node *node;
+	const char *path;
+	void __iomem *base;
+	int err;
+	int irq;
+
+	err = of_property_read_string(of_aliases,
+				"arm,integrator-clocksource", &path);
+	if (WARN_ON(err))
+		return;
+	node = of_find_node_by_path(path);
+	base = of_iomap(node, 0);
+	if (WARN_ON(!base))
+		return;
+	writel(0, base + TIMER_CTRL);
+	sp804_clocksource_init(base, node->name);
+
+	err = of_property_read_string(of_aliases,
+				"arm,integrator-clockevent", &path);
+	if (WARN_ON(err))
+		return;
+	node = of_find_node_by_path(path);
+	base = of_iomap(node, 0);
+	if (WARN_ON(!base))
+		return;
+	irq = irq_of_parse_and_map(node, 0);
+	writel(0, base + TIMER_CTRL);
+	sp804_clockevents_init(base, irq, node->name);
+}
+
+static struct sys_timer cp_of_timer = {
+	.init		= intcp_timer_init_of,
+};
+
+#ifdef CONFIG_OF
+
+static const struct of_device_id fpga_irq_of_match[] __initconst = {
+	{ .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
+	{ /* Sentinel */ }
+};
+
+static void __init intcp_init_irq_of(void)
 {
-	int i;
+	of_irq_init(fpga_irq_of_match);
+	integrator_clk_init(true);
+}
 
-	platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
+static const char * intcp_dt_board_compat[] = {
+	"arm,integrator-cp",
+	NULL,
+};
 
-	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
-		struct amba_device *d = amba_devs[i];
-		amba_device_register(d, &iomem_resource);
-	}
-	integrator_init(true);
+DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
+	.reserve	= integrator_reserve,
+	.map_io		= intcp_map_io,
+	.nr_irqs	= NR_IRQS_INTEGRATOR_CP,
+	.init_early	= intcp_init_early,
+	.init_irq	= intcp_init_irq_of,
+	.handle_irq	= fpga_handle_irq,
+	.timer		= &cp_of_timer,
+	.init_machine	= intcp_init,
+	.restart	= integrator_restart,
+	.dt_compat      = intcp_dt_board_compat,
+MACHINE_END
+
+#else
+
+/*
+ * This is where non-devicetree initialization code is collected and stashed
+ * for eventual deletion.
+ */
+
+#define INTCP_VA_CIC_BASE		__io_address(INTEGRATOR_HDR_BASE + 0x40)
+#define INTCP_VA_PIC_BASE		__io_address(INTEGRATOR_IC_BASE)
+#define INTCP_VA_SIC_BASE		__io_address(INTEGRATOR_CP_SIC_BASE)
+
+static void __init intcp_init_irq(void)
+{
+	u32 pic_mask, cic_mask, sic_mask;
+
+	/* These masks are for the HW IRQ registers */
+	pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
+	pic_mask |= (~((~0u) << (29 - 22))) << 22;
+	cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
+	sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
+
+	/*
+	 * Disable all interrupt sources
+	 */
+	writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
+	writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
+	writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
+	writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
+	writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
+	writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
+
+	fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
+		      -1, pic_mask, NULL);
+
+	fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
+		      -1, cic_mask, NULL);
+
+	fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
+		      IRQ_CP_CPPLDINT, sic_mask, NULL);
+
+	integrator_clk_init(true);
 }
 
 #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
@@ -400,3 +464,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
 	.init_machine	= intcp_init,
 	.restart	= integrator_restart,
 MACHINE_END
+
+#endif
-- 
1.7.11.4

[PATCH 5/6 v2] ARM: integrator: convert AMBA devices to device tree

[Linus Walleij]

This converts the AMBA (PrimeCell) devices on the Integrator/AP
and Integrator/CP over to probing from the Device Tree if the
kernel is compiled for Device Tree support.

We continue to #ifdef out all non-DT code and vice versa on
respective boot type to get a clean cut.

We need to add a bunch of auxdata (compare to the Versatile)
to handle bus names and callbacks alike.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Move interrupt-parent up one step to the fpga bus for the
  PrimeCell devices. (Suggestion from Arnd Bergmann)
---
 arch/arm/boot/dts/integratorap.dts       |  43 ++++++++++++
 arch/arm/boot/dts/integratorcp.dts       |  57 ++++++++++++++++
 arch/arm/mach-integrator/common.h        |   2 +
 arch/arm/mach-integrator/core.c          |   8 ++-
 arch/arm/mach-integrator/integrator_ap.c | 109 ++++++++++++++++++++++---------
 arch/arm/mach-integrator/integrator_cp.c |  84 ++++++++++++++++++------
 6 files changed, 250 insertions(+), 53 deletions(-)

diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index 928a7be..de51bcf 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -48,4 +48,47 @@
 		clear-mask = <0xffffffff>;
 		valid-mask = <0x003fffff>;
 	};
+
+	fpga {
+		compatible = "arm,amba-bus", "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		interrupt-parent = <&pic>;
+
+		rtc: rtc at 15000000 {
+			compatible = "arm,pl031", "arm,primecell";
+			reg = <0x15000000 0x1000>;
+			interrupts = <8>;
+			arm,primecell-periphid = <0x00041030>;
+		};
+
+		uart0: uart at 16000000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x16000000 0x1000>;
+			interrupts = <1>;
+			arm,primecell-periphid = <0x00041010>;
+		};
+
+		uart1: uart at 17000000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x17000000 0x1000>;
+			interrupts = <2>;
+			arm,primecell-periphid = <0x00041010>;
+		};
+
+		kmi0: kmi at 18000000 {
+			compatible = "arm,pl050", "arm,primecell";
+			reg = <0x18000000 0x1000>;
+			interrupts = <3>;
+			arm,primecell-periphid = <0x00041050>;
+		};
+
+		kmi1: kmi at 19000000 {
+			compatible = "arm,pl050", "arm,primecell";
+			reg = <0x19000000 0x1000>;
+			interrupts = <4>;
+			arm,primecell-periphid = <0x00041050>;
+		};
+	};
 };
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index 8fad5a1..3265b25 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -66,4 +66,61 @@
 		clear-mask = <0x00000fff>;
 		valid-mask = <0x00000fff>;
 	};
+
+	fpga {
+		compatible = "arm,amba-bus", "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		interrupt-parent = <&pic>;
+
+		rtc: rtc at 15000000 {
+			compatible = "arm,pl031", "arm,primecell";
+			reg = <0x15000000 0x1000>;
+			interrupts = <8>;
+		};
+
+		uart0: uart at 16000000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x16000000 0x1000>;
+			interrupts = <1>;
+		};
+
+		uart1: uart at 17000000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x17000000 0x1000>;
+			interrupts = <2>;
+		};
+
+		kmi0: kmi at 18000000 {
+			compatible = "arm,pl050", "arm,primecell";
+			reg = <0x18000000 0x1000>;
+			interrupts = <3>;
+		};
+
+		kmi1: kmi at 19000000 {
+			compatible = "arm,pl050", "arm,primecell";
+			reg = <0x19000000 0x1000>;
+			interrupts = <4>;
+		};
+
+		mmci: mmc at 1C000000 {
+			compatible = "arm,pl180", "arm,primecell";
+			reg = <0x1C000000 0x1000>;
+			interrupts = <23 24>;
+			max-frequency = <515633>;
+		};
+
+		aaci: aaci at 1D000000 {
+			compatible = "arm,pl041", "arm,primecell";
+			reg = <0x1D000000 0x1000>;
+			interrupts = <25>;
+		};
+
+		clcd: clcd at c0000000 {
+			compatible = "arm,pl110", "arm,primecell";
+			reg = <0xC0000000 0x1000>;
+			interrupts = <22>;
+		};
+	};
 };
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index c4338e2..c3ff21b 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,3 +1,5 @@
+#include <linux/amba/serial.h>
+extern struct amba_pl010_data integrator_uart_data;
 void integrator_init_early(void);
 int integrator_init(bool is_cp);
 void integrator_reserve(void);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 67ea181..42890c8 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -33,7 +33,9 @@
 #include <asm/mach/time.h>
 #include <asm/pgtable.h>
 
-static struct amba_pl010_data integrator_uart_data;
+#include "common.h"
+
+#ifndef CONFIG_OF
 
 #define INTEGRATOR_RTC_IRQ	{ IRQ_RTCINT }
 #define INTEGRATOR_UART0_IRQ	{ IRQ_UARTINT0 }
@@ -86,6 +88,8 @@ int __init integrator_init(bool is_cp)
 	return 0;
 }
 
+#endif
+
 /*
  * On the Integrator platform, the port RTS and DTR are provided by
  * bits in the following SC_CTRLS register bits:
@@ -122,7 +126,7 @@ static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *bas
 	__raw_writel(ctrlc, SC_CTRLC);
 }
 
-static struct amba_pl010_data integrator_uart_data = {
+struct amba_pl010_data integrator_uart_data = {
 	.set_mctrl = integrator_uart_set_mctrl,
 };
 
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 26d4d8c..990ce85 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -36,6 +36,7 @@
 #include <linux/platform_data/clk-integrator.h>
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
+#include <linux/of_platform.h>
 #include <video/vga.h>
 
 #include <mach/hardware.h>
@@ -271,36 +272,6 @@ static struct platform_device cfi_flash_device = {
 	.resource	= &cfi_flash_resource,
 };
 
-static void __init ap_init(void)
-{
-	unsigned long sc_dec;
-	int i;
-
-	platform_device_register(&cfi_flash_device);
-
-	sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
-	for (i = 0; i < 4; i++) {
-		struct lm_device *lmdev;
-
-		if ((sc_dec & (16 << i)) == 0)
-			continue;
-
-		lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
-		if (!lmdev)
-			continue;
-
-		lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
-		lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
-		lmdev->resource.flags = IORESOURCE_MEM;
-		lmdev->irq = IRQ_AP_EXPINT0 + i;
-		lmdev->id = i;
-
-		lm_device_register(lmdev);
-	}
-
-	integrator_init(false);
-}
-
 /*
  * Where is the timer (VA)?
  */
@@ -493,6 +464,52 @@ static void __init ap_init_irq_of(void)
 	integrator_clk_init(false);
 }
 
+/* For the Device Tree, add in the UART callbacks as AUXDATA */
+static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
+	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
+		"rtc", NULL),
+	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
+		"uart0", &integrator_uart_data),
+	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
+		"uart1", &integrator_uart_data),
+	OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
+		"kmi0", NULL),
+	OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
+		"kmi1", NULL),
+	{ /* sentinel */ },
+};
+
+static void __init ap_init_of(void)
+{
+	unsigned long sc_dec;
+	int i;
+
+	of_platform_populate(NULL, of_default_bus_match_table,
+			ap_auxdata_lookup, NULL);
+
+	platform_device_register(&cfi_flash_device);
+
+	sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+	for (i = 0; i < 4; i++) {
+		struct lm_device *lmdev;
+
+		if ((sc_dec & (16 << i)) == 0)
+			continue;
+
+		lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
+		if (!lmdev)
+			continue;
+
+		lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
+		lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
+		lmdev->resource.flags = IORESOURCE_MEM;
+		lmdev->irq = IRQ_AP_EXPINT0 + i;
+		lmdev->id = i;
+
+		lm_device_register(lmdev);
+	}
+}
+
 static const char * ap_dt_board_compat[] = {
 	"arm,integrator-ap",
 	NULL,
@@ -506,7 +523,7 @@ DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
 	.init_irq	= ap_init_irq_of,
 	.handle_irq	= fpga_handle_irq,
 	.timer		= &ap_of_timer,
-	.init_machine	= ap_init,
+	.init_machine	= ap_init_of,
 	.restart	= integrator_restart,
 	.dt_compat      = ap_dt_board_compat,
 MACHINE_END
@@ -558,6 +575,36 @@ static void __init ap_init_irq(void)
 	integrator_clk_init(false);
 }
 
+static void __init ap_init(void)
+{
+	unsigned long sc_dec;
+	int i;
+
+	platform_device_register(&cfi_flash_device);
+
+	sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+	for (i = 0; i < 4; i++) {
+		struct lm_device *lmdev;
+
+		if ((sc_dec & (16 << i)) == 0)
+			continue;
+
+		lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
+		if (!lmdev)
+			continue;
+
+		lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
+		lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
+		lmdev->resource.flags = IORESOURCE_MEM;
+		lmdev->irq = IRQ_AP_EXPINT0 + i;
+		lmdev->id = i;
+
+		lm_device_register(lmdev);
+	}
+
+	integrator_init(false);
+}
+
 MACHINE_START(INTEGRATOR, "ARM-Integrator")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index e7f2fb6..1b07aa6 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -25,6 +25,7 @@
 #include <linux/platform_data/clk-integrator.h>
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
+#include <linux/of_platform.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -245,16 +246,6 @@ static struct mmci_platform_data mmc_data = {
 	.gpio_cd	= -1,
 };
 
-#define INTEGRATOR_CP_MMC_IRQS	{ IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
-#define INTEGRATOR_CP_AACI_IRQS	{ IRQ_CP_AACIINT }
-
-static AMBA_APB_DEVICE(mmc, "mmci", 0, INTEGRATOR_CP_MMC_BASE,
-	INTEGRATOR_CP_MMC_IRQS, &mmc_data);
-
-static AMBA_APB_DEVICE(aaci, "aaci", 0, INTEGRATOR_CP_AACI_BASE,
-	INTEGRATOR_CP_AACI_IRQS, NULL);
-
-
 /*
  * CLCD support
  */
@@ -305,15 +296,6 @@ static struct clcd_board clcd_data = {
 	.remove		= versatile_clcd_remove_dma,
 };
 
-static AMBA_AHB_DEVICE(clcd, "clcd", 0, INTCP_PA_CLCD_BASE,
-	{ IRQ_CP_CLCDCINT }, &clcd_data);
-
-static struct amba_device *amba_devs[] __initdata = {
-	&mmc_device,
-	&aaci_device,
-	&clcd_device,
-};
-
 #define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
 
 static void __init intcp_init_early(void)
@@ -372,6 +354,37 @@ static void __init intcp_init_irq_of(void)
 	integrator_clk_init(true);
 }
 
+/*
+ * For the Device Tree, add in the UART, MMC and CLCD specifics as AUXDATA
+ * and enforce the bus names since these are used for clock lookups.
+ */
+static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
+	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
+		"rtc", NULL),
+	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
+		"uart0", &integrator_uart_data),
+	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
+		"uart1", &integrator_uart_data),
+	OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
+		"kmi0", NULL),
+	OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
+		"kmi1", NULL),
+	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE,
+		"mmci", &mmc_data),
+	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE,
+		"aaci", &mmc_data),
+	OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,
+		"clcd", &clcd_data),
+	{ /* sentinel */ },
+};
+
+static void __init intcp_init_of(void)
+{
+	of_platform_populate(NULL, of_default_bus_match_table,
+			intcp_auxdata_lookup, NULL);
+	platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
+}
+
 static const char * intcp_dt_board_compat[] = {
 	"arm,integrator-cp",
 	NULL,
@@ -385,7 +398,7 @@ DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
 	.init_irq	= intcp_init_irq_of,
 	.handle_irq	= fpga_handle_irq,
 	.timer		= &cp_of_timer,
-	.init_machine	= intcp_init,
+	.init_machine	= intcp_init_of,
 	.restart	= integrator_restart,
 	.dt_compat      = intcp_dt_board_compat,
 MACHINE_END
@@ -451,6 +464,37 @@ static struct sys_timer cp_timer = {
 	.init		= intcp_timer_init,
 };
 
+#define INTEGRATOR_CP_MMC_IRQS	{ IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
+#define INTEGRATOR_CP_AACI_IRQS	{ IRQ_CP_AACIINT }
+
+static AMBA_APB_DEVICE(mmc, "mmci", 0, INTEGRATOR_CP_MMC_BASE,
+	INTEGRATOR_CP_MMC_IRQS, &mmc_data);
+
+static AMBA_APB_DEVICE(aaci, "aaci", 0, INTEGRATOR_CP_AACI_BASE,
+	INTEGRATOR_CP_AACI_IRQS, NULL);
+
+static AMBA_AHB_DEVICE(clcd, "clcd", 0, INTCP_PA_CLCD_BASE,
+	{ IRQ_CP_CLCDCINT }, &clcd_data);
+
+static struct amba_device *amba_devs[] __initdata = {
+	&mmc_device,
+	&aaci_device,
+	&clcd_device,
+};
+
+static void __init intcp_init(void)
+{
+	int i;
+
+	platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
+
+	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+		struct amba_device *d = amba_devs[i];
+		amba_device_register(d, &iomem_resource);
+	}
+	integrator_init(true);
+}
+
 MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
-- 
1.7.11.4

[PATCH 6/6 v2] ARM: integrator: convert platform devices to Device Tree

[Linus Walleij]

This moves the physmap flash and SMSC91x ethernet devices
over to the device tree, moving the static board code down
into the #ifndef CONFIG_OF section.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/integratorap.dts       |  5 ++
 arch/arm/boot/dts/integratorcp.dts       | 12 +++++
 arch/arm/mach-integrator/integrator_ap.c | 36 ++++++-------
 arch/arm/mach-integrator/integrator_cp.c | 92 ++++++++++++++++----------------
 4 files changed, 82 insertions(+), 63 deletions(-)

diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index de51bcf..044c72b 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -49,6 +49,11 @@
 		valid-mask = <0x003fffff>;
 	};
 
+	flash: flash at 24000000 {
+		compatible = "cfi-flash";
+		reg = <0x24000000 0x02000000>;
+	};
+
 	fpga {
 		compatible = "arm,amba-bus", "simple-bus";
 		#address-cells = <1>;
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index 3265b25..8584241 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -67,6 +67,18 @@
 		valid-mask = <0x00000fff>;
 	};
 
+	flash: flash at 24000000 {
+		compatible = "cfi-flash";
+		reg = <0x24000000 0x02000000>;
+	};
+
+	ethernet: ethernet at c8000000 {
+		compatible = "smsc,lan91c111";
+		reg = <0xc8000000 0x10>;
+		interrupt-parent = <&pic>;
+		interrupts = <27>;
+	};
+
 	fpga {
 		compatible = "arm,amba-bus", "simple-bus";
 		#address-cells = <1>;
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 990ce85..aaa6b01 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -256,22 +256,6 @@ static struct physmap_flash_data ap_flash_data = {
 	.set_vpp	= ap_flash_set_vpp,
 };
 
-static struct resource cfi_flash_resource = {
-	.start		= INTEGRATOR_FLASH_BASE,
-	.end		= INTEGRATOR_FLASH_BASE + INTEGRATOR_FLASH_SIZE - 1,
-	.flags		= IORESOURCE_MEM,
-};
-
-static struct platform_device cfi_flash_device = {
-	.name		= "physmap-flash",
-	.id		= 0,
-	.dev		= {
-		.platform_data	= &ap_flash_data,
-	},
-	.num_resources	= 1,
-	.resource	= &cfi_flash_resource,
-};
-
 /*
  * Where is the timer (VA)?
  */
@@ -476,6 +460,8 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
 		"kmi0", NULL),
 	OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
 		"kmi1", NULL),
+	OF_DEV_AUXDATA("cfi-flash", INTEGRATOR_FLASH_BASE,
+		"physmap-flash", &ap_flash_data),
 	{ /* sentinel */ },
 };
 
@@ -487,8 +473,6 @@ static void __init ap_init_of(void)
 	of_platform_populate(NULL, of_default_bus_match_table,
 			ap_auxdata_lookup, NULL);
 
-	platform_device_register(&cfi_flash_device);
-
 	sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
 	for (i = 0; i < 4; i++) {
 		struct lm_device *lmdev;
@@ -535,6 +519,22 @@ MACHINE_END
  * for eventual deletion.
  */
 
+static struct resource cfi_flash_resource = {
+	.start		= INTEGRATOR_FLASH_BASE,
+	.end		= INTEGRATOR_FLASH_BASE + INTEGRATOR_FLASH_SIZE - 1,
+	.flags		= IORESOURCE_MEM,
+};
+
+static struct platform_device cfi_flash_device = {
+	.name		= "physmap-flash",
+	.id		= 0,
+	.dev		= {
+		.platform_data	= &ap_flash_data,
+	},
+	.num_resources	= 1,
+	.resource	= &cfi_flash_resource,
+};
+
 static void __init ap_init_timer(void)
 {
 	struct clk *clk;
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 1b07aa6..1f4a7be 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -52,12 +52,9 @@
 #include "common.h"
 
 #define INTCP_PA_FLASH_BASE		0x24000000
-#define INTCP_FLASH_SIZE		SZ_32M
 
 #define INTCP_PA_CLCD_BASE		0xc0000000
 
-#define INTCP_ETH_SIZE			0x10
-
 #define INTCP_VA_CTRL_BASE		IO_ADDRESS(INTEGRATOR_CP_CTL_BASE)
 #define INTCP_FLASHPROG			0x04
 #define CINTEGRATOR_FLASHPROG_FLVPPEN	(1 << 0)
@@ -184,47 +181,6 @@ static struct physmap_flash_data intcp_flash_data = {
 	.set_vpp	= intcp_flash_set_vpp,
 };
 
-static struct resource intcp_flash_resource = {
-	.start		= INTCP_PA_FLASH_BASE,
-	.end		= INTCP_PA_FLASH_BASE + INTCP_FLASH_SIZE - 1,
-	.flags		= IORESOURCE_MEM,
-};
-
-static struct platform_device intcp_flash_device = {
-	.name		= "physmap-flash",
-	.id		= 0,
-	.dev		= {
-		.platform_data	= &intcp_flash_data,
-	},
-	.num_resources	= 1,
-	.resource	= &intcp_flash_resource,
-};
-
-static struct resource smc91x_resources[] = {
-	[0] = {
-		.start	= INTEGRATOR_CP_ETH_BASE,
-		.end	= INTEGRATOR_CP_ETH_BASE + INTCP_ETH_SIZE - 1,
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= IRQ_CP_ETHINT,
-		.end	= IRQ_CP_ETHINT,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
-
-static struct platform_device smc91x_device = {
-	.name		= "smc91x",
-	.id		= 0,
-	.num_resources	= ARRAY_SIZE(smc91x_resources),
-	.resource	= smc91x_resources,
-};
-
-static struct platform_device *intcp_devs[] __initdata = {
-	&intcp_flash_device,
-	&smc91x_device,
-};
-
 /*
  * It seems that the card insertion interrupt remains active after
  * we've acknowledged it.  We therefore ignore the interrupt, and
@@ -375,6 +331,8 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
 		"aaci", &mmc_data),
 	OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,
 		"clcd", &clcd_data),
+	OF_DEV_AUXDATA("cfi-flash", INTCP_PA_FLASH_BASE,
+		"physmap-flash", &intcp_flash_data),
 	{ /* sentinel */ },
 };
 
@@ -382,7 +340,6 @@ static void __init intcp_init_of(void)
 {
 	of_platform_populate(NULL, of_default_bus_match_table,
 			intcp_auxdata_lookup, NULL);
-	platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
 }
 
 static const char * intcp_dt_board_compat[] = {
@@ -410,6 +367,51 @@ MACHINE_END
  * for eventual deletion.
  */
 
+#define INTCP_FLASH_SIZE		SZ_32M
+
+static struct resource intcp_flash_resource = {
+	.start		= INTCP_PA_FLASH_BASE,
+	.end		= INTCP_PA_FLASH_BASE + INTCP_FLASH_SIZE - 1,
+	.flags		= IORESOURCE_MEM,
+};
+
+static struct platform_device intcp_flash_device = {
+	.name		= "physmap-flash",
+	.id		= 0,
+	.dev		= {
+		.platform_data	= &intcp_flash_data,
+	},
+	.num_resources	= 1,
+	.resource	= &intcp_flash_resource,
+};
+
+#define INTCP_ETH_SIZE			0x10
+
+static struct resource smc91x_resources[] = {
+	[0] = {
+		.start	= INTEGRATOR_CP_ETH_BASE,
+		.end	= INTEGRATOR_CP_ETH_BASE + INTCP_ETH_SIZE - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_CP_ETHINT,
+		.end	= IRQ_CP_ETHINT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device smc91x_device = {
+	.name		= "smc91x",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(smc91x_resources),
+	.resource	= smc91x_resources,
+};
+
+static struct platform_device *intcp_devs[] __initdata = {
+	&intcp_flash_device,
+	&smc91x_device,
+};
+
 #define INTCP_VA_CIC_BASE		__io_address(INTEGRATOR_HDR_BASE + 0x40)
 #define INTCP_VA_PIC_BASE		__io_address(INTEGRATOR_IC_BASE)
 #define INTCP_VA_SIC_BASE		__io_address(INTEGRATOR_CP_SIC_BASE)
-- 
1.7.11.4

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Arnd Bergmann]

On Saturday 01 September 2012, Linus Walleij wrote:

> diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
> new file mode 100644
> index 0000000..8fad5a1
> --- /dev/null
> +++ b/arch/arm/boot/dts/integratorcp.dts
> @@ -0,0 +1,69 @@
> +/*
> + * Device Tree for the ARM Integrator/CP platform
> + */
> +
> +/dts-v1/;
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	model = "ARM Integrator/CP";
> +	compatible = "arm,integrator-cp";
> +	ranges;
> +
> +	aliases {
> +		arm,integrator-clocksource = &timer2;
> +		arm,integrator-clockevent = &timer1;
> +	};

It looks like this file is almost a direct superset of the integratorap.dts
file. How about including the other file from here and just adding the
extra nodes and overriding the few bits that are actually different?

>  
> +#ifdef CONFIG_OF
> +
...
> +DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
> +	.reserve	= integrator_reserve,
> +	.map_io		= ap_map_io,
> +	.nr_irqs	= NR_IRQS_INTEGRATOR_AP,
> +	.init_early	= ap_init_early,
> +	.init_irq	= ap_init_irq_of,
> +	.handle_irq	= fpga_handle_irq,
> +	.timer		= &ap_of_timer,
> +	.init_machine	= ap_init,
> +	.restart	= integrator_restart,
> +	.dt_compat      = ap_dt_board_compat,
> +MACHINE_END
> +
> +#else
> +
...
>  MACHINE_START(INTEGRATOR, "ARM-Integrator")
>  	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
>  	.atag_offset	= 0x100,
> @@ -486,3 +571,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
>  	.init_machine	= ap_init,
>  	.restart	= integrator_restart,
>  MACHINE_END
> +
> +#endif

I think we discussed this before. It would be nice to replace the #if/#else
with 

#ifdef CONFIG_OF
...
#endif
#ifdef CONFIG_ATAG
...
#endif

so you can actually support both in the same binary. The other alternative
would be to remove the ATAG boot capability right away, as some other
platforms have done when they moved to DT.

	Arnd

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Linus Walleij]

On Sat, Sep 1, 2012 at 8:41 PM, Arnd Bergmann <arnd@arndb.de> wrote:

> On Saturday 01 September 2012, Linus Walleij wrote:
>> diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
>> +/ {
>> +     model = "ARM Integrator/CP";
>> +     compatible = "arm,integrator-cp";
>> +     ranges;
>> +
>> +     aliases {
>> +             arm,integrator-clocksource = &timer2;
>> +             arm,integrator-clockevent = &timer1;
>> +     };
>
> It looks like this file is almost a direct superset of the integratorap.dts
> file. How about including the other file from here and just adding the
> extra nodes and overriding the few bits that are actually different?

Isn't it more apropriate to create an integrator.dtsi for the common
stuff and include that into integratorap.dts and integratorcp.dts?

>> +#ifdef CONFIG_OF
>> +
> ...
>> +DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
>> +     .reserve        = integrator_reserve,
>> +     .map_io         = ap_map_io,
>> +     .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
>> +     .init_early     = ap_init_early,
>> +     .init_irq       = ap_init_irq_of,
>> +     .handle_irq     = fpga_handle_irq,
>> +     .timer          = &ap_of_timer,
>> +     .init_machine   = ap_init,
>> +     .restart        = integrator_restart,
>> +     .dt_compat      = ap_dt_board_compat,
>> +MACHINE_END
>> +
>> +#else
>> +
> ...
>>  MACHINE_START(INTEGRATOR, "ARM-Integrator")
>>       /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
>>       .atag_offset    = 0x100,
>> @@ -486,3 +571,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
>>       .init_machine   = ap_init,
>>       .restart        = integrator_restart,
>>  MACHINE_END
>> +
>> +#endif
>
> I think we discussed this before. It would be nice to replace the #if/#else
> with
>
> #ifdef CONFIG_OF
> ...
> #endif
> #ifdef CONFIG_ATAG
> ...
> #endif

Sure, have you applied Nico's patch adding CONFIG_ATAG to and
ARM SoC branch so I can base my patches on it?

I was under the impression that his patch would go through Russell's
tree and I would thus not be able to rely on it until it has landed there
and you have pulled Russell's stuff into your tree.

Currently I would make it impossible to use ATAGs if I do this since
the symbol does not exist, so I really need to base such an
approach in a tree which has CONFIG_ATAG in the first place.

Yours,
Linus Walleij

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Russell King - ARM Linux]

On Mon, Sep 03, 2012 at 11:43:37PM +0200, Linus Walleij wrote:
> On Sat, Sep 1, 2012 at 8:41 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> > I think we discussed this before. It would be nice to replace the #if/#else
> > with
> >
> > #ifdef CONFIG_OF
> > ...
> > #endif
> > #ifdef CONFIG_ATAG
> > ...
> > #endif
> 
> Sure, have you applied Nico's patch adding CONFIG_ATAG to and
> ARM SoC branch so I can base my patches on it?
> 
> I was under the impression that his patch would go through Russell's
> tree and I would thus not be able to rely on it until it has landed there
> and you have pulled Russell's stuff into your tree.

One of them is already in my tree - I put it in on Saturday though on an
unstable branch.

> Currently I would make it impossible to use ATAGs if I do this since
> the symbol does not exist, so I really need to base such an
> approach in a tree which has CONFIG_ATAG in the first place.

I've just merged that patch though.

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Linus Walleij]

On Mon, Sep 3, 2012 at 11:55 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> [Me]
>> Currently I would make it impossible to use ATAGs if I do this since
>> the symbol does not exist, so I really need to base such an
>> approach in a tree which has CONFIG_ATAG in the first place.
>
> I've just merged that patch though.

OK great, Arnd do you have a Russell baseline in ARM SoC or is it
easier if I try to submit this series directly to Russell?

Yours,
Linus Walleij

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Olof Johansson]

On Tue, Sep 04, 2012 at 09:19:10AM +0200, Linus Walleij wrote:
> On Mon, Sep 3, 2012 at 11:55 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > [Me]
> >> Currently I would make it impossible to use ATAGs if I do this since
> >> the symbol does not exist, so I really need to base such an
> >> approach in a tree which has CONFIG_ATAG in the first place.
> >
> > I've just merged that patch though.
> 
> OK great, Arnd do you have a Russell baseline in ARM SoC or is it
> easier if I try to submit this series directly to Russell?

Since Russell said he hasn't applied it to a stable branch we can't pull
anything in yet. But once he does, especially if he does it on a separate topic
branch, we can easily pull that in as a prerequisite in arm-soc. Russell?

There probably isn't much conflicting development in this release cycle
on integrator though, so having all changes go through Russell could be
OK as well. Only time that becomes awkward is if there's changes in both
trees that end up needing manual merge resolution. I don't think that's
high risk in this case.

So, Linus, it's up to you (and Russell) what you prefer, but I'd be
happy to take it through arm-soc if we get a stable base.


-Olof

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Linus Walleij]

On Wed, Sep 5, 2012 at 7:34 AM, Olof Johansson <olof@lixom.net> wrote:

> So, Linus, it's up to you (and Russell) what you prefer, but I'd be
> happy to take it through arm-soc if we get a stable base.

I'll fix up the usage of CONFIG_ATAGS in this patch and put it into
Russell's tracker to minimize the hazzle.

Yours,
Linus Walleij

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Rob Herring]

On 08/31/2012 10:55 PM, Linus Walleij wrote:
> This is initial device tree support for the ARM Integrator family,
> we create a very basic device tree, #ifdef out the non-DT machines
> when compiling for device tree.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v1->v2:
> - Also switch over clocksource and clockevent to device tree.
>   Else the IRQ mapping goes bananas.
> ---

snip

> +++ b/arch/arm/boot/dts/integratorcp.dts
> @@ -0,0 +1,69 @@
> +/*
> + * Device Tree for the ARM Integrator/CP platform
> + */
> +
> +/dts-v1/;
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	model = "ARM Integrator/CP";
> +	compatible = "arm,integrator-cp";
> +	ranges;
> +
> +	aliases {
> +		arm,integrator-clocksource = &timer2;
> +		arm,integrator-clockevent = &timer1;

This is linux specific and a common issue we need a solution for. Grant
had done something for versatile and we discussed it some, but nothing
ever got close to finalized. IIRC, Grant's solution was just add a
"linux,clockevent" or "linux,clocksource" to the nodes that are to be
used. But he wasn't really happy with it. Perhaps using these names as
aliases would be better.

Rob

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Linus Walleij]

On Mon, Sep 3, 2012 at 12:59 AM, Rob Herring <robherring2@gmail.com> wrote:
> On 08/31/2012 10:55 PM, Linus Walleij wrote:

>> +/ {
>> +     model = "ARM Integrator/CP";
>> +     compatible = "arm,integrator-cp";
>> +     ranges;
>> +
>> +     aliases {
>> +             arm,integrator-clocksource = &timer2;
>> +             arm,integrator-clockevent = &timer1;
>
> This is linux specific and a common issue we need a solution for. Grant
> had done something for versatile and we discussed it some, but nothing
> ever got close to finalized. IIRC, Grant's solution was just add a
> "linux,clockevent" or "linux,clocksource" to the nodes that are to be
> used. But he wasn't really happy with it. Perhaps using these names as
> aliases would be better.

Atleast I'm honest about what this is, IMHO this is better than
any of the solutions we already have in boot/dts.

Look at the versatile express
arch/arm/boot/dts/vexpress-v2m.dtsi:

        aliases {
                arm,v2m_timer = &v2m_timer01;
        };

It's quite hard to tell that this "vtm_timer" is actually the block
serving as clock source and clockevent for the Vexpress,
but if you inspect the code you can see that this is what it is.

I can of course skip the aliases and go for the timer nodes
I want directly, but that isn't any helpful for people reading the
device tree, is it?

Maybe primary-timer, secondary-timer is sufficiently
good and neutral aliases?

Yours,
Linus Walleij

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Rob Herring]

On 09/03/2012 04:51 PM, Linus Walleij wrote:
> On Mon, Sep 3, 2012 at 12:59 AM, Rob Herring <robherring2@gmail.com> wrote:
>> On 08/31/2012 10:55 PM, Linus Walleij wrote:
> 
>>> +/ {
>>> +     model = "ARM Integrator/CP";
>>> +     compatible = "arm,integrator-cp";
>>> +     ranges;
>>> +
>>> +     aliases {
>>> +             arm,integrator-clocksource = &timer2;
>>> +             arm,integrator-clockevent = &timer1;
>>
>> This is linux specific and a common issue we need a solution for. Grant
>> had done something for versatile and we discussed it some, but nothing
>> ever got close to finalized. IIRC, Grant's solution was just add a
>> "linux,clockevent" or "linux,clocksource" to the nodes that are to be
>> used. But he wasn't really happy with it. Perhaps using these names as
>> aliases would be better.
> 
> Atleast I'm honest about what this is, IMHO this is better than
> any of the solutions we already have in boot/dts.
> 
> Look at the versatile express
> arch/arm/boot/dts/vexpress-v2m.dtsi:
> 
>         aliases {
>                 arm,v2m_timer = &v2m_timer01;
>         };
> 
> It's quite hard to tell that this "vtm_timer" is actually the block
> serving as clock source and clockevent for the Vexpress,
> but if you inspect the code you can see that this is what it is.

Yeah, we really need to unify all this.

> I can of course skip the aliases and go for the timer nodes
> I want directly, but that isn't any helpful for people reading the
> device tree, is it?

Well, the dts doesn't really need to describe how Linux is using things.
I'd like to get to common DT code for sp804 so all platforms just have a
call to sp804_dt_init() which does all the initialization.

> 
> Maybe primary-timer, secondary-timer is sufficiently
> good and neutral aliases?

That doesn't distinguish clk-event vs. clk-source. Perhaps we can use
presence of interrupt to distinguish that. It shouldn't really matter
which timer Linux picks as long as the h/w has the necessary features.
We just need to make sure dts describes those features. Some of the
things we have to deal with:

Highbank has interrupt for timer0, but not on timer1, so timer0 must be
clk-event. It also users timer1 for sched clock, but ARM Ltd platforms
use a different timer.

Realview and Versatile use timer0 for clk-event and timer3 for clk-src.
Is there something broken with timer1 and timer2? It is certainly
possible the h/w has the clock tied off for 1 of the 2 timers.

VExpress CA9 has broken timers on the core tile (at least they were
ifdef'ed out before the last clean-up). We could just remove/disable
them in the dts so they are not used.

Rob

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Linus Walleij]

On Thu, Sep 6, 2012 at 3:20 PM, Rob Herring <robherring2@gmail.com> wrote:
> [Me]
>> I can of course skip the aliases and go for the timer nodes
>> I want directly, but that isn't any helpful for people reading the
>> device tree, is it?
>
> Well, the dts doesn't really need to describe how Linux is using things.

The arm,integrator-clocksource and arm,integrator-clockevent
are renamed arm,timer-primary and arm,timer-secondary in the
last patch set.

Are you OK with this for now, going forward? I'd be happy to
take a round refactoring it for the next cycle as outlined
below.

> I'd like to get to common DT code for sp804 so all platforms just have a
> call to sp804_dt_init() which does all the initialization.

The Integrator/AP does not have the SP804 timer, it has a
precursor with similar, yet different register setup. The
driver is in the integrator_ab. core file.

(I could look into merging this SP804 ancestor into the SP804
driver with some flag or so, but that would be a different
TODO item.)

The Integrator/CP has the SP804 however.

>> Maybe primary-timer, secondary-timer is sufficiently
>> good and neutral aliases?
>
> That doesn't distinguish clk-event vs. clk-source. Perhaps we can use
> presence of interrupt to distinguish that.

They all have interrupts in the Integrator case so all timers
are equal. But I vaguely recall someone whisper bad things about
timer0.

> It shouldn't really matter
> which timer Linux picks as long as the h/w has the necessary features.

That is true, what I've been doing so far is just a 1-to-1 mapping
to current usage without much massaging of the abstract resource
concept.

> We just need to make sure dts describes those features. Some of the
> things we have to deal with:
>
> Highbank has interrupt for timer0, but not on timer1, so timer0 must be
> clk-event. It also users timer1 for sched clock, but ARM Ltd platforms
> use a different timer.

So I guess this SP804? They just didn't route the IRQ line
I guess... :-(

> Realview and Versatile use timer0 for clk-event and timer3 for clk-src.
> Is there something broken with timer1 and timer2? It is certainly
> possible the h/w has the clock tied off for 1 of the 2 timers.

Integrator use timer2 for clockevent and timer1 for clocksource,
and legends tell that timer0 should be avoided. But I guess
I could try to find out by experience, I fear that it could work
but be instable so that it appears to work but in reality does not...

> VExpress CA9 has broken timers on the core tile (at least they were
> ifdef'ed out before the last clean-up). We could just remove/disable
> them in the dts so they are not used.

There is something about the DT ambition here (or for that matter
the boardfile ambition). On the RealView PB1176 there is
a broken DMA engine, we just deleted it from the resource
list. Other people might want to have all available resources
listed but marked "broken" in the DT for completeness.

The latter has the upside of providing hints to the next
engineer who would otherwise come around and ask why
the hardware in the refman is not listed in the DT and start
to try to add it and find out it is broken. Knowing it's there
and it's broken is encoding real knowledge at the expense
of a few DT bytes.

(I'm fine with either.)

Yours,
Linus Walleij

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Arnd Bergmann]

On Thursday 06 September 2012, Linus Walleij wrote:
> On Thu, Sep 6, 2012 at 3:20 PM, Rob Herring <robherring2@gmail.com> wrote:
> > [Me]
> >> I can of course skip the aliases and go for the timer nodes
> >> I want directly, but that isn't any helpful for people reading the
> >> device tree, is it?
> >
> > Well, the dts doesn't really need to describe how Linux is using things.
> 
> The arm,integrator-clocksource and arm,integrator-clockevent
> are renamed arm,timer-primary and arm,timer-secondary in the
> last patch set.
> 
> Are you OK with this for now, going forward? I'd be happy to
> take a round refactoring it for the next cycle as outlined
> below.

If the timers are really free for use by anything and you want to
encode how Linux uses them, I would suggest naming the aliases
"linux.clocksource" and "linux,clockevent" to make it clear that
you are not describing the hardware here but rather picking
a configuration.

	Arnd

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Linus Walleij]

On Thu, Sep 6, 2012 at 4:19 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Thursday 06 September 2012, Linus Walleij wrote:
>> On Thu, Sep 6, 2012 at 3:20 PM, Rob Herring <robherring2@gmail.com> wrote:
>> > [Me]
>> >> I can of course skip the aliases and go for the timer nodes
>> >> I want directly, but that isn't any helpful for people reading the
>> >> device tree, is it?
>> >
>> > Well, the dts doesn't really need to describe how Linux is using things.
>>
>> The arm,integrator-clocksource and arm,integrator-clockevent
>> are renamed arm,timer-primary and arm,timer-secondary in the
>> last patch set.
>>
>> Are you OK with this for now, going forward? I'd be happy to
>> take a round refactoring it for the next cycle as outlined
>> below.
>
> If the timers are really free for use by anything and you want to
> encode how Linux uses them, I would suggest naming the aliases
> "linux.clocksource" and "linux,clockevent" to make it clear that
> you are not describing the hardware here but rather picking
> a configuration.

So the renaming of the aliases to arm,timer-primary and
arm-timer-secondary is to be taken as a hint to the OS to use
these two as primary and secondary respectively.

linux.foo seems bad in comparison, but if you insist...

Yours,
Linus Walleij

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Rob Herring]

On 09/06/2012 08:56 AM, Linus Walleij wrote:
> On Thu, Sep 6, 2012 at 3:20 PM, Rob Herring <robherring2@gmail.com> wrote:
>> [Me]
>>> I can of course skip the aliases and go for the timer nodes
>>> I want directly, but that isn't any helpful for people reading the
>>> device tree, is it?
>>
>> Well, the dts doesn't really need to describe how Linux is using things.
> 
> The arm,integrator-clocksource and arm,integrator-clockevent
> are renamed arm,timer-primary and arm,timer-secondary in the
> last patch set.
> 
> Are you OK with this for now, going forward? I'd be happy to
> take a round refactoring it for the next cycle as outlined
> below.
> 
>> I'd like to get to common DT code for sp804 so all platforms just have a
>> call to sp804_dt_init() which does all the initialization.
> 
> The Integrator/AP does not have the SP804 timer, it has a
> precursor with similar, yet different register setup. The
> driver is in the integrator_ab. core file.

Right, that was really just an example. We have the general problem that
platforms have N timers and how do we assign them to clk source and clk
event. I'm fine with aliases if we decide that other options have issues
or are not worth the complexity. A "linux,X" property really needs to be
a last resort.

> (I could look into merging this SP804 ancestor into the SP804
> driver with some flag or so, but that would be a different
> TODO item.)
> 
> The Integrator/CP has the SP804 however.
> 
>>> Maybe primary-timer, secondary-timer is sufficiently
>>> good and neutral aliases?
>>
>> That doesn't distinguish clk-event vs. clk-source. Perhaps we can use
>> presence of interrupt to distinguish that.
> 
> They all have interrupts in the Integrator case so all timers
> are equal. But I vaguely recall someone whisper bad things about
> timer0.

Then that is a "feature" of the h/w. So perhaps a "arm,timer-horked"
should be added as a property. Certainly wouldn't be the first timer
with that feature. :)

>> It shouldn't really matter
>> which timer Linux picks as long as the h/w has the necessary features.
> 
> That is true, what I've been doing so far is just a 1-to-1 mapping
> to current usage without much massaging of the abstract resource
> concept.
> 
>> We just need to make sure dts describes those features. Some of the
>> things we have to deal with:
>>
>> Highbank has interrupt for timer0, but not on timer1, so timer0 must be
>> clk-event. It also users timer1 for sched clock, but ARM Ltd platforms
>> use a different timer.
> 
> So I guess this SP804? They just didn't route the IRQ line
> I guess... :-(
> 
>> Realview and Versatile use timer0 for clk-event and timer3 for clk-src.
>> Is there something broken with timer1 and timer2? It is certainly
>> possible the h/w has the clock tied off for 1 of the 2 timers.
> 
> Integrator use timer2 for clockevent and timer1 for clocksource,
> and legends tell that timer0 should be avoided. But I guess
> I could try to find out by experience, I fear that it could work
> but be instable so that it appears to work but in reality does not...
> 
>> VExpress CA9 has broken timers on the core tile (at least they were
>> ifdef'ed out before the last clean-up). We could just remove/disable
>> them in the dts so they are not used.
> 
> There is something about the DT ambition here (or for that matter
> the boardfile ambition). On the RealView PB1176 there is
> a broken DMA engine, we just deleted it from the resource
> list. Other people might want to have all available resources
> listed but marked "broken" in the DT for completeness.
> 
> The latter has the upside of providing hints to the next
> engineer who would otherwise come around and ask why
> the hardware in the refman is not listed in the DT and start
> to try to add it and find out it is broken. Knowing it's there
> and it's broken is encoding real knowledge at the expense
> of a few DT bytes.
> 

Yes, saving that information somewhere is useful.

Rob

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Russell King - ARM Linux]

On Thu, Sep 06, 2012 at 08:20:30AM -0500, Rob Herring wrote:
> Well, the dts doesn't really need to describe how Linux is using things.
> I'd like to get to common DT code for sp804 so all platforms just have a
> call to sp804_dt_init() which does all the initialization.

They don't all have SP804 timers.  The Integrator/AP does not have SP804,
and it would be wrong to try and merge them into the clean SP804 driver.

Integrator/AP timers are strictly 16-bit only affairs, which need special
clocking handling to ensure that their rollover rate is sufficiently long.
SP804 timers are 32-bit or 16-bit timers, we drive the only in 32-bit mode,
and so they don't suffer from the above issue.  Polluting this code with
the legacy 16-bit stuff just for one platform is not a good idea.  They
weren't even called SP804 in the Integrator/AP days - they were just a
random timer design embedded into a FPGA.

> Realview and Versatile use timer0 for clk-event and timer3 for clk-src.
> Is there something broken with timer1 and timer2? It is certainly
> possible the h/w has the clock tied off for 1 of the 2 timers.

I don't believe so, that's the way the timers were used when I received
the initial code drop from ARM Ltd, before it got cleaned up.  The
selection of what timers are used appears to me to be completely random.

> VExpress CA9 has broken timers on the core tile (at least they were
> ifdef'ed out before the last clean-up). We could just remove/disable
> them in the dts so they are not used.

The motherboard timers can be switched between 32kHz and 1MHz mode.  The
core tile timers can probably be switched between 32kHz and 1MHz mode but
god knows how - they default to 32kHz.  So given that choice, I opted for
the higher resolution motherboard timers and left the hooks for the core
tile timers in place, in the hope that someone would tell me or implement
the switching to 1MHz mode.

Obviously, no one did, and the code got removed.  I doubt it makes any
difference what so ever.

And that's a very good point - in the current way things are handled on
these platforms, the tweaking of the SP804 input clocks has been divorced
from the SP804 initialization.  This is bad, because it means that
dependency has been hidden by the DT conversion...

So, selection of the right SP804s to use is also a function of "do we know
how to control its clock rate".  If we don't, we can't be certain of the
rate at which the timer ticks.

[PATCH 2/6 v2] ARM: integrator: check PL010 device name rather than base address

[Arnd Bergmann]

On Saturday 01 September 2012, Linus Walleij wrote:
> In the PL010 UART callback a comparison against the base address is
> done to figure out which UART is doing the callback. This does not
> play well with device tree, so let's check the dev_name() of the
> device instead.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Hmm, I think the dev_name would also not be that nice, because it changes
after the conversion to DT is complete.

>  arch/arm/mach-integrator/core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
> index 5ba4bc8..67ea181 100644
> --- a/arch/arm/mach-integrator/core.c
> +++ b/arch/arm/mach-integrator/core.c
> @@ -100,7 +100,7 @@ static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *bas
>  {
>         unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
>  
> -       if (dev == &uart0_device) {
> +       if (!strcmp(dev_name(&dev->dev), "uart0")) {
>                 rts_mask = 1 << 4;
>                 dtr_mask = 1 << 5;
>         } else {

Maybe it's possible to compare the base pointer against INTEGRATOR_UART0_BASE instead?

	Arnd

[PATCH 2/6 v2] ARM: integrator: check PL010 device name rather than base address

[Linus Walleij]

On Sat, Sep 1, 2012 at 8:32 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Saturday 01 September 2012, Linus Walleij wrote:
>> In the PL010 UART callback a comparison against the base address is
>> done to figure out which UART is doing the callback. This does not
>> play well with device tree, so let's check the dev_name() of the
>> device instead.
>>
>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>
> Hmm, I think the dev_name would also not be that nice, because it changes
> after the conversion to DT is complete.

Hmmmm yeah. I do tie down the name to "uart0" using auxdata.

(...)
>> +++ b/arch/arm/mach-integrator/core.c
>> @@ -100,7 +100,7 @@ static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *bas
>>  {
>>         unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
>>
>> -       if (dev == &uart0_device) {
>> +       if (!strcmp(dev_name(&dev->dev), "uart0")) {
>>                 rts_mask = 1 << 4;
>>                 dtr_mask = 1 << 5;
>>         } else {
>
> Maybe it's possible to compare the base pointer against INTEGRATOR_UART0_BASE instead?

Nope, that is an ioremapped() base, I have no clue what it may be.

Yours,
Linus Walleij

[PATCH 2/6 v2] ARM: integrator: check PL010 device name rather than base address

[Linus Walleij]

On Mon, Sep 3, 2012 at 9:40 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Sat, Sep 1, 2012 at 8:32 PM, Arnd Bergmann <arnd@arndb.de> wrote:

>> On Saturday 01 September 2012, Linus Walleij wrote:
>>> -       if (dev == &uart0_device) {
>>> +       if (!strcmp(dev_name(&dev->dev), "uart0")) {
>>>                 rts_mask = 1 << 4;
>>>                 dtr_mask = 1 << 5;
>>>         } else {
>>
>> Maybe it's possible to compare the base pointer against INTEGRATOR_UART0_BASE instead?
>
> Nope, that is an ioremapped() base, I have no clue what it may be.

But hey I have the struct amba_device there, so the mem resource is there
indeed :-) I'll fix!

Yours,
Linus Walleij

[PATCH 4/6 v2] ARM: integrator: initial device tree support

[Linus Walleij]

This is initial device tree support for the ARM Integrator family,
we create a very basic device tree, #ifdef out the non-DT machines
when compiling for device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v2->v3:
- Rename the not-so-neutral aliases "arm,integrator-clocksource"
  and "arm,integrator-clockevent" to "arm,timer-primary" and
  "arm,timer-secondary" respectively.
- Split out common SoC stuff to "integrator.dtsi" and override
  deviations in the dts files.
- Move the ATAGS-dependent parts under the new #ifdef CONFIG_ATAGS
  Kconfig flag for eventual deletion.
ChangeLog v1->v2:
- Also switch over clocksource and clockevent to device tree.
  Else the IRQ mapping goes bananas.
---
 Documentation/devicetree/bindings/arm/arm-boards |  12 ++
 arch/arm/boot/dts/integrator.dtsi                |  33 +++++
 arch/arm/boot/dts/integratorap.dts               |  36 ++++++
 arch/arm/boot/dts/integratorcp.dts               |  54 ++++++++
 arch/arm/mach-integrator/integrator_ap.c         | 139 ++++++++++++++++----
 arch/arm/mach-integrator/integrator_cp.c         | 154 ++++++++++++++++-------
 6 files changed, 360 insertions(+), 68 deletions(-)
 create mode 100644 arch/arm/boot/dts/integrator.dtsi
 create mode 100644 arch/arm/boot/dts/integratorap.dts
 create mode 100644 arch/arm/boot/dts/integratorcp.dts

diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards
index 91f2614..fc81a7d 100644
--- a/Documentation/devicetree/bindings/arm/arm-boards
+++ b/Documentation/devicetree/bindings/arm/arm-boards
@@ -1,3 +1,15 @@
+ARM Integrator/AP (Application Platform) and Integrator/CP (Compact Platform)
+-----------------------------------------------------------------------------
+ARM's oldest Linux-supported platform with connectors for different core
+tiles of ARMv4, ARMv5 and ARMv6 type.
+
+Required properties (in root node):
+	compatible = "arm,integrator-ap";  /* Application Platform */
+	compatible = "arm,integrator-cp";  /* Compact Platform */
+
+FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
+
+
 ARM Versatile Application and Platform Baseboards
 -------------------------------------------------
 ARM's development hardware platform with connectors for customizable
diff --git a/arch/arm/boot/dts/integrator.dtsi b/arch/arm/boot/dts/integrator.dtsi
new file mode 100644
index 0000000..b464aba
--- /dev/null
+++ b/arch/arm/boot/dts/integrator.dtsi
@@ -0,0 +1,33 @@
+/*
+ * SoC core Device Tree for the ARM Integrator platforms
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	timer at 13000000 {
+		reg = <0x13000000 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <5>;
+	};
+
+	timer at 13000100 {
+		reg = <0x13000100 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <6>;
+	};
+
+	timer at 13000200 {
+		reg = <0x13000200 0x100>;
+		interrupt-parent = <&pic>;
+		interrupts = <7>;
+	};
+
+	pic at 14000000 {
+		compatible = "arm,versatile-fpga-irq";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		reg = <0x14000000 0x100>;
+		clear-mask = <0xffffffff>;
+	};
+};
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
new file mode 100644
index 0000000..083ff39
--- /dev/null
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -0,0 +1,36 @@
+/*
+ * Device Tree for the ARM Integrator/AP platform
+ */
+
+/dts-v1/;
+/include/ "integrator.dtsi"
+
+/ {
+	model = "ARM Integrator/AP";
+	compatible = "arm,integrator-ap";
+
+	aliases {
+		arm,timer-primary = &timer2;
+		arm,timer-secondary = &timer1;
+	};
+
+	chosen {
+		bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
+	};
+
+	timer0: timer at 13000000 {
+		compatible = "arm,integrator-timer";
+	};
+
+	timer1: timer at 13000100 {
+		compatible = "arm,integrator-timer";
+	};
+
+	timer2: timer at 13000200 {
+		compatible = "arm,integrator-timer";
+	};
+
+	pic: pic at 14000000 {
+		valid-mask = <0x003fffff>;
+	};
+};
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
new file mode 100644
index 0000000..6303314
--- /dev/null
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -0,0 +1,54 @@
+/*
+ * Device Tree for the ARM Integrator/CP platform
+ */
+
+/dts-v1/;
+/include/ "integrator.dtsi"
+
+/ {
+	model = "ARM Integrator/CP";
+	compatible = "arm,integrator-cp";
+
+	aliases {
+		arm,timer-primary = &timer2;
+		arm,timer-secondary = &timer1;
+	};
+
+	chosen {
+		bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
+	};
+
+	timer0: timer at 13000000 {
+		compatible = "arm,sp804", "arm,primecell";
+	};
+
+	timer1: timer at 13000100 {
+		compatible = "arm,sp804", "arm,primecell";
+	};
+
+	timer2: timer at 13000200 {
+		compatible = "arm,sp804", "arm,primecell";
+	};
+
+	pic: pic at 14000000 {
+		valid-mask = <0x1fc003ff>;
+	};
+
+	cic: cic at 10000040 {
+		compatible = "arm,versatile-fpga-irq";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		reg = <0x10000040 0x100>;
+		clear-mask = <0xffffffff>;
+		valid-mask = <0x00000007>;
+	};
+
+	sic: sic at ca000000 {
+		compatible = "arm,versatile-fpga-irq";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		reg = <0xca000000 0x100>;
+		clear-mask = <0x00000fff>;
+		valid-mask = <0x00000fff>;
+	};
+};
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index ff966d8..57add86 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -34,6 +34,8 @@
 #include <linux/mtd/physmap.h>
 #include <linux/clk.h>
 #include <linux/platform_data/clk-integrator.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
 #include <video/vga.h>
 
 #include <mach/hardware.h>
@@ -161,23 +163,6 @@ static void __init ap_map_io(void)
 	vga_base = PCI_MEMORY_VADDR;
 }
 
-#define INTEGRATOR_SC_VALID_INT	0x003fffff
-
-static void __init ap_init_irq(void)
-{
-	/* Disable all interrupts initially. */
-	/* Do the core module ones */
-	writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
-
-	/* do the header card stuff next */
-	writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
-	writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
-
-	fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
-		-1, INTEGRATOR_SC_VALID_INT, NULL);
-	integrator_clk_init(false);
-}
-
 #ifdef CONFIG_PM
 static unsigned long ic_irq_enable;
 
@@ -330,9 +315,9 @@ static u32 notrace integrator_read_sched_clock(void)
 	return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
 }
 
-static void integrator_clocksource_init(unsigned long inrate)
+static void integrator_clocksource_init(unsigned long inrate,
+					void __iomem *base)
 {
-	void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
 	u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
 	unsigned long rate = inrate;
 
@@ -349,7 +334,7 @@ static void integrator_clocksource_init(unsigned long inrate)
 	setup_sched_clock(integrator_read_sched_clock, 16, rate);
 }
 
-static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
+static void __iomem * clkevt_base;
 
 /*
  * IRQ handler for the timer
@@ -421,11 +406,13 @@ static struct irqaction integrator_timer_irq = {
 	.dev_id		= &integrator_clockevent,
 };
 
-static void integrator_clockevent_init(unsigned long inrate)
+static void integrator_clockevent_init(unsigned long inrate,
+				void __iomem *base, int irq)
 {
 	unsigned long rate = inrate;
 	unsigned int ctrl = 0;
 
+	clkevt_base = base;
 	/* Calculate and program a divisor */
 	if (rate > 0x100000 * HZ) {
 		rate /= 256;
@@ -437,7 +424,7 @@ static void integrator_clockevent_init(unsigned long inrate)
 	timer_reload = rate / HZ;
 	writel(ctrl, clkevt_base + TIMER_CTRL);
 
-	setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
+	setup_irq(irq, &integrator_timer_irq);
 	clockevents_config_and_register(&integrator_clockevent,
 					rate,
 					1,
@@ -448,9 +435,91 @@ void __init ap_init_early(void)
 {
 }
 
+#ifdef CONFIG_OF
+
+static void __init ap_init_timer_of(void)
+{
+	struct device_node *node;
+	const char *path;
+	void __iomem *base;
+	int err;
+	int irq;
+	struct clk *clk;
+	unsigned long rate;
+
+	clk = clk_get_sys("ap_timer", NULL);
+	BUG_ON(IS_ERR(clk));
+	clk_prepare_enable(clk);
+	rate = clk_get_rate(clk);
+
+	err = of_property_read_string(of_aliases,
+				"arm,timer-primary", &path);
+	if (WARN_ON(err))
+		return;
+	node = of_find_node_by_path(path);
+	base = of_iomap(node, 0);
+	if (WARN_ON(!base))
+		return;
+	writel(0, base + TIMER_CTRL);
+	integrator_clocksource_init(rate, base);
+
+	err = of_property_read_string(of_aliases,
+				"arm,timer-secondary", &path);
+	if (WARN_ON(err))
+		return;
+	node = of_find_node_by_path(path);
+	base = of_iomap(node, 0);
+	if (WARN_ON(!base))
+		return;
+	irq = irq_of_parse_and_map(node, 0);
+	writel(0, base + TIMER_CTRL);
+	integrator_clockevent_init(rate, base, irq);
+}
+
+static struct sys_timer ap_of_timer = {
+	.init		= ap_init_timer_of,
+};
+
+static const struct of_device_id fpga_irq_of_match[] __initconst = {
+	{ .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
+	{ /* Sentinel */ }
+};
+
+static void __init ap_init_irq_of(void)
+{
+	/* disable core module IRQs */
+	writel(0xffffffffU, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
+	of_irq_init(fpga_irq_of_match);
+	integrator_clk_init(false);
+}
+
+static const char * ap_dt_board_compat[] = {
+	"arm,integrator-ap",
+	NULL,
+};
+
+DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
+	.reserve	= integrator_reserve,
+	.map_io		= ap_map_io,
+	.nr_irqs	= NR_IRQS_INTEGRATOR_AP,
+	.init_early	= ap_init_early,
+	.init_irq	= ap_init_irq_of,
+	.handle_irq	= fpga_handle_irq,
+	.timer		= &ap_of_timer,
+	.init_machine	= ap_init,
+	.restart	= integrator_restart,
+	.dt_compat      = ap_dt_board_compat,
+MACHINE_END
+
+#endif
+
+#ifdef CONFIG_ATAGS
+
 /*
- * Set up timer(s).
+ * This is where non-devicetree initialization code is collected and stashed
+ * for eventual deletion.
  */
+
 static void __init ap_init_timer(void)
 {
 	struct clk *clk;
@@ -465,14 +534,32 @@ static void __init ap_init_timer(void)
 	writel(0, TIMER1_VA_BASE + TIMER_CTRL);
 	writel(0, TIMER2_VA_BASE + TIMER_CTRL);
 
-	integrator_clocksource_init(rate);
-	integrator_clockevent_init(rate);
+	integrator_clocksource_init(rate, (void __iomem *)TIMER2_VA_BASE);
+	integrator_clockevent_init(rate, (void __iomem *)TIMER1_VA_BASE,
+				IRQ_TIMERINT1);
 }
 
 static struct sys_timer ap_timer = {
 	.init		= ap_init_timer,
 };
 
+#define INTEGRATOR_SC_VALID_INT	0x003fffff
+
+static void __init ap_init_irq(void)
+{
+	/* Disable all interrupts initially. */
+	/* Do the core module ones */
+	writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
+
+	/* do the header card stuff next */
+	writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
+	writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
+
+	fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
+		-1, INTEGRATOR_SC_VALID_INT, NULL);
+	integrator_clk_init(false);
+}
+
 MACHINE_START(INTEGRATOR, "ARM-Integrator")
 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 	.atag_offset	= 0x100,
@@ -486,3 +573,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
 	.init_machine	= ap_init,
 	.restart	= integrator_restart,
 MACHINE_END
+
+#endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 2b40bc1..6a2293a 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -23,6 +23,8 @@
 #include <linux/gfp.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_data/clk-integrator.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -53,10 +55,6 @@
 
 #define INTCP_PA_CLCD_BASE		0xc0000000
 
-#define INTCP_VA_CIC_BASE		__io_address(INTEGRATOR_HDR_BASE + 0x40)
-#define INTCP_VA_PIC_BASE		__io_address(INTEGRATOR_IC_BASE)
-#define INTCP_VA_SIC_BASE		__io_address(INTEGRATOR_CP_SIC_BASE)
-
 #define INTCP_ETH_SIZE			0x10
 
 #define INTCP_VA_CTRL_BASE		IO_ADDRESS(INTEGRATOR_CP_CTL_BASE)
@@ -143,37 +141,6 @@ static void __init intcp_map_io(void)
 	iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
 }
 
-static void __init intcp_init_irq(void)
-{
-	u32 pic_mask, cic_mask, sic_mask;
-
-	/* These masks are for the HW IRQ registers */
-	pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
-	pic_mask |= (~((~0u) << (29 - 22))) << 22;
-	cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
-	sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
-
-	/*
-	 * Disable all interrupt sources
-	 */
-	writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
-	writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
-	writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
-	writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
-	writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
-	writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
-
-	fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
-		      -1, pic_mask, NULL);
-
-	fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
-		      -1, cic_mask, NULL);
-
-	fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
-		      IRQ_CP_CPPLDINT, sic_mask, NULL);
-	integrator_clk_init(true);
-}
-
 /*
  * Flash handling.
  */
@@ -356,17 +323,116 @@ static void __init intcp_init_early(void)
 #endif
 }
 
-static void __init intcp_init(void)
+static void __init intcp_timer_init_of(void)
+{
+	struct device_node *node;
+	const char *path;
+	void __iomem *base;
+	int err;
+	int irq;
+
+	err = of_property_read_string(of_aliases,
+				"arm,timer-primary", &path);
+	if (WARN_ON(err))
+		return;
+	node = of_find_node_by_path(path);
+	base = of_iomap(node, 0);
+	if (WARN_ON(!base))
+		return;
+	writel(0, base + TIMER_CTRL);
+	sp804_clocksource_init(base, node->name);
+
+	err = of_property_read_string(of_aliases,
+				"arm,timer-secondary", &path);
+	if (WARN_ON(err))
+		return;
+	node = of_find_node_by_path(path);
+	base = of_iomap(node, 0);
+	if (WARN_ON(!base))
+		return;
+	irq = irq_of_parse_and_map(node, 0);
+	writel(0, base + TIMER_CTRL);
+	sp804_clockevents_init(base, irq, node->name);
+}
+
+static struct sys_timer cp_of_timer = {
+	.init		= intcp_timer_init_of,
+};
+
+#ifdef CONFIG_OF
+
+static const struct of_device_id fpga_irq_of_match[] __initconst = {
+	{ .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
+	{ /* Sentinel */ }
+};
+
+static void __init intcp_init_irq_of(void)
 {
-	int i;
+	of_irq_init(fpga_irq_of_match);
+	integrator_clk_init(true);
+}
 
-	platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
+static const char * intcp_dt_board_compat[] = {
+	"arm,integrator-cp",
+	NULL,
+};
 
-	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
-		struct amba_device *d = amba_devs[i];
-		amba_device_register(d, &iomem_resource);
-	}
-	integrator_init(true);
+DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
+	.reserve	= integrator_reserve,
+	.map_io		= intcp_map_io,
+	.nr_irqs	= NR_IRQS_INTEGRATOR_CP,
+	.init_early	= intcp_init_early,
+	.init_irq	= intcp_init_irq_of,
+	.handle_irq	= fpga_handle_irq,
+	.timer		= &cp_of_timer,
+	.init_machine	= intcp_init,
+	.restart	= integrator_restart,
+	.dt_compat      = intcp_dt_board_compat,
+MACHINE_END
+
+#endif
+
+#ifdef CONFIG_ATAGS
+
+/*
+ * This is where non-devicetree initialization code is collected and stashed
+ * for eventual deletion.
+ */
+
+#define INTCP_VA_CIC_BASE		__io_address(INTEGRATOR_HDR_BASE + 0x40)
+#define INTCP_VA_PIC_BASE		__io_address(INTEGRATOR_IC_BASE)
+#define INTCP_VA_SIC_BASE		__io_address(INTEGRATOR_CP_SIC_BASE)
+
+static void __init intcp_init_irq(void)
+{
+	u32 pic_mask, cic_mask, sic_mask;
+
+	/* These masks are for the HW IRQ registers */
+	pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
+	pic_mask |= (~((~0u) << (29 - 22))) << 22;
+	cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
+	sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
+
+	/*
+	 * Disable all interrupt sources
+	 */
+	writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
+	writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
+	writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
+	writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
+	writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
+	writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
+
+	fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
+		      -1, pic_mask, NULL);
+
+	fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
+		      -1, cic_mask, NULL);
+
+	fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
+		      IRQ_CP_CPPLDINT, sic_mask, NULL);
+
+	integrator_clk_init(true);
 }
 
 #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
@@ -400,3 +466,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
 	.init_machine	= intcp_init,
 	.restart	= integrator_restart,
 MACHINE_END
+
+#endif
-- 
1.7.11.4