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Januar 2026, 15:47:08 CET schrieb Mark Brown: > On Wed, Jan 28, 2026 at 03:09:46PM +0100, Nicolas Frattaroli wrote: > > On Wednesday, 28 January 2026 00:14:29 Central European Standard Time M= ark Brown wrote: >=20 > > > Do you have a debugging patch we could run which would say which cloc= ks > > > are impacted? I guess it's more of an issue for the platforms that g= ive > > > no output but for at least Avenger96 I was getting earlycon output. >=20 > > Try this one >=20 > For the Avenger96 that says: >=20 > [ 0.347816] __clk_core_init: enabling parent ck_hse for ck_per > [ 0.352230] __clk_core_init: disabling parent ck_hse for ck_per > [ 0.358207] __clk_core_init: enabling parent pll1_p for ck_mpu > [ 0.364005] __clk_core_init: disabling parent pll1_p for ck_mpu >=20 > https://lava.sirena.org.uk/scheduler/job/2412562#L563 >=20 This is for TQMa8MPxL/MBa8MPxL: [ 1.452788] __clk_core_init: enabling parent audio_pll1_out for clkout1_= sel [ 1.457677] __clk_core_init: disabling parent audio_pll1_out for clkout1= _sel [ 1.464270] __clk_core_init: enabling parent audio_pll1_out for clkout2_= sel [ 1.471760] __clk_core_init: disabling parent audio_pll1_out for clkout2= _sel [ 1.478360] __clk_core_init: enabling parent sys_pll2_500m for arm_a53_d= iv [ 1.485259] __clk_core_init: disabling parent sys_pll2_500m for arm_a53_= div Best regards, Alexander =2D-=20 TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/