From mboxrd@z Thu Jan 1 00:00:00 1970 From: sboyd@codeaurora.org (Stephen Boyd) Date: Wed, 24 Oct 2012 15:53:44 -0700 Subject: [PATCH 3/7] ARM: hw_breakpoint: fix ordering of debug register reset sequence In-Reply-To: <1350487901-3108-4-git-send-email-will.deacon@arm.com> References: <1350487901-3108-1-git-send-email-will.deacon@arm.com> <1350487901-3108-4-git-send-email-will.deacon@arm.com> Message-ID: <50887178.4010205@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 10/17/12 08:31, Will Deacon wrote: > The debug register reset sequence for v7 and v7.1 is congruent with > tap-dancing through a minefield. > > Rather than wait until we've blown ourselves to pieces, this patch > instead checks the debug_err_mask after each potentially faulting > operation. We also move the enabling of monitor_mode to the end of the > sequence in order to prevent spurious debug events generated by UNKNOWN > register values. > > Signed-off-by: Will Deacon Reported-by: Stephen Boyd Tested-by: Stephen Boyd -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation