[PATCH v2 0/5] Move GIC and VIC to drivers/irqchip

[PATCH v2 0/5] Move GIC and VIC to drivers/irqchip

[Rob Herring]

From: Rob Herring <rob.herring@calxeda.com>

I think I had this action from San Francisco Linaro Connect. Well, better
late than never... Now we need to move GIC for use by arm64.

This series builds on Thomas Petazzoni's series adding a common irqchip
init function[1] and moves the ARM GIC and VIC irqchip code to
drivers/irqchip. More work for arm64 is still needed to fix asm header
dependencies.

v2 (add patches 1 and 2):
- Move GIC register definitions to gic.c and remove dependency on
  asm/hardware/gic.h
- Remove direct platform dependency on gic_raise_softirq. This isn't
  strictly needed before moving to drivers/irqchip, but is needed
  for arm64.

Rob

[1] http://www.spinics.net/lists/arm-kernel/msg203687.html

Rob Herring (5):
  ARM: gic: move register definitions into .c file
  ARM: gic: remove direct use of gic_raise_softirq
  irqchip: Move ARM GIC to drivers/irqchip
  irqchip: Move ARM VIC to drivers/irqchip
  ARM: highbank: use common irqchip_init

 arch/arm/common/Kconfig                            |   23 -------
 arch/arm/common/Makefile                           |    2 -
 arch/arm/include/asm/hardware/gic.h                |   19 ------
 arch/arm/include/asm/smp.h                         |    1 +
 arch/arm/kernel/smp.c                              |    5 ++
 arch/arm/mach-exynos/platsmp.c                     |    4 +-
 arch/arm/mach-highbank/highbank.c                  |    8 +--
 arch/arm/mach-highbank/platsmp.c                   |    4 +-
 arch/arm/mach-imx/platsmp.c                        |    2 -
 arch/arm/mach-msm/platsmp.c                        |    4 +-
 arch/arm/mach-omap2/omap-smp.c                     |    4 +-
 arch/arm/mach-realview/platsmp.c                   |    2 -
 arch/arm/mach-shmobile/platsmp.c                   |    2 -
 arch/arm/mach-shmobile/smp-emev2.c                 |    2 +-
 arch/arm/mach-spear13xx/platsmp.c                  |    2 -
 arch/arm/mach-tegra/platsmp.c                      |    2 -
 arch/arm/mach-ux500/platsmp.c                      |    2 -
 arch/arm/mach-vexpress/ct-ca9x4.c                  |    2 -
 arch/arm/mach-vexpress/platsmp.c                   |    2 -
 arch/arm/plat-versatile/platsmp.c                  |    2 +-
 drivers/irqchip/Kconfig                            |   23 +++++++
 drivers/irqchip/Makefile                           |    2 +
 arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |   66 +++++++++++++-------
 arch/arm/common/vic.c => drivers/irqchip/irq-vic.c |    0
 drivers/irqchip/irqchip.c                          |   24 +++++++
 drivers/irqchip/irqchip.h                          |    2 +
 26 files changed, 109 insertions(+), 102 deletions(-)
 rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (96%)
 rename arch/arm/common/vic.c => drivers/irqchip/irq-vic.c (100%)

-- 
1.7.10.4

[PATCH v2 1/5] ARM: gic: move register definitions into .c file

[Rob Herring]

From: Rob Herring <rob.herring@calxeda.com>

There's only 1 user of gic registers outside of gic.c, so move the
register definitions into gic.c. For now, keep GIC_DIST_CNT as Tegra
uses it.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
 arch/arm/common/gic.c               |   21 ++++++++++++++++++++-
 arch/arm/include/asm/hardware/gic.h |   18 ------------------
 2 files changed, 20 insertions(+), 19 deletions(-)

diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index aa52699..55ea0d7 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -43,7 +43,26 @@
 #include <asm/exception.h>
 #include <asm/smp_plat.h>
 #include <asm/mach/irq.h>
-#include <asm/hardware/gic.h>
+
+#define GIC_CPU_CTRL			0x00
+#define GIC_CPU_PRIMASK			0x04
+#define GIC_CPU_BINPOINT		0x08
+#define GIC_CPU_INTACK			0x0c
+#define GIC_CPU_EOI			0x10
+#define GIC_CPU_RUNNINGPRI		0x14
+#define GIC_CPU_HIGHPRI			0x18
+
+#define GIC_DIST_CTRL			0x000
+#define GIC_DIST_CTR			0x004
+#define GIC_DIST_ENABLE_SET		0x100
+#define GIC_DIST_ENABLE_CLEAR		0x180
+#define GIC_DIST_PENDING_SET		0x200
+#define GIC_DIST_PENDING_CLEAR		0x280
+#define GIC_DIST_ACTIVE_BIT		0x300
+#define GIC_DIST_PRI			0x400
+#define GIC_DIST_TARGET			0x800
+#define GIC_DIST_CONFIG			0xc00
+#define GIC_DIST_SOFTINT		0xf00
 
 union gic_base {
 	void __iomem *common_base;
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 4b1ce6c..8073dce 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -12,25 +12,7 @@
 
 #include <linux/compiler.h>
 
-#define GIC_CPU_CTRL			0x00
-#define GIC_CPU_PRIMASK			0x04
-#define GIC_CPU_BINPOINT		0x08
-#define GIC_CPU_INTACK			0x0c
-#define GIC_CPU_EOI			0x10
-#define GIC_CPU_RUNNINGPRI		0x14
-#define GIC_CPU_HIGHPRI			0x18
-
-#define GIC_DIST_CTRL			0x000
 #define GIC_DIST_CTR			0x004
-#define GIC_DIST_ENABLE_SET		0x100
-#define GIC_DIST_ENABLE_CLEAR		0x180
-#define GIC_DIST_PENDING_SET		0x200
-#define GIC_DIST_PENDING_CLEAR		0x280
-#define GIC_DIST_ACTIVE_BIT		0x300
-#define GIC_DIST_PRI			0x400
-#define GIC_DIST_TARGET			0x800
-#define GIC_DIST_CONFIG			0xc00
-#define GIC_DIST_SOFTINT		0xf00
 
 #ifndef __ASSEMBLY__
 #include <linux/irqdomain.h>
-- 
1.7.10.4

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Rob Herring]

From: Rob Herring <rob.herring@calxeda.com>

In preparation of moving gic code to drivers/irqchip, remove the direct
platform dependencies on gic_raise_softirq. Move the setup of
smp_cross_call into the gic code. Now that all platforms are using IPI#0
for core wakeup, create a common wakeup ipi function.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/common/gic.c               |   45 +++++++++++++++++++----------------
 arch/arm/include/asm/hardware/gic.h |    1 -
 arch/arm/include/asm/smp.h          |    1 +
 arch/arm/kernel/smp.c               |    5 ++++
 arch/arm/mach-exynos/platsmp.c      |    4 +---
 arch/arm/mach-highbank/platsmp.c    |    4 +---
 arch/arm/mach-imx/platsmp.c         |    2 --
 arch/arm/mach-msm/platsmp.c         |    4 +---
 arch/arm/mach-omap2/omap-smp.c      |    4 +---
 arch/arm/mach-realview/platsmp.c    |    2 --
 arch/arm/mach-shmobile/platsmp.c    |    2 --
 arch/arm/mach-shmobile/smp-emev2.c  |    2 +-
 arch/arm/mach-spear13xx/platsmp.c   |    2 --
 arch/arm/mach-tegra/platsmp.c       |    2 --
 arch/arm/mach-ux500/platsmp.c       |    2 --
 arch/arm/mach-vexpress/ct-ca9x4.c   |    2 --
 arch/arm/mach-vexpress/platsmp.c    |    2 --
 arch/arm/plat-versatile/platsmp.c   |    2 +-
 18 files changed, 36 insertions(+), 52 deletions(-)

diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 55ea0d7..1bee954 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -616,6 +616,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
 }
 #endif
 
+#ifdef CONFIG_SMP
+static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
+{
+	int cpu;
+	unsigned long map = 0;
+
+	/* Convert our logical CPU mask into a physical one. */
+	for_each_cpu(cpu, mask)
+		map |= 1 << cpu_logical_map(cpu);
+
+	/*
+	 * Ensure that stores to Normal memory are visible to the
+	 * other CPUs before issuing the IPI.
+	 */
+	dsb();
+
+	/* this always happens on GIC0 */
+	writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
+}
+#endif
+
 static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
 				irq_hw_number_t hw)
 {
@@ -735,6 +756,9 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
 	if (WARN_ON(!gic->domain))
 		return;
 
+#ifdef CONFIG_SMP
+	set_smp_cross_call(gic_raise_softirq);
+#endif
 	gic_chip.flags |= gic_arch_extn.flags;
 	gic_dist_init(gic);
 	gic_cpu_init(gic);
@@ -748,27 +772,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr)
 	gic_cpu_init(&gic_data[gic_nr]);
 }
 
-#ifdef CONFIG_SMP
-void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
-{
-	int cpu;
-	unsigned long map = 0;
-
-	/* Convert our logical CPU mask into a physical one. */
-	for_each_cpu(cpu, mask)
-		map |= 1 << cpu_logical_map(cpu);
-
-	/*
-	 * Ensure that stores to Normal memory are visible to the
-	 * other CPUs before issuing the IPI.
-	 */
-	dsb();
-
-	/* this always happens on GIC0 */
-	writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
-}
-#endif
-
 #ifdef CONFIG_OF
 static int gic_cnt __initdata = 0;
 
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 8073dce..ed013df 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -26,7 +26,6 @@ int gic_of_init(struct device_node *node, struct device_node *parent);
 void gic_secondary_init(unsigned int);
 void gic_handle_irq(struct pt_regs *regs);
 void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
-void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
 
 static inline void gic_init(unsigned int nr, int start,
 			    void __iomem *dist , void __iomem *cpu)
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 2e3be16..7933eb1 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -79,6 +79,7 @@ extern void cpu_die(void);
 
 extern void arch_send_call_function_single_ipi(int cpu);
 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
+extern void arch_send_wakeup_ipi(int cpu);
 
 struct smp_operations {
 #ifdef CONFIG_SMP
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index fbc8b26..0b6a926 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -426,6 +426,11 @@ void arch_send_call_function_single_ipi(int cpu)
 	smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
 }
 
+void arch_send_wakeup_ipi(int cpu)
+{
+	smp_cross_call(cpumask_of(cpu), IPI_WAKEUP);
+}
+
 static const char *ipi_types[NR_IPI] = {
 #define S(x,s)	[x] = s
 	S(IPI_WAKEUP, "CPU wakeup interrupts"),
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index f93d820..41ee539 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -134,7 +134,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
 
 		__raw_writel(virt_to_phys(exynos4_secondary_startup),
 			CPU1_BOOT_REG);
-		gic_raise_softirq(cpumask_of(cpu), 0);
+		arch_send_wakeup_ipi(cpu);
 
 		if (pen_release == -1)
 			break;
@@ -175,8 +175,6 @@ static void __init exynos_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index fa9560e..c45fc34 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -32,7 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
 
 static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
-	gic_raise_softirq(cpumask_of(cpu), 0);
+	arch_send_wakeup_ipi(cpu);
 	return 0;
 }
 
@@ -57,8 +57,6 @@ static void __init highbank_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 2ac43e1..e7bde01 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -70,8 +70,6 @@ static void __init imx_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 void imx_smp_prepare(void)
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 7ed69b69..c0eb0eb 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -115,7 +115,7 @@ static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *id
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	gic_raise_softirq(cpumask_of(cpu), 0);
+	arch_send_wakeup_ipi(cpu);
 
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
@@ -153,8 +153,6 @@ static void __init msm_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-        set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 4d05fa8..e5f57fc 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -125,7 +125,7 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *
 		booted = true;
 	}
 
-	gic_raise_softirq(cpumask_of(cpu), 0);
+	arch_send_wakeup_ipi(cpu);
 
 	/*
 	 * Now the secondary core is starting up let it run its
@@ -192,8 +192,6 @@ static void __init omap4_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 300f706..c9414d1 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -59,8 +59,6 @@ static void __init realview_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index ed8d235..d393c52 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -26,6 +26,4 @@ void __init shmobile_smp_init_cpus(unsigned int ncores)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index f674562..e3880af 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -100,7 +100,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
 	/* Tell ROM loader about our vector (in headsmp.S) */
 	emev2_set_boot_vector(__pa(shmobile_secondary_vector));
 
-	gic_raise_softirq(cpumask_of(cpu), 0);
+	arch_send_wakeup_ipi(cpu);
 	return 0;
 }
 
diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear13xx/platsmp.c
index 2eaa3fa..27e3f69 100644
--- a/arch/arm/mach-spear13xx/platsmp.c
+++ b/arch/arm/mach-spear13xx/platsmp.c
@@ -104,8 +104,6 @@ static void __init spear13xx_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 81cb265..076c140 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -160,8 +160,6 @@ static void __init tegra_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 3db7782..774e527 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -155,8 +155,6 @@ static void __init ux500_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 4f471fa..3585449 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -195,8 +195,6 @@ static void __init ct_ca9x4_init_cpu_map(void)
 
 	for (i = 0; i < ncores; ++i)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 7db27c8..cd98c04 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -127,8 +127,6 @@ static void __init vexpress_dt_smp_init_cpus(void)
 
 	for (i = 0; i < ncores; ++i)
 		set_cpu_possible(i, true);
-
-	set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 04ca493..dcca151 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -79,7 +79,7 @@ int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idl
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	gic_raise_softirq(cpumask_of(cpu), 0);
+	arch_send_wakeup_ipi(cpu);
 
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
-- 
1.7.10.4

[PATCH v2 3/5] irqchip: Move ARM GIC to drivers/irqchip

[Rob Herring]

From: Rob Herring <rob.herring@calxeda.com>

Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This
is necessary to share the GIC with arm and arm64.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
 arch/arm/common/Kconfig                            |    8 --------
 arch/arm/common/Makefile                           |    1 -
 drivers/irqchip/Kconfig                            |    8 ++++++++
 drivers/irqchip/Makefile                           |    1 +
 arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
 drivers/irqchip/irqchip.c                          |   10 ++++++++++
 drivers/irqchip/irqchip.h                          |    1 +
 7 files changed, 20 insertions(+), 9 deletions(-)
 rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (100%)

diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 45ceeb0..7bf52b2 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,11 +1,3 @@
-config ARM_GIC
-	bool
-	select IRQ_DOMAIN
-	select MULTI_IRQ_HANDLER
-
-config GIC_NON_BANKED
-	bool
-
 config ARM_VIC
 	bool
 	select IRQ_DOMAIN
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index e8a4e58..4104b82 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -2,7 +2,6 @@
 # Makefile for the linux kernel.
 #
 
-obj-$(CONFIG_ARM_GIC)		+= gic.o
 obj-$(CONFIG_ARM_VIC)		+= vic.o
 obj-$(CONFIG_ICST)		+= icst.o
 obj-$(CONFIG_SA1111)		+= sa1111.o
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 88b0929..2d7f350 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -1,3 +1,11 @@
 config IRQCHIP
 	def_bool y
 	depends on OF_IRQ
+
+config ARM_GIC
+	bool
+	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
+
+config GIC_NON_BANKED
+	bool
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 5148ffd..94118db 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_IRQCHIP) += irqchip.o
 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
 obj-$(CONFIG_ARCH_MVEBU)   += irq-armada-370-xp.o
+obj-$(CONFIG_ARM_GIC)   += irq-gic.o
diff --git a/arch/arm/common/gic.c b/drivers/irqchip/irq-gic.c
similarity index 100%
rename from arch/arm/common/gic.c
rename to drivers/irqchip/irq-gic.c
diff --git a/drivers/irqchip/irqchip.c b/drivers/irqchip/irqchip.c
index f36d423..3f37397 100644
--- a/drivers/irqchip/irqchip.c
+++ b/drivers/irqchip/irqchip.c
@@ -14,6 +14,16 @@
 #include "irqchip.h"
 
 static const struct of_device_id irqchip_of_match[] __initconst = {
+#ifdef CONFIG_ARM_GIC
+	{
+		.compatible = "arm,cortex-a15-gic",
+		.data = gic_of_init,
+	},
+	{
+		.compatible = "arm,cortex-a9-gic",
+		.data = gic_of_init,
+	},
+#endif
 #ifdef CONFIG_ARCH_BCM2835
 	{
 		.compatible = "brcm,bcm2835-armctrl-ic",
diff --git a/drivers/irqchip/irqchip.h b/drivers/irqchip/irqchip.h
index 0a0d7af..62773ab3 100644
--- a/drivers/irqchip/irqchip.h
+++ b/drivers/irqchip/irqchip.h
@@ -14,5 +14,6 @@
 int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
 int armada_370_xp_mpic_of_init(struct device_node *node,
 			       struct device_node *parent);
+int gic_of_init(struct device_node *node, struct device_node *parent);
 
 #endif
-- 
1.7.10.4

[PATCH v2 4/5] irqchip: Move ARM VIC to drivers/irqchip

[Rob Herring]

From: Rob Herring <rob.herring@calxeda.com>

Now that we have drivers/irqchip, move VIC irqchip to drivers/irqchip.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
 arch/arm/common/Kconfig                            |   15 ---------------
 arch/arm/common/Makefile                           |    1 -
 drivers/irqchip/Kconfig                            |   15 +++++++++++++++
 drivers/irqchip/Makefile                           |    1 +
 arch/arm/common/vic.c => drivers/irqchip/irq-vic.c |    0
 drivers/irqchip/irqchip.c                          |   14 ++++++++++++++
 drivers/irqchip/irqchip.h                          |    1 +
 7 files changed, 31 insertions(+), 16 deletions(-)
 rename arch/arm/common/vic.c => drivers/irqchip/irq-vic.c (100%)

diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 7bf52b2..9353184 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,18 +1,3 @@
-config ARM_VIC
-	bool
-	select IRQ_DOMAIN
-	select MULTI_IRQ_HANDLER
-
-config ARM_VIC_NR
-	int
-	default 4 if ARCH_S5PV210
-	default 3 if ARCH_S5PC100
-	default 2
-	depends on ARM_VIC
-	help
-	  The maximum number of VICs available in the system, for
-	  power management.
-
 config ICST
 	bool
 
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 4104b82..dc8dd0d 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -2,7 +2,6 @@
 # Makefile for the linux kernel.
 #
 
-obj-$(CONFIG_ARM_VIC)		+= vic.o
 obj-$(CONFIG_ICST)		+= icst.o
 obj-$(CONFIG_SA1111)		+= sa1111.o
 obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 2d7f350..d80e5c7 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -9,3 +9,18 @@ config ARM_GIC
 
 config GIC_NON_BANKED
 	bool
+
+config ARM_VIC
+	bool
+	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
+
+config ARM_VIC_NR
+	int
+	default 4 if ARCH_S5PV210
+	default 3 if ARCH_S5PC100
+	default 2
+	depends on ARM_VIC
+	help
+	  The maximum number of VICs available in the system, for
+	  power management.
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 94118db..9c7f91e 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o
 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
 obj-$(CONFIG_ARCH_MVEBU)   += irq-armada-370-xp.o
 obj-$(CONFIG_ARM_GIC)   += irq-gic.o
+obj-$(CONFIG_ARM_VIC)   += irq-vic.o
diff --git a/arch/arm/common/vic.c b/drivers/irqchip/irq-vic.c
similarity index 100%
rename from arch/arm/common/vic.c
rename to drivers/irqchip/irq-vic.c
diff --git a/drivers/irqchip/irqchip.c b/drivers/irqchip/irqchip.c
index 3f37397..0872cd7 100644
--- a/drivers/irqchip/irqchip.c
+++ b/drivers/irqchip/irqchip.c
@@ -24,6 +24,20 @@ static const struct of_device_id irqchip_of_match[] __initconst = {
 		.data = gic_of_init,
 	},
 #endif
+#ifdef CONFIG_ARM_VIC
+	{
+		.compatible = "arm,versatile-vic",
+		.data = vic_of_init,
+	},
+	{
+		.compatible = "arm,pl190-vic",
+		.data = vic_of_init,
+	},
+	{
+		.compatible = "arm,pl190-vic",
+		.data = vic_of_init,
+	},
+#endif
 #ifdef CONFIG_ARCH_BCM2835
 	{
 		.compatible = "brcm,bcm2835-armctrl-ic",
diff --git a/drivers/irqchip/irqchip.h b/drivers/irqchip/irqchip.h
index 62773ab3..8b8c2b2 100644
--- a/drivers/irqchip/irqchip.h
+++ b/drivers/irqchip/irqchip.h
@@ -15,5 +15,6 @@ int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
 int armada_370_xp_mpic_of_init(struct device_node *node,
 			       struct device_node *parent);
 int gic_of_init(struct device_node *node, struct device_node *parent);
+int vic_of_init(struct device_node *node, struct device_node *parent);
 
 #endif
-- 
1.7.10.4

[PATCH v2 5/5] ARM: highbank: use common irqchip_init

[Rob Herring]

From: Rob Herring <rob.herring@calxeda.com>

Now that we have common irqchip init, use it on highbank platform.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
---
 arch/arm/mach-highbank/highbank.c |    8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 40e36a5..27b77da 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -18,6 +18,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
@@ -82,11 +83,6 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr)
 			  HB_JUMP_TABLE_PHYS(cpu) + 15);
 }
 
-const static struct of_device_id irq_match[] = {
-	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
-	{}
-};
-
 #ifdef CONFIG_CACHE_L2X0
 static void highbank_l2x0_disable(void)
 {
@@ -97,7 +93,7 @@ static void highbank_l2x0_disable(void)
 
 static void __init highbank_init_irq(void)
 {
-	of_irq_init(irq_match);
+	irqchip_init();
 
 #ifdef CONFIG_CACHE_L2X0
 	/* Enable PL310 L2 Cache controller */
-- 
1.7.10.4

[PATCH v2 1/5] ARM: gic: move register definitions into .c file

[Russell King - ARM Linux]

On Wed, Oct 31, 2012 at 09:58:33AM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> There's only 1 user of gic registers outside of gic.c, so move the
> register definitions into gic.c. For now, keep GIC_DIST_CNT as Tegra
> uses it.

> -#define GIC_DIST_CTRL			0x000
>  #define GIC_DIST_CTR			0x004

There seems to be a disagreement here.

[PATCH v2 3/5] irqchip: Move ARM GIC to drivers/irqchip

[Russell King - ARM Linux]

On Wed, Oct 31, 2012 at 09:58:35AM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This
> is necessary to share the GIC with arm and arm64.
> 
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/arm/common/Kconfig                            |    8 --------
>  arch/arm/common/Makefile                           |    1 -
>  drivers/irqchip/Kconfig                            |    8 ++++++++
>  drivers/irqchip/Makefile                           |    1 +
>  arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
>  drivers/irqchip/irqchip.c                          |   10 ++++++++++
>  drivers/irqchip/irqchip.h                          |    1 +
>  7 files changed, 20 insertions(+), 9 deletions(-)
>  rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (100%)

What about its dependent arch/arm/include/asm/hardware/gic.h header,
which I believe after patch 1 becomes just a bunch of function calls,
and so no longer has any right to be in asm/hardware.

Nothing should be moved out of arch/arm without its associated header
file also moving with it.

[PATCH v2 4/5] irqchip: Move ARM VIC to drivers/irqchip

[Russell King - ARM Linux]

On Wed, Oct 31, 2012 at 09:58:36AM -0500, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> Now that we have drivers/irqchip, move VIC irqchip to drivers/irqchip.
> 
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/arm/common/Kconfig                            |   15 ---------------
>  arch/arm/common/Makefile                           |    1 -
>  drivers/irqchip/Kconfig                            |   15 +++++++++++++++
>  drivers/irqchip/Makefile                           |    1 +
>  arch/arm/common/vic.c => drivers/irqchip/irq-vic.c |    0
>  drivers/irqchip/irqchip.c                          |   14 ++++++++++++++
>  drivers/irqchip/irqchip.h                          |    1 +
>  7 files changed, 31 insertions(+), 16 deletions(-)
>  rename arch/arm/common/vic.c => drivers/irqchip/irq-vic.c (100%)

Same problem here...

[PATCH v2 3/5] irqchip: Move ARM GIC to drivers/irqchip

[Rob Herring]

On 10/31/2012 10:09 AM, Russell King - ARM Linux wrote:
> On Wed, Oct 31, 2012 at 09:58:35AM -0500, Rob Herring wrote:
>> From: Rob Herring <rob.herring@calxeda.com>
>>
>> Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This
>> is necessary to share the GIC with arm and arm64.
>>
>> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
>> Cc: Russell King <linux@arm.linux.org.uk>
>> Cc: Thomas Gleixner <tglx@linutronix.de>
>> ---
>>  arch/arm/common/Kconfig                            |    8 --------
>>  arch/arm/common/Makefile                           |    1 -
>>  drivers/irqchip/Kconfig                            |    8 ++++++++
>>  drivers/irqchip/Makefile                           |    1 +
>>  arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
>>  drivers/irqchip/irqchip.c                          |   10 ++++++++++
>>  drivers/irqchip/irqchip.h                          |    1 +
>>  7 files changed, 20 insertions(+), 9 deletions(-)
>>  rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (100%)
> 
> What about its dependent arch/arm/include/asm/hardware/gic.h header,
> which I believe after patch 1 becomes just a bunch of function calls,
> and so no longer has any right to be in asm/hardware.
> 
> Nothing should be moved out of arch/arm without its associated header
> file also moving with it.

What is left is only used within arch/arm and I expect we will get rid
of the remaining users. So I didn't want to encourage any additional
users by moving to include/linux.

gic_secondary_init and gic_cascade_irq could be function ptrs.
gic_of_init can be removed once users are converted to call irqchip_init
instead. That leaves gic_init which are all the non-DT converted GIC
users and will take some time to convert. I am puzzled by tegra and zynq
which should be DT only already.

$ git grep -l 'gic_init(' -- arch/arm
arch/arm/include/asm/hardware/gic.h
arch/arm/mach-cns3xxx/core.c
arch/arm/mach-omap2/board-omap3logic.c
arch/arm/mach-omap2/omap4-common.c
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pb11mp.c
arch/arm/mach-realview/realview_pba8.c
arch/arm/mach-realview/realview_pbx.c
arch/arm/mach-shmobile/intc-r8a7779.c
arch/arm/mach-shmobile/intc-sh73a0.c
arch/arm/mach-shmobile/setup-emev2.c
arch/arm/mach-tegra/irq.c
arch/arm/mach-ux500/cpu.c
arch/arm/mach-vexpress/ct-ca9x4.c
arch/arm/mach-zynq/common.c

Rob

[PATCH v2 3/5] irqchip: Move ARM GIC to drivers/irqchip

[Russell King - ARM Linux]

On Wed, Oct 31, 2012 at 10:41:44AM -0500, Rob Herring wrote:
> On 10/31/2012 10:09 AM, Russell King - ARM Linux wrote:
> > On Wed, Oct 31, 2012 at 09:58:35AM -0500, Rob Herring wrote:
> >> From: Rob Herring <rob.herring@calxeda.com>
> >>
> >> Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This
> >> is necessary to share the GIC with arm and arm64.
> >>
> >> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> >> Cc: Russell King <linux@arm.linux.org.uk>
> >> Cc: Thomas Gleixner <tglx@linutronix.de>
> >> ---
> >>  arch/arm/common/Kconfig                            |    8 --------
> >>  arch/arm/common/Makefile                           |    1 -
> >>  drivers/irqchip/Kconfig                            |    8 ++++++++
> >>  drivers/irqchip/Makefile                           |    1 +
> >>  arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
> >>  drivers/irqchip/irqchip.c                          |   10 ++++++++++
> >>  drivers/irqchip/irqchip.h                          |    1 +
> >>  7 files changed, 20 insertions(+), 9 deletions(-)
> >>  rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (100%)
> > 
> > What about its dependent arch/arm/include/asm/hardware/gic.h header,
> > which I believe after patch 1 becomes just a bunch of function calls,
> > and so no longer has any right to be in asm/hardware.
> > 
> > Nothing should be moved out of arch/arm without its associated header
> > file also moving with it.
> 
> What is left is only used within arch/arm and I expect we will get rid
> of the remaining users. So I didn't want to encourage any additional
> users by moving to include/linux.
> 
> gic_secondary_init and gic_cascade_irq could be function ptrs.

gic_secondary_init() can be, but I don't see how why you think it would
be a good idea to turn gic_casade_irq() into a function pointer.  That
makes zero sense to me what so ever.  As I've already pointed out,
gic_cascade_irq() is only used by a minority of platforms where there
are two cascaded GICs.  That being Realview, where you have a SMP tile
with its own GIC on top of the motherboard with a motherboard GIC.

Moreover, what gic_cascade_irq() is doing is can't really be turned
into something generic; it's setting up genirq for the chained GIC,
which requires GIC specific data.

You can't get around the fact that this function is attaching a
secondary GIC to an upstream IRQ.  That's already as generic as it
can be.

And finally the exercise of turning that into a function pointer is
pure code obfuscation with zero benefit what so ever.  The fact is
these platforms _definitely_ have a GIC present, and as the driver
needs to be built into the kernel for these platforms to function
there is no point what so ever in having a direct function call into
the GIC code.

To think otherwise... your off your rocker IMHO.

> gic_of_init can be removed once users are converted to call irqchip_init
> instead. That leaves gic_init which are all the non-DT converted GIC
> users and will take some time to convert. I am puzzled by tegra and zynq
> which should be DT only already.

Still, my point stands.  After this change this header file has no
business being in asm/hardware.  At all.  It needs to move as a result
of this change.

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Tony Lindgren]

* Rob Herring <robherring2@gmail.com> [121031 08:00]:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> In preparation of moving gic code to drivers/irqchip, remove the direct
> platform dependencies on gic_raise_softirq. Move the setup of
> smp_cross_call into the gic code. Now that all platforms are using IPI#0
> for core wakeup, create a common wakeup ipi function.
> 
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Rob Herring <rob.herring@calxeda.com>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Viresh Kumar <viresh.linux@gmail.com>
> Cc: Shiraz Hashim <shiraz.hashim@st.com>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>

The omap changes look OK to me:

Acked-by: Tony Lindgren <tony@atomide.com>

[PATCH v2 3/5] irqchip: Move ARM GIC to drivers/irqchip

[Stephen Warren]

On 10/31/2012 09:41 AM, Rob Herring wrote:
> On 10/31/2012 10:09 AM, Russell King - ARM Linux wrote:
>> On Wed, Oct 31, 2012 at 09:58:35AM -0500, Rob Herring wrote:
>>> From: Rob Herring <rob.herring@calxeda.com>
>>>
>>> Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This
>>> is necessary to share the GIC with arm and arm64.
>>>
>>> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
>>> Cc: Russell King <linux@arm.linux.org.uk>
>>> Cc: Thomas Gleixner <tglx@linutronix.de>
>>> ---
>>>  arch/arm/common/Kconfig                            |    8 --------
>>>  arch/arm/common/Makefile                           |    1 -
>>>  drivers/irqchip/Kconfig                            |    8 ++++++++
>>>  drivers/irqchip/Makefile                           |    1 +
>>>  arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
>>>  drivers/irqchip/irqchip.c                          |   10 ++++++++++
>>>  drivers/irqchip/irqchip.h                          |    1 +
>>>  7 files changed, 20 insertions(+), 9 deletions(-)
>>>  rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (100%)
>>
>> What about its dependent arch/arm/include/asm/hardware/gic.h header,
>> which I believe after patch 1 becomes just a bunch of function calls,
>> and so no longer has any right to be in asm/hardware.
>>
>> Nothing should be moved out of arch/arm without its associated header
>> file also moving with it.
> 
> What is left is only used within arch/arm and I expect we will get rid
> of the remaining users. So I didn't want to encourage any additional
> users by moving to include/linux.
> 
> gic_secondary_init and gic_cascade_irq could be function ptrs.
> gic_of_init can be removed once users are converted to call irqchip_init
> instead. That leaves gic_init which are all the non-DT converted GIC
> users and will take some time to convert. I am puzzled by tegra and zynq
> which should be DT only already.

I imagine you're talking about:

        /*
         * Check if there is a devicetree present, since the GIC will be
         * initialized elsewhere under DT.
         */
        if (!of_have_populated_dt())
                gic_init(0, 29, distbase,
                        IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));

This is probably legacy code from when we weren't DT only, and I imagine
can simply be removed. There are probably other pieces of code we can go
through and remove now.

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[viresh kumar]

On Wed, Oct 31, 2012 at 8:28 PM, Rob Herring <robherring2@gmail.com> wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> In preparation of moving gic code to drivers/irqchip, remove the direct
> platform dependencies on gic_raise_softirq. Move the setup of
> smp_cross_call into the gic code. Now that all platforms are using IPI#0
> for core wakeup, create a common wakeup ipi function.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Rob Herring <rob.herring@calxeda.com>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Viresh Kumar <viresh.linux@gmail.com>
> Cc: Shiraz Hashim <shiraz.hashim@st.com>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/common/gic.c               |   45 +++++++++++++++++++----------------
>  arch/arm/include/asm/hardware/gic.h |    1 -
>  arch/arm/include/asm/smp.h          |    1 +
>  arch/arm/kernel/smp.c               |    5 ++++
>  arch/arm/mach-exynos/platsmp.c      |    4 +---
>  arch/arm/mach-highbank/platsmp.c    |    4 +---
>  arch/arm/mach-imx/platsmp.c         |    2 --
>  arch/arm/mach-msm/platsmp.c         |    4 +---
>  arch/arm/mach-omap2/omap-smp.c      |    4 +---
>  arch/arm/mach-realview/platsmp.c    |    2 --
>  arch/arm/mach-shmobile/platsmp.c    |    2 --
>  arch/arm/mach-shmobile/smp-emev2.c  |    2 +-
>  arch/arm/mach-spear13xx/platsmp.c   |    2 --

For SPEAr:

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Santosh Shilimkar]

On Wednesday 31 October 2012 08:28 PM, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> In preparation of moving gic code to drivers/irqchip, remove the direct
> platform dependencies on gic_raise_softirq. Move the setup of
> smp_cross_call into the gic code. Now that all platforms are using IPI#0
> for core wakeup, create a common wakeup ipi function.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Rob Herring <rob.herring@calxeda.com>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Viresh Kumar <viresh.linux@gmail.com>
> Cc: Shiraz Hashim <shiraz.hashim@st.com>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> ---

[...]

>   arch/arm/mach-omap2/omap-smp.c      |    4 +---
For OMAP specific change..

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Srinidhi Kasagar]

Rob,

On Wed, Oct 31, 2012 at 15:58:34 +0100, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> In preparation of moving gic code to drivers/irqchip, remove the direct
> platform dependencies on gic_raise_softirq. Move the setup of
> smp_cross_call into the gic code. Now that all platforms are using IPI#0
> for core wakeup, create a common wakeup ipi function.
> 
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Rob Herring <rob.herring@calxeda.com>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Viresh Kumar <viresh.linux@gmail.com>
> Cc: Shiraz Hashim <shiraz.hashim@st.com>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> ---

[...]

>  static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
> diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
> index 3db7782..774e527 100644
> --- a/arch/arm/mach-ux500/platsmp.c
> +++ b/arch/arm/mach-ux500/platsmp.c
> @@ -155,8 +155,6 @@ static void __init ux500_smp_init_cpus(void)
> 
>         for (i = 0; i < ncores; i++)
>                 set_cpu_possible(i, true);
> -
> -       set_smp_cross_call(gic_raise_softirq);

The ux500 changes looks ok too..

However would you mind re-spinning your series on top of the below patch?

>From 6a574702ad6c45819c182a2c2bbd70d3ba7a859f Mon Sep 17 00:00:00 2001
From: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Date: Fri, 2 Nov 2012 12:45:40 +0530
Subject: [PATCH] ARM : mach-ux500: use SGI0 to wake up the other core

The commit 7d28e3eaa1a8e951251b942e7220f97114bd73b9
("ARM: ux500: wake secondary cpu via resched") makes use
of schedule IPI to wake up the secondary core which seems
incorrect. Rather use SGI0.

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
---
 arch/arm/mach-ux500/platsmp.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index da1d5ad..3f996f2 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -97,7 +97,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	 */
 	write_pen_release(cpu_logical_map(cpu));
 
-	smp_send_reschedule(cpu);
+	gic_raise_softirq(cpumask_of(cpu), 0);
 
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
-- 
1.7.2.dirty

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Srinidhi Kasagar]

On Fri, Nov 02, 2012 at 13:44:33 +0100, Srinidhi Kasagar wrote:
> Rob,
> 
> On Wed, Oct 31, 2012 at 15:58:34 +0100, Rob Herring wrote:
> > From: Rob Herring <rob.herring@calxeda.com>
> > 
> > In preparation of moving gic code to drivers/irqchip, remove the direct
> > platform dependencies on gic_raise_softirq. Move the setup of
> > smp_cross_call into the gic code. Now that all platforms are using IPI#0
> > for core wakeup, create a common wakeup ipi function.

[...]


> > 
> >         for (i = 0; i < ncores; i++)
> >                 set_cpu_possible(i, true);
> > -
> > -       set_smp_cross_call(gic_raise_softirq);
> 
> The ux500 changes looks ok too..
> 
> However would you mind re-spinning your series on top of the below patch?

ping??

> 
> From 6a574702ad6c45819c182a2c2bbd70d3ba7a859f Mon Sep 17 00:00:00 2001
> From: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
> Date: Fri, 2 Nov 2012 12:45:40 +0530
> Subject: [PATCH] ARM : mach-ux500: use SGI0 to wake up the other core
> 
> The commit 7d28e3eaa1a8e951251b942e7220f97114bd73b9
> ("ARM: ux500: wake secondary cpu via resched") makes use
> of schedule IPI to wake up the secondary core which seems
> incorrect. Rather use SGI0.
> 
> Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
> ---
>  arch/arm/mach-ux500/platsmp.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
> index da1d5ad..3f996f2 100644
> --- a/arch/arm/mach-ux500/platsmp.c
> +++ b/arch/arm/mach-ux500/platsmp.c
> @@ -97,7 +97,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
>  	 */
>  	write_pen_release(cpu_logical_map(cpu));
>  
> -	smp_send_reschedule(cpu);
> +	gic_raise_softirq(cpumask_of(cpu), 0);
>  
>  	timeout = jiffies + (1 * HZ);
>  	while (time_before(jiffies, timeout)) {
> -- 

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Thomas Petazzoni]

On Mon, 19 Nov 2012 17:20:22 +0530, Srinidhi Kasagar wrote:
> > >         for (i = 0; i < ncores; i++)
> > >                 set_cpu_possible(i, true);
> > > -
> > > -       set_smp_cross_call(gic_raise_softirq);
> > 
> > The ux500 changes looks ok too..
> > 
> > However would you mind re-spinning your series on top of the below patch?
> 
> ping??

I have merged Linus Walleij patches into my irqchip branch with more
changes around the irqchip infrastructure. That said, it will not be
part of the 3.8 release cycle, so we will definitely take care of
re-spinning against the latest ux500 changes.

Thanks!

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Rob Herring]

On 11/19/2012 06:07 AM, Thomas Petazzoni wrote:
> 
> On Mon, 19 Nov 2012 17:20:22 +0530, Srinidhi Kasagar wrote:
>>>>         for (i = 0; i < ncores; i++)
>>>>                 set_cpu_possible(i, true);
>>>> -
>>>> -       set_smp_cross_call(gic_raise_softirq);
>>>
>>> The ux500 changes looks ok too..
>>>
>>> However would you mind re-spinning your series on top of the below patch?
>>
>> ping??
> 
> I have merged Linus Walleij patches into my irqchip branch with more
> changes around the irqchip infrastructure. That said, it will not be
> part of the 3.8 release cycle, so we will definitely take care of
> re-spinning against the latest ux500 changes.

I still hope to get some of the clean-up in for 3.8 if not the move
itself. So I can include your patch. Is it in an arm-soc branch already?

Rob

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Linus Walleij]

On Mon, Nov 19, 2012 at 2:52 PM, Rob Herring <robherring2@gmail.com> wrote:

>> I have merged Linus Walleij patches into my irqchip branch with more
>> changes around the irqchip infrastructure. That said, it will not be
>> part of the 3.8 release cycle, so we will definitely take care of
>> re-spinning against the latest ux500 changes.
>
> I still hope to get some of the clean-up in for 3.8 if not the move
> itself. So I can include your patch. Is it in an arm-soc branch already?

Please include this patch, I haven't seen it in ARM SoC, and
I sure think Srinidhi's intention was to take it together with
these patches.

Yours,
Linus Walleij

[PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq

[Thomas Petazzoni]

Rob,

On Mon, 19 Nov 2012 07:52:36 -0600, Rob Herring wrote:

> > I have merged Linus Walleij patches into my irqchip branch with more
> > changes around the irqchip infrastructure. That said, it will not be
> > part of the 3.8 release cycle, so we will definitely take care of
> > re-spinning against the latest ux500 changes.
> 
> I still hope to get some of the clean-up in for 3.8 if not the move
> itself. So I can include your patch. Is it in an arm-soc branch already?

No, not yet. My goal was to send soon a new RFC version of the patches.
In case you want to have a look, here is what I have for now:

 https://github.com/MISL-EBU-System-SW/mainline-public/commits/irqchip-improvements

Or the irqchip-improvements branch at
git at github.com:MISL-EBU-System-SW/mainline-public.git.

This is a heavily work-in-progress branch. Compared to the previous
version, the most significant changes are:

 * Integration of your GIC/VIC patches.

 * Usage of a linker script trick to accumulate the available irqchip
   drivers in order to avoid the global list in irqchip.{c,h} which
   would otherwise become a conflict nightmare.

 * More VIC cleanup patches so that vic_of_init() doesn't need to be
   exposed anymore.

 * Implementation of Arnd's idea of set_handle_irq() in the core ARM
   code.

Remains to be done:

 * Testing.

 * Validate that the linker script solution is acceptable.

 * Integrate Linus Walleij patches moving the FPGA irq controller code
   to drivers/irqchip/.

 * Solve Russell's comment about the header file location.

I'm hoping to make some progress on this either tomorrow or the day
after, but I think it's mostly 3.9 material at this point as we have
quite a few remaining problems to solve (the header file location for
gic and vic being the most important ones I'd say).

Best regards,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com