From: Randy Dunlap <rdunlap@infradead.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
will@kernel.org, mathieu.poirier@linaro.org
Cc: catalin.marinas@arm.com, anshuman.khandual@arm.com,
mike.leach@linaro.org, leo.yan@linaro.org, maz@kernel.org,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v4 02/15] arm64: errata: Add detection for TRBE overwrite in FILL mode
Date: Tue, 12 Oct 2021 08:31:18 -0700 [thread overview]
Message-ID: <50b26f6c-d0d3-b8bc-085d-1e274bb42a96@infradead.org> (raw)
In-Reply-To: <20211012131743.2040596-3-suzuki.poulose@arm.com>
Hi,
On 10/12/21 6:17 AM, Suzuki K Poulose wrote:
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 077f2ec4eeb2..404f56e87e93 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -666,6 +666,47 @@ config ARM64_ERRATUM_1508412
>
> If unsure, say Y.
>
> +config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
> + bool
> +
> +config ARM64_ERRATUM_2119858
> + bool "Cortex-A710: 2119858: workaround TRBE overwriting trace data in FILL mode"
> + default y
> + depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
> + depends on CORESIGHT_TRBE
> + select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
> + help
> + This option adds the workaround for ARM Cortex-A710 erratum 2119858.
> +
> + Affected Cortex-A710 cores could overwrite upto 3 cache lines of trace
up to
> + data at the base of the buffer (ponited by TRBASER_EL1) in FILL mode in
pointed to by
> + the event of a WRAP event.
> +
> + Work around the issue by always making sure we move the TRBPTR_EL1 by
> + 256bytes before enabling the buffer and filling the first 256bytes of
256 bytes 256 bytes
> + the buffer with ETM ignore packets upon disabling.
> +
> + If unsure, say Y.
> +
> +config ARM64_ERRATUM_2139208
> + bool "Neoverse-N2: 2139208: workaround TRBE overwriting trace data in FILL mode"
> + default y
> + depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
> + depends on CORESIGHT_TRBE
> + select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
> + help
> + This option adds the workaround for ARM Neoverse-N2 erratum 2139208.
> +
> + Affected Neoverse-N2 cores could overwrite upto 3 cache lines of trace
up to
> + data at the base of the buffer (ponited by TRBASER_EL1) in FILL mode in
pointed to by
> + the event of a WRAP event.
> +
> + Work around the issue by always making sure we move the TRBPTR_EL1 by
> + 256bytes before enabling the buffer and filling the first 256bytes of
256 bytes 256 bytes
> + the buffer with ETM ignore packets upon disabling.
> +
> + If unsure, say Y.
--
~Randy
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next prev parent reply other threads:[~2021-10-12 15:33 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-12 13:17 [PATCH v4 00/15] arm64: Self-hosted trace related errata workarounds Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 01/15] arm64: Add Neoverse-N2, Cortex-A710 CPU part definition Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 02/15] arm64: errata: Add detection for TRBE overwrite in FILL mode Suzuki K Poulose
2021-10-12 15:31 ` Randy Dunlap [this message]
2021-10-14 14:17 ` Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 03/15] arm64: errata: Add workaround for TSB flush failures Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 04/15] arm64: errata: Add detection for TRBE write to out-of-range Suzuki K Poulose
2021-10-12 15:35 ` Randy Dunlap
2021-10-12 13:17 ` [PATCH v4 05/15] coresight: trbe: Add a helper to calculate the trace generated Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 06/15] coresight: trbe: Add a helper to pad a given buffer area Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 07/15] coresight: trbe: Decouple buffer base from the hardware base Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 08/15] coresight: trbe: Allow driver to choose a different alignment Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 09/15] coresight: trbe: Add infrastructure for Errata handling Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 10/15] coresight: trbe: Workaround TRBE errata overwrite in FILL mode Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 11/15] coresight: trbe: Add a helper to determine the minimum buffer size Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 12/15] coresight: trbe: Make sure we have enough space Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 13/15] coresight: trbe: Work around write to out of range Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 14/15] arm64: errata: Enable workaround for TRBE overwrite in FILL mode Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 15/15] arm64: errata: Enable TRBE workaround for write to out-of-range address Suzuki K Poulose
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