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From: Shuai Xue <xueshuai@linux.alibaba.com>
To: Bjorn Helgaas <helgaas@kernel.org>, Will Deacon <will@kernel.org>
Cc: ilkka@os.amperecomputing.com, kaishen@linux.alibaba.com,
	yangyicong@huawei.com, Jonathan.Cameron@huawei.com,
	baolin.wang@linux.alibaba.com, robin.murphy@arm.com,
	chengyou@linux.alibaba.com, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	rdunlap@infradead.org, mark.rutland@arm.com,
	zhuo.song@linux.alibaba.com, renyu.zj@linux.alibaba.com
Subject: Re: [PATCH v12 4/5] drivers/perf: add DesignWare PCIe PMU driver
Date: Tue, 10 Dec 2024 09:38:54 +0800	[thread overview]
Message-ID: <5139818d-8e1b-44ff-bfb4-18a1aca8afed@linux.alibaba.com> (raw)
In-Reply-To: <20241209224741.GA3206765@bhelgaas>



在 2024/12/10 06:47, Bjorn Helgaas 写道:
> On Mon, Dec 09, 2024 at 03:40:16PM +0000, Will Deacon wrote:
>> On Fri, Dec 06, 2024 at 10:54:57AM -0600, Bjorn Helgaas wrote:
>>> On Fri, Dec 08, 2023 at 10:56:51AM +0800, Shuai Xue wrote:
>>>> This commit adds the PCIe Performance Monitoring Unit (PMU) driver support
>>>> for T-Head Yitian SoC chip. Yitian is based on the Synopsys PCI Express
>>>> Core controller IP which provides statistics feature. The PMU is a PCIe
>>>> configuration space register block provided by each PCIe Root Port in a
>>>> Vendor-Specific Extended Capability named RAS D.E.S (Debug, Error
>>>> injection, and Statistics).
>>>
>>>> +#define DWC_PCIE_VSEC_RAS_DES_ID		0x02
>>>
>>>> +static const struct dwc_pcie_vendor_id dwc_pcie_vendor_ids[] = {
>>>> +	{.vendor_id = PCI_VENDOR_ID_ALIBABA },
>>>> +	{} /* terminator */
>>>> +};
>>>
>>>> +static bool dwc_pcie_match_des_cap(struct pci_dev *pdev)
>>>> +{
>>>> +	const struct dwc_pcie_vendor_id *vid;
>>>> +	u16 vsec;
>>>> +	u32 val;
>>>> +
>>>> +	if (!pci_is_pcie(pdev) || !(pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT))
>>>> +		return false;
>>>> +
>>>> +	for (vid = dwc_pcie_vendor_ids; vid->vendor_id; vid++) {
>>>> +		vsec = pci_find_vsec_capability(pdev, vid->vendor_id,
>>>> +						DWC_PCIE_VSEC_RAS_DES_ID);
>>>
>>> This looks wrong to me, and it promotes a misunderstanding of how VSEC
>>> Capabilities work.  The VSEC ID is defined by the vendor, so we have
>>> to check both the Vendor ID and the VSEC ID before we know what this
>>> VSEC Capability is.
>>
>> Thanks for pointing this out! The code's been merged for a while now,
>> so we'll need to fix what we have rather than revert it, I think.
> 
> Yep, for sure.
> 
>> Any chance you could send a patch with those, please? I'm also not able
>> to test this stuff, but I'm sure Ilkka would help us out.
> 
> Posted at https://lore.kernel.org/linux-pci/20241209222938.3219364-1-helgaas@kernel.org
> 
> Bjorn

Hi, Bjorn and Will,

Thanks for pointing this out and fix it so quickly, I will also test this patch
on our platform later.

Best Regards,
Shuai




  reply	other threads:[~2024-12-10  1:40 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-08  2:56 [PATCH v12 0/5] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue
2023-12-08  2:56 ` [PATCH v12 1/5] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue
2023-12-08  2:56 ` [PATCH v12 2/5] PCI: Add Alibaba Vendor ID to linux/pci_ids.h Shuai Xue
2023-12-08  2:56 ` [PATCH v12 3/5] PCI: Move pci_clear_and_set_dword() helper to PCI header Shuai Xue
2023-12-08  2:56 ` [PATCH v12 4/5] drivers/perf: add DesignWare PCIe PMU driver Shuai Xue
2023-12-13  0:32   ` Ilkka Koskinen
2024-12-06 16:54   ` Bjorn Helgaas
2024-12-09 15:40     ` Will Deacon
2024-12-09 22:47       ` Bjorn Helgaas
2024-12-10  1:38         ` Shuai Xue [this message]
2023-12-08  2:56 ` [PATCH v12 5/5] MAINTAINERS: add maintainers for " Shuai Xue
2023-12-13 17:25 ` [PATCH v12 0/5] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Will Deacon
2023-12-14 11:26   ` Shuai Xue

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