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charset="utf-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260930_111216_772933_74F3C2D1 X-CRM114-Status: GOOD ( 10.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Am Dienstag, 29. September 2026, 12:31:14 Mitteleurop=C3=A4ische Sommerzeit= schrieb Michal Wilczynski: > The Innosilicon HDMI PHY IP is used by several SoCs. They differ in > where the PHY register block sits in the register space and in which > pixel clocks they support, but the pre-PLL programming sequence and the > layout of its registers are the same. >=20 > Add a small library holding that shared part: the pre-PLL configuration > table format, a lookup, clk_ops determine_rate and recalc_rate helpers, > and the pre-PLL register programming. Callers pass a regmap, a register > offset for the PHY block, and their own pixel clock table. >=20 > No driver uses it yet; the users are converted separately. >=20 > Reviewed-by: Chaoyi Chen > Reviewed-by: Joshua Peisach > Signed-off-by: Michal Wilczynski Reviewed-by: Heiko Stuebner