linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: robherring2@gmail.com (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFCv1 01/11] arm: mvebu: move L2 cache initialization in init_early()
Date: Tue, 26 Mar 2013 20:53:08 -0500	[thread overview]
Message-ID: <51525104.4010304@gmail.com> (raw)
In-Reply-To: <1364316746-8702-2-git-send-email-thomas.petazzoni@free-electrons.com>

On 03/26/2013 11:52 AM, Thomas Petazzoni wrote:
> In preparation for moving the IRQ controller driver to
> drivers/irqchip/, we don't want the IRQ controller driver to be
> responsible for initializing the L2 cache. Instead, let's initialize
> the L2 cache at the init_early() level, like mach-exynos/common.c is
> doing.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
>  arch/arm/mach-mvebu/armada-370-xp.c     |    5 +++++
>  arch/arm/mach-mvebu/irq-armada-370-xp.c |    4 ----
>  2 files changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
> index 12d3655..d98a0ca 100644
> --- a/arch/arm/mach-mvebu/armada-370-xp.c
> +++ b/arch/arm/mach-mvebu/armada-370-xp.c
> @@ -20,6 +20,7 @@
>  #include <linux/clk/mvebu.h>
>  #include <linux/dma-mapping.h>
>  #include <linux/mbus.h>
> +#include <asm/hardware/cache-l2x0.h>
>  #include <asm/mach/arch.h>
>  #include <asm/mach/map.h>
>  #include <asm/mach/time.h>
> @@ -72,6 +73,10 @@ void __init armada_370_xp_init_early(void)
>  			ARMADA_370_XP_MBUS_WINS_SIZE,
>  			ARMADA_370_XP_SDRAM_WINS_BASE,
>  			ARMADA_370_XP_SDRAM_WINS_SIZE);
> +
> +#ifdef CONFIG_CACHE_L2X0
> +	l2x0_of_init(0, ~0UL);
> +#endif

Have you actually tested this? I don't think the ioremap in here will
work during init_early.

Rob

>  }
>  
>  static void __init armada_370_xp_dt_init(void)
> diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c
> index 6a9195e..f6699f3 100644
> --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c
> +++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c
> @@ -25,7 +25,6 @@
>  #include <asm/mach/arch.h>
>  #include <asm/exception.h>
>  #include <asm/smp_plat.h>
> -#include <asm/hardware/cache-l2x0.h>
>  
>  /* Interrupt Controller Registers Map */
>  #define ARMADA_370_XP_INT_SET_MASK_OFFS		(0x48)
> @@ -292,7 +291,4 @@ static const struct of_device_id mpic_of_match[] __initconst = {
>  void __init armada_370_xp_init_irq(void)
>  {
>  	of_irq_init(mpic_of_match);
> -#ifdef CONFIG_CACHE_L2X0
> -	l2x0_of_init(0, ~0UL);
> -#endif
>  }
> 

  parent reply	other threads:[~2013-03-27  1:53 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-26 16:52 [RFCv1 00/11] MSI support for Marvell EBU PCIe driver Thomas Petazzoni
     [not found] ` <1364316746-8702-2-git-send-email-thomas.petazzoni@free-electrons.com>
2013-03-26 16:53   ` [RFCv1 01/11] arm: mvebu: move L2 cache initialization in init_early() Arnd Bergmann
2013-03-26 17:02     ` Thomas Petazzoni
2013-03-27  1:53   ` Rob Herring [this message]
     [not found] ` <1364316746-8702-3-git-send-email-thomas.petazzoni@free-electrons.com>
2013-03-26 16:54   ` [RFCv1 02/11] irqchip: move IRQ driver for Armada 370/XP Arnd Bergmann
2013-03-26 17:05 ` [RFCv1 00/11] MSI support for Marvell EBU PCIe driver Thomas Petazzoni
2013-03-26 17:18   ` Arnd Bergmann
2013-03-26 17:21     ` Thomas Petazzoni
     [not found] ` <1364316746-8702-8-git-send-email-thomas.petazzoni@free-electrons.com>
2013-03-26 17:07   ` [RFCv1 07/11] irqchip: armada-370-xp: add MSI support to interrupt controller driver Arnd Bergmann
2013-03-26 17:17     ` Thomas Petazzoni
2013-03-26 18:38       ` Arnd Bergmann
2013-03-26 20:46         ` Thomas Petazzoni
2013-03-26 21:10           ` Arnd Bergmann
2013-03-26 21:37             ` Thomas Petazzoni
2013-03-26 21:53               ` Arnd Bergmann
2013-03-26 21:14           ` Jason Gunthorpe
2013-03-26 21:41             ` Thomas Petazzoni
2013-03-26 18:02   ` Jason Gunthorpe
2013-03-26 21:16     ` Thomas Petazzoni
2013-03-26 21:31       ` Arnd Bergmann
2013-03-26 21:47         ` Thomas Petazzoni
2013-03-26 21:55       ` Jason Gunthorpe
2013-03-26 22:04         ` Arnd Bergmann
2013-03-26 22:06         ` Thomas Petazzoni
2013-03-26 22:26           ` Jason Gunthorpe
2013-03-26 21:15   ` Arnd Bergmann
2013-03-26 21:42     ` Thomas Petazzoni
     [not found] ` <1364316746-8702-10-git-send-email-thomas.petazzoni@free-electrons.com>
2013-03-27 10:07   ` [RFCv1 09/11] pci: mvebu: add MSI support Andrew Murray
2013-04-08 22:29   ` Bjorn Helgaas
2013-05-30 12:15     ` Thierry Reding
2013-05-30 18:13       ` Bjorn Helgaas
2013-04-04  9:16 ` [RFCv1 00/11] MSI support for Marvell EBU PCIe driver Ezequiel Garcia
2013-04-04  9:29   ` Thomas Petazzoni
     [not found] ` <1364316746-8702-9-git-send-email-thomas.petazzoni@free-electrons.com>
2013-04-08 22:28   ` [RFCv1 08/11] PCI: Introduce new MSI chip infrastructure Bjorn Helgaas
2013-04-09  8:11     ` Andrew Murray
2013-04-09  8:22       ` Thierry Reding
2013-04-09  8:25         ` Andrew Murray
2013-04-09  8:18     ` Thierry Reding

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=51525104.4010304@gmail.com \
    --to=robherring2@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).