From: <Manikandan.M@microchip.com>
To: <claudiu.beznea@tuxon.dev>
Cc: <alexandre.belloni@bootlin.com>, <Frank.Li@nxp.com>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<Nicolas.Ferre@microchip.com>, <linux@armlinux.org.uk>,
<mturquette@baylibre.com>, <sboyd@kernel.org>, <tytso@mit.edu>,
<Aubin.Constans@microchip.com>, <Ryan.Wanner@microchip.com>,
<Romain.Sioen@microchip.com>, <durai.manickamkr@microchip.com>,
<Cristian.Birsan@microchip.com>, <adrian.hunter@intel.com>,
<jarkko.nikula@linux.intel.com>, <npitre@baylibre.com>,
<linux-i3c@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-clk@vger.kernel.org>
Subject: Re: [PATCH v6 4/5] ARM: dts: microchip: add I3C controller
Date: Mon, 18 May 2026 06:10:19 +0000 [thread overview]
Message-ID: <515e89f3-fca9-477c-be4d-be9ed9428d5f@microchip.com> (raw)
In-Reply-To: <da83523d-f3ac-42e3-83a2-fb7e7d64ebf9@tuxon.dev>
Hi Claudiu,
On 16/05/26 9:37 pm, Claudiu Beznea wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know
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>
> Hi, Manikandan,
>
> On 5/7/26 11:48, Manikandan Muralidharan wrote:
>> From: Durai Manickam KR <durai.manickamkr@microchip.com>
>>
>> Add I3C controller for sama7d65 SoC.
>>
>> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
>> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
>> ---
>> Changes in v3:
>> - Remove clock-names property as driver enables the clk in bulk
>>
>> arch/arm/boot/dts/microchip/sama7d65.dtsi | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi
>> b/arch/arm/boot/dts/microchip/sama7d65.dtsi
>> index 67253bbc08df..ec200848c153 100644
>> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
>> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
>> @@ -1055,5 +1055,13 @@ gic: interrupt-controller@e8c11000 {
>> #address-cells = <0>;
>> interrupt-controller;
>> };
>> +
>> + i3c: i3c@e9000000 {
>> + compatible = "microchip,sama7d65-i3c-hci";
>> + reg = <0xe9000000 0x300>;
>
> From manual at [1] I see the size of I3CC region is 0x1000. Unless that is
> wrong I think we should use 0x1000 to properly describe de HW. Please
> let me
> know and I can do it while applying.
>
According to Table 78.6 (Register Summary), the I3CC register space
extends up to offset 0x258, Ideally the mapping should have been 0x400
(next power of 2 considering the memory region alignment), using 0x1000
is also acceptable. Please advise which value is preferred.
> Thank you,
> Claudiu
>
> [1]
> https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7D6-Series-Data-Sheet-DS60001851.pdf
>
>> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 105>, <&pmc
>> PMC_TYPE_GCK 105>;
>> + status = "disabled";
>> + };
>> };
>> };
>
--
Thanks and Regards,
Manikandan M.
next prev parent reply other threads:[~2026-05-18 6:10 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-07 8:48 [PATCH v6 0/5] Add microchip sama7d65 SoC I3C support Manikandan Muralidharan
2026-05-07 8:48 ` [PATCH v6 1/5] dt-bindings: i3c: mipi-i3c-hci: add Microchip SAMA7D65 compatible Manikandan Muralidharan
2026-05-07 16:34 ` Frank Li
2026-05-07 8:48 ` [PATCH v6 2/5] clk: at91: sama7d65: add peripheral clock for I3C Manikandan Muralidharan
2026-05-16 16:06 ` Claudiu Beznea
2026-05-07 8:48 ` [PATCH v6 3/5] i3c: mipi-i3c-hci: add microchip sama7d65 SoC compatible with the required quirk Manikandan Muralidharan
2026-05-07 16:34 ` Frank Li
2026-05-07 8:48 ` [PATCH v6 4/5] ARM: dts: microchip: add I3C controller Manikandan Muralidharan
2026-05-16 16:07 ` Claudiu Beznea
2026-05-18 6:10 ` Manikandan.M [this message]
2026-05-18 7:27 ` Nicolas Ferre
2026-05-07 8:48 ` [PATCH v6 5/5] ARM: configs: at91: sama7: add sama7d65 i3c-hci Manikandan Muralidharan
2026-05-16 16:07 ` Claudiu Beznea
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