From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] Documentation: Add memory mapped ARM architected timer binding
Date: Thu, 11 Apr 2013 14:48:03 -0700 [thread overview]
Message-ID: <51672F93.7080109@codeaurora.org> (raw)
In-Reply-To: <20130411112407.GD8259@e106331-lin.cambridge.arm.com>
On 04/11/13 04:24, Mark Rutland wrote:
> Could we say the reg for the second view is optional?
>
Yes, that's already covered in the binding.
> Might we have a hardware / firmware configuration where the kernel can only access
> the secondary view?
>
I don't see how this is possible. The CNTACRn register controls secure
vs. non-secure access for particular registers in a frame regardless of
which view is used. The CNTPL0ACRn is not a security restricted register
and it can only restrict access to certain registers in the second view.
No combination of settings in these registers can restrict access to
only the second view in a frame with two views.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2013-04-11 21:48 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-09 2:30 [PATCH 0/4] Memory mapped architected timers Stephen Boyd
2013-04-09 2:30 ` [PATCH 1/4] Documentation: Add memory mapped ARM architected timer binding Stephen Boyd
2013-04-09 9:08 ` Mark Rutland
2013-04-09 16:42 ` Stephen Boyd
2013-04-10 10:13 ` Mark Rutland
2013-04-11 2:52 ` Stephen Boyd
2013-04-11 11:24 ` Mark Rutland
2013-04-11 21:48 ` Stephen Boyd [this message]
2013-04-09 2:30 ` [PATCH 2/4] ARM: arch_timers: Pass clock event to set_mode callback Stephen Boyd
2013-04-09 2:30 ` [PATCH 3/4] clocksource: arch_timer: Push the read/write wrappers deeper Stephen Boyd
2013-04-09 9:38 ` Mark Rutland
2013-04-09 14:49 ` Stephen Boyd
2013-04-09 2:30 ` [PATCH 4/4] clocksource: arch_timer: Add support for memory mapped timers Stephen Boyd
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