[PATCH 0/4] arm64: Initial patch-set for APM X-Gene SOC family

[PATCH 0/4] arm64: Initial patch-set for APM X-Gene SOC family

[Vinayak Kale]

These are initial patches for APM X-Gene SOC family.
This patch-set is based on soc-armv8-model branch of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64.git

Vinayak Kale (4):
  arm64: Add Kconfig option for APM X-Gene SOC family
  arm64: Initial defconfig for APM X-Gene SOC family
  arm64: Add defines for APM ARMv8 implementation
  arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

 arch/arm64/Kconfig                 |    5 ++
 arch/arm64/boot/dts/Makefile       |    1 +
 arch/arm64/boot/dts/mustang.dts    |   28 +++++++++
 arch/arm64/boot/dts/storm.dtsi     |  116 ++++++++++++++++++++++++++++++++++++
 arch/arm64/configs/xgene_defconfig |   93 +++++++++++++++++++++++++++++
 arch/arm64/include/asm/cputype.h   |    3 +
 6 files changed, 246 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm64/boot/dts/mustang.dts
 create mode 100644 arch/arm64/boot/dts/storm.dtsi
 create mode 100644 arch/arm64/configs/xgene_defconfig

-- 
1.7.4.1

[PATCH 1/4] arm64: Add Kconfig option for APM X-Gene SOC family

[Vinayak Kale]

This patch adds arm64/Kconfig option for APM X-Gene SOC family.

Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Feng Kan <fkan@apm.com>
---
 arch/arm64/Kconfig |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 43b0e9f..5b8f113 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -114,6 +114,11 @@ config ARCH_VEXPRESS
 	  This enables support for the ARMv8 software model (Versatile
 	  Express).
 
+config ARCH_XGENE
+	bool "AppliedMicro X-Gene SOC Family"
+	help
+	  This enables support for AppliedMicro X-Gene SOC Family
+
 endmenu
 
 menu "Bus support"
-- 
1.7.4.1

[PATCH 2/4] arm64: Initial defconfig for APM X-Gene SOC family

[Vinayak Kale]

This patch adds initial defconfig for APM X-Gene SOC family.

Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Feng Kan <fkan@apm.com>
---
 arch/arm64/configs/xgene_defconfig |   93 ++++++++++++++++++++++++++++++++++++
 1 files changed, 93 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm64/configs/xgene_defconfig

diff --git a/arch/arm64/configs/xgene_defconfig b/arch/arm64/configs/xgene_defconfig
new file mode 100644
index 0000000..4c6aefc
--- /dev/null
+++ b/arch/arm64/configs/xgene_defconfig
@@ -0,0 +1,93 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_ARCH_XGENE=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=8
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_CMDLINE="console=ttyAMA0"
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_COMPAT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+# CONFIG_BLK_DEV is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_CADENCE is not set
+CONFIG_SMC91X=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_LEGACY_PTY_COUNT=16
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_GPIOLIB=y
+# CONFIG_HWMON is not set
+CONFIG_FB=y
+CONFIG_FB_ARMCLCD=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_FUSE_FS=y
+CONFIG_CUSE=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_FTRACE is not set
+CONFIG_ATOMIC64_SELFTEST=y
-- 
1.7.4.1

[PATCH 3/4] arm64: Add defines for APM ARMv8 implementation

[Vinayak Kale]

This patch adds defines for APM CPU implementer ID and APM CPU part numbers in asm/cputype.h

Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Feng Kan <fkan@apm.com>
---
 arch/arm64/include/asm/cputype.h |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index cf27494..5fe138e 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -37,11 +37,14 @@
 })
 
 #define ARM_CPU_IMP_ARM		0x41
+#define ARM_CPU_IMP_APM		0x50
 
 #define ARM_CPU_PART_AEM_V8	0xD0F0
 #define ARM_CPU_PART_FOUNDATION	0xD000
 #define ARM_CPU_PART_CORTEX_A57	0xD070
 
+#define APM_CPU_PART_POTENZA	0x0000
+
 #ifndef __ASSEMBLY__
 
 /*
-- 
1.7.4.1

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Vinayak Kale]

This patch adds initial DTS files required for APM Mustang board.

Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Feng Kan <fkan@apm.com>
---
 arch/arm64/boot/dts/Makefile    |    1 +
 arch/arm64/boot/dts/mustang.dts |   28 +++++++++
 arch/arm64/boot/dts/storm.dtsi  |  116 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 145 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm64/boot/dts/mustang.dts
 create mode 100644 arch/arm64/boot/dts/storm.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 68457e9..faeab34 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
+dtb-$(CONFIG_ARCH_XGENE) += mustang.dtb
 
 targets += dtbs
 targets += $(dtb-y)
diff --git a/arch/arm64/boot/dts/mustang.dts b/arch/arm64/boot/dts/mustang.dts
new file mode 100644
index 0000000..a061c99
--- /dev/null
+++ b/arch/arm64/boot/dts/mustang.dts
@@ -0,0 +1,28 @@
+/*
+ * dts file for AppliedMicro (APM) Mustang Board
+ *
+ * Copyright (C) 2013, Applied Micro Circuits Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+/include/ "storm.dtsi"
+
+/ {
+	model = "mustang";
+
+	/* chosen */
+	chosen {
+		linux,stdout-path = &serial0;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
+	};
+};
diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
new file mode 100644
index 0000000..8cab5d1
--- /dev/null
+++ b/arch/arm64/boot/dts/storm.dtsi
@@ -0,0 +1,116 @@
+/*
+ * dts file for AppliedMicro (APM) X-Gene Storm SOC
+ *
+ * Copyright (C) 2013, Applied Micro Circuits Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/ {
+	compatible = "apm,xgene,storm", "apm,xgene";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0000>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x1 0x0000fff8>;
+		};
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0001>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x1 0x0000fff8>;
+		};
+		cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0100>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x1 0x0000fff8>;
+		};
+		cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0101>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x1 0x0000fff8>;
+		};
+		cpu at 4 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0200>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x1 0x0000fff8>;
+		};
+		cpu at 5 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0201>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x1 0x0000fff8>;
+		};
+		cpu at 6 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0300>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x1 0x0000fff8>;
+		};
+		cpu at 7 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0301>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x1 0x0000fff8>;
+		};
+	};
+
+	gic: interrupt-controller at 78010000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		interrupt-controller;
+		reg = <0x0 0x78010000 0x0 0x1000>,	/* GIC Dist */
+		      <0x0 0x78020000 0x0 0x1000>,	/* GIC CPU */
+		      <0x0 0x78040000 0x0 0x2000>,	/* GIC VCPU Control */
+		      <0x0 0x78060000 0x0 0x2000>;	/* GIC VCPU */
+		interrupts = <1 9 0xf04>;	/* GIC Maintenence IRQ */
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <1 0 0xff01>,	/* Secure Phys IRQ */
+			     <1 13 0xff01>,	/* Non-secure Phys IRQ */
+			     <1 14 0xff01>,	/* Virt IRQ */
+			     <1 15 0xff01>;	/* Hyp IRQ */
+		clock-frequency = <50000000>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		serial0: uart0 at 1c020000 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0 0x1c020000 0x0 0x1000>;
+			reg-shift = <2>;
+			clock-frequency = <10000000>; /* Updated by bootloader */
+			interrupt-parent = <&gic>;
+			interrupts = <0x0 0x4c 0x4>;
+		};
+	};
+};
-- 
1.7.4.1

[PATCH 2/4] arm64: Initial defconfig for APM X-Gene SOC family

[Arnd Bergmann]

On Saturday 20 April 2013 12:45:29 Vinayak Kale wrote:
> This patch adds initial defconfig for APM X-Gene SOC family.
> 
> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
> Signed-off-by: Loc Ho <lho@apm.com>
> Signed-off-by: Feng Kan <fkan@apm.com>
> ---
>  arch/arm64/configs/xgene_defconfig |   93 ++++++++++++++++++++++++++++++++++++
>  1 files changed, 93 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm64/configs/xgene_defconfig

Could you modify the regular defconfig to enable everything you need instead
of adding another one? Since all the code is interoperable, I think we
should not need a defconfig per soc.

	Arnd

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Arnd Bergmann]

On Saturday 20 April 2013 12:45:31 Vinayak Kale wrote:
> This patch adds initial DTS files required for APM Mustang board.
> 
> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
> Signed-off-by: Loc Ho <lho@apm.com>
> Signed-off-by: Feng Kan <fkan@apm.com>

Looks ok, just one comment

> +	soc {
> +		compatible = "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		serial0: uart0 at 1c020000 {
> +			device_type = "serial";
> +			compatible = "ns16550";
> +			reg = <0 0x1c020000 0x0 0x1000>;
> +			reg-shift = <2>;
> +			clock-frequency = <10000000>; /* Updated by bootloader */
> +			interrupt-parent = <&gic>;
> +			interrupts = <0x0 0x4c 0x4>;
> +		};
> +	};
> +};

The standard name for the uart is "serial", not "uart0". Please never use
numbers in the name part of the device, the idea is that you have the
same name for each device of the same kind and ambiguate them by the
address part or using a label. If you have multiple uarts on the SoC,
I would also recommend listing all of them here, and marking them
as status="disabled", and then have an entry in the board specific
.dts file to mark the ones that are connected to the outside like

&serial0 {
	status = enabled;
};

	Arnd

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Vinayak Kale]

On Sat, Apr 20, 2013 at 1:09 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Saturday 20 April 2013 12:45:31 Vinayak Kale wrote:
>> This patch adds initial DTS files required for APM Mustang board.
>>
>> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
>> Signed-off-by: Loc Ho <lho@apm.com>
>> Signed-off-by: Feng Kan <fkan@apm.com>
>
> Looks ok, just one comment
>
>> +     soc {
>> +             compatible = "simple-bus";
>> +             #address-cells = <2>;
>> +             #size-cells = <2>;
>> +             ranges;
>> +
>> +             serial0: uart0 at 1c020000 {
>> +                     device_type = "serial";
>> +                     compatible = "ns16550";
>> +                     reg = <0 0x1c020000 0x0 0x1000>;
>> +                     reg-shift = <2>;
>> +                     clock-frequency = <10000000>; /* Updated by bootloader */
>> +                     interrupt-parent = <&gic>;
>> +                     interrupts = <0x0 0x4c 0x4>;
>> +             };
>> +     };
>> +};
>
> The standard name for the uart is "serial", not "uart0". Please never use
> numbers in the name part of the device, the idea is that you have the
> same name for each device of the same kind and ambiguate them by the
> address part or using a label. If you have multiple uarts on the SoC,
> I would also recommend listing all of them here, and marking them
> as status="disabled", and then have an entry in the board specific
> .dts file to mark the ones that are connected to the outside like
>
> &serial0 {
>         status = enabled;
> };
Okay.
>
>         Arnd
Thanks
-Vinayak

[PATCH 2/4] arm64: Initial defconfig for APM X-Gene SOC family

[Vinayak Kale]

On Sat, Apr 20, 2013 at 1:05 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Saturday 20 April 2013 12:45:29 Vinayak Kale wrote:
>> This patch adds initial defconfig for APM X-Gene SOC family.
>>
>> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
>> Signed-off-by: Loc Ho <lho@apm.com>
>> Signed-off-by: Feng Kan <fkan@apm.com>
>> ---
>>  arch/arm64/configs/xgene_defconfig |   93 ++++++++++++++++++++++++++++++++++++
>>  1 files changed, 93 insertions(+), 0 deletions(-)
>>  create mode 100644 arch/arm64/configs/xgene_defconfig
>
> Could you modify the regular defconfig to enable everything you need instead
> of adding another one? Since all the code is interoperable, I think we
> should not need a defconfig per soc.
Okay. What would be the good place to change CONFIG_NR_CPUS - a)
defcofig or b) arch/arch64/Kconfig?
Currently default value 4 is defined in Kconfig. I reckon this would
eventually be set to a highest number of CPUs implemented by a soc
among all the socs.
>
>         Arnd
Thanks
-Vinayak

[PATCH 2/4] arm64: Initial defconfig for APM X-Gene SOC family

[Arnd Bergmann]

On Saturday 20 April 2013, Vinayak Kale wrote:

> Okay. What would be the good place to change CONFIG_NR_CPUS - a)
> defcofig or b) arch/arch64/Kconfig?
> Currently default value 4 is defined in Kconfig. I reckon this would
> eventually be set to a highest number of CPUs implemented by a soc
> among all the socs.

I think Kconfig would be best. Since this is a setting that is fundamentally
tied to the largest system you want to run on, you can do it like this:

config NR_CPUS
        int "Maximum number of CPUs (2-256)"
        range 2 256
        depends on SMP
	# These have to remain sorted largest to smallest
	default "64" if XGENE
	default "16" if FOO
        default "4"

If you enable XGENE in defconfig, it will automatically get the appropriate
default here, and someone who does not care about XGENE will ge the next
smaller number he or she is building for.

	Arnd

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Mark Rutland]

Hi,

I have a couple of minor comments on the dts:

> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
> new file mode 100644
> index 0000000..8cab5d1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/storm.dtsi
> @@ -0,0 +1,116 @@
> +/*
> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
> + *
> + * Copyright (C) 2013, Applied Micro Circuits Corporation
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/ {
> +	compatible = "apm,xgene,storm", "apm,xgene";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	cpus {
> +		#address-cells = <1>;

The reg is 64-bit, so address-cells should be 2.

> +		#size-cells = <0>;
> +
> +		cpu at 0 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";

It might be good to also have a compatible string for the X-Gene's CPU
implementation, e.g.

compatible = "apm,xgene-cpu", "arm,armv8";

> +			reg = <0x0 0x0000>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 1 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0001>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 2 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0100>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};

This should be cpu at 101 to match the reg property (and the following nodes
should be fixed up similarly).

> +		cpu at 3 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0101>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 4 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0200>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 5 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0201>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 6 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0300>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 7 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0301>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +	};

[...]

Thanks,
Mark.

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Vinayak Kale]

On Mon, Apr 22, 2013 at 4:44 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> Hi,
>
> I have a couple of minor comments on the dts:
>
>> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
>> new file mode 100644
>> index 0000000..8cab5d1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/storm.dtsi
>> @@ -0,0 +1,116 @@
>> +/*
>> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
>> + *
>> + * Copyright (C) 2013, Applied Micro Circuits Corporation
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + */
>> +
>> +/ {
>> +     compatible = "apm,xgene,storm", "apm,xgene";
>> +     interrupt-parent = <&gic>;
>> +     #address-cells = <2>;
>> +     #size-cells = <2>;
>> +
>> +     cpus {
>> +             #address-cells = <1>;
>
> The reg is 64-bit, so address-cells should be 2.
>
Please see my comment below regarding 'reg' property & cpu node naming.
>> +             #size-cells = <0>;
>> +
>> +             cpu at 0 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>
> It might be good to also have a compatible string for the X-Gene's CPU
> implementation, e.g.
>
> compatible = "apm,xgene-cpu", "arm,armv8";
>
Okay, will add a compatible string for APM-Xgene.
>> +                     reg = <0x0 0x0000>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 1 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0001>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 2 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0100>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>
> This should be cpu at 101 to match the reg property (and the following nodes
> should be fixed up similarly).
>
I would like to keep the cpu numbering as is (0 to 7). It helps the
boot-loader to iterate over cpu nodes based on logical numbers to do
fix-ups. Also here 'reg' property is not holding an address instead it
contains value to be compared with mpidr_el1.
>> +             cpu at 3 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0101>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 4 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0200>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 5 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0201>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 6 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0300>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 7 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0301>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +     };
>
> [...]
>
> Thanks,
> Mark.

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Mark Rutland]

On Mon, Apr 22, 2013 at 01:23:51PM +0100, Vinayak Kale wrote:
> On Mon, Apr 22, 2013 at 4:44 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> > Hi,
> >
> > I have a couple of minor comments on the dts:
> >
> >> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
> >> new file mode 100644
> >> index 0000000..8cab5d1
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/storm.dtsi
> >> @@ -0,0 +1,116 @@
> >> +/*
> >> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
> >> + *
> >> + * Copyright (C) 2013, Applied Micro Circuits Corporation
> >> + *
> >> + * This program is free software; you can redistribute it and/or
> >> + * modify it under the terms of the GNU General Public License as
> >> + * published by the Free Software Foundation; either version 2 of
> >> + * the License, or (at your option) any later version.
> >> + */
> >> +
> >> +/ {
> >> +     compatible = "apm,xgene,storm", "apm,xgene";
> >> +     interrupt-parent = <&gic>;
> >> +     #address-cells = <2>;
> >> +     #size-cells = <2>;
> >> +
> >> +     cpus {
> >> +             #address-cells = <1>;
> >
> > The reg is 64-bit, so address-cells should be 2.
> >
> Please see my comment below regarding 'reg' property & cpu node naming.
> >> +             #size-cells = <0>;
> >> +
> >> +             cpu at 0 {
> >> +                     device_type = "cpu";
> >> +                     compatible = "arm,armv8";
> >
> > It might be good to also have a compatible string for the X-Gene's CPU
> > implementation, e.g.
> >
> > compatible = "apm,xgene-cpu", "arm,armv8";
> >
> Okay, will add a compatible string for APM-Xgene.
> >> +                     reg = <0x0 0x0000>;
> >> +                     enable-method = "spin-table";
> >> +                     cpu-release-addr = <0x1 0x0000fff8>;
> >> +             };
> >> +             cpu at 1 {
> >> +                     device_type = "cpu";
> >> +                     compatible = "arm,armv8";
> >> +                     reg = <0x0 0x0001>;
> >> +                     enable-method = "spin-table";
> >> +                     cpu-release-addr = <0x1 0x0000fff8>;
> >> +             };
> >> +             cpu at 2 {
> >> +                     device_type = "cpu";
> >> +                     compatible = "arm,armv8";
> >> +                     reg = <0x0 0x0100>;
> >> +                     enable-method = "spin-table";
> >> +                     cpu-release-addr = <0x1 0x0000fff8>;
> >> +             };
> >
> > This should be cpu at 101 to match the reg property (and the following nodes
> > should be fixed up similarly).
> >
> I would like to keep the cpu numbering as is (0 to 7). It helps the
> boot-loader to iterate over cpu nodes based on logical numbers to do
> fix-ups. Also here 'reg' property is not holding an address instead it
> contains value to be compared with mpidr_el1.

We use the address bits in a cpu node's reg property to hold the mpidr_el1
value. Regardless of the semantics of an address vs CPU id, the address bits in
the reg property take 2 cells, and hence #address-cells should be 2, as ePAPR
states:

"The #address-cells property defines the number of <u32> cells used to encode
the address field in a child node?s reg property."

Regarding the unit-address, ePAPR states:

"The unit-address must match the first address specified in the reg property of
the node."

We've tried to stick to this so far.

Thanks,
Mark.

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Vinayak Kale]

On Mon, Apr 22, 2013 at 6:29 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> On Mon, Apr 22, 2013 at 01:23:51PM +0100, Vinayak Kale wrote:
>> On Mon, Apr 22, 2013 at 4:44 PM, Mark Rutland <mark.rutland@arm.com> wrote:
>> > Hi,
>> >
>> > I have a couple of minor comments on the dts:
>> >
>> >> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
>> >> new file mode 100644
>> >> index 0000000..8cab5d1
>> >> --- /dev/null
>> >> +++ b/arch/arm64/boot/dts/storm.dtsi
>> >> @@ -0,0 +1,116 @@
>> >> +/*
>> >> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
>> >> + *
>> >> + * Copyright (C) 2013, Applied Micro Circuits Corporation
>> >> + *
>> >> + * This program is free software; you can redistribute it and/or
>> >> + * modify it under the terms of the GNU General Public License as
>> >> + * published by the Free Software Foundation; either version 2 of
>> >> + * the License, or (at your option) any later version.
>> >> + */
>> >> +
>> >> +/ {
>> >> +     compatible = "apm,xgene,storm", "apm,xgene";
>> >> +     interrupt-parent = <&gic>;
>> >> +     #address-cells = <2>;
>> >> +     #size-cells = <2>;
>> >> +
>> >> +     cpus {
>> >> +             #address-cells = <1>;
>> >
>> > The reg is 64-bit, so address-cells should be 2.
>> >
>> Please see my comment below regarding 'reg' property & cpu node naming.
>> >> +             #size-cells = <0>;
>> >> +
>> >> +             cpu at 0 {
>> >> +                     device_type = "cpu";
>> >> +                     compatible = "arm,armv8";
>> >
>> > It might be good to also have a compatible string for the X-Gene's CPU
>> > implementation, e.g.
>> >
>> > compatible = "apm,xgene-cpu", "arm,armv8";
>> >
>> Okay, will add a compatible string for APM-Xgene.
>> >> +                     reg = <0x0 0x0000>;
>> >> +                     enable-method = "spin-table";
>> >> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> >> +             };
>> >> +             cpu at 1 {
>> >> +                     device_type = "cpu";
>> >> +                     compatible = "arm,armv8";
>> >> +                     reg = <0x0 0x0001>;
>> >> +                     enable-method = "spin-table";
>> >> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> >> +             };
>> >> +             cpu at 2 {
>> >> +                     device_type = "cpu";
>> >> +                     compatible = "arm,armv8";
>> >> +                     reg = <0x0 0x0100>;
>> >> +                     enable-method = "spin-table";
>> >> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> >> +             };
>> >
>> > This should be cpu at 101 to match the reg property (and the following nodes
>> > should be fixed up similarly).
>> >
>> I would like to keep the cpu numbering as is (0 to 7). It helps the
>> boot-loader to iterate over cpu nodes based on logical numbers to do
>> fix-ups. Also here 'reg' property is not holding an address instead it
>> contains value to be compared with mpidr_el1.
>
> We use the address bits in a cpu node's reg property to hold the mpidr_el1
> value. Regardless of the semantics of an address vs CPU id, the address bits in
> the reg property take 2 cells, and hence #address-cells should be 2, as ePAPR
> states:
>
> "The #address-cells property defines the number of <u32> cells used to encode
> the address field in a child node?s reg property."
>
> Regarding the unit-address, ePAPR states:
>
> "The unit-address must match the first address specified in the reg property of
> the node."
>
> We've tried to stick to this so far.
>
Okay, will modify accordingly.
> Thanks,
> Mark.

Thanks
-Vinayak

[PATCH 2/4] arm64: Initial defconfig for APM X-Gene SOC family

[Catalin Marinas]

On Sat, Apr 20, 2013 at 08:35:14AM +0100, Arnd Bergmann wrote:
> On Saturday 20 April 2013 12:45:29 Vinayak Kale wrote:
> > This patch adds initial defconfig for APM X-Gene SOC family.
> > 
> > Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
> > Signed-off-by: Loc Ho <lho@apm.com>
> > Signed-off-by: Feng Kan <fkan@apm.com>
> > ---
> >  arch/arm64/configs/xgene_defconfig |   93 ++++++++++++++++++++++++++++++++++++
> >  1 files changed, 93 insertions(+), 0 deletions(-)
> >  create mode 100644 arch/arm64/configs/xgene_defconfig
> 
> Could you modify the regular defconfig to enable everything you need instead
> of adding another one? Since all the code is interoperable, I think we
> should not need a defconfig per soc.

That's good as we can get any automatic builds using defconfig to test
all the platforms. The only issue I see is that as the number of SoCs
grows, if you only need to select a single SoC you could end up with
features enabled for other platforms.

A way around this would be for such features to be enabled by an ARCH_*
entry in arch/arm64/Kconfig (or depending on them) so that we don't get
the values set in the (minimal) defconfig.

Another option would be to avoid any ARCH_* arch/arm64/Kconfig entries
entirely and use per-SoC defconfigs, together with an overall defconfig
including all SoCs.

I would go for the first choice with Kconfig ARCH_* entries, that's the
closest to arch/arm/ as well, though there are virtual platforms like
kvmtool which do not require a specific ARCH_ option. For vexpress I had
to add ARCH_VEXPRESS since it relies code under drivers/ which is
conditionally compiled based on this option.

-- 
Catalin

[PATCH 2/4] arm64: Initial defconfig for APM X-Gene SOC family

[Arnd Bergmann]

On Monday 22 April 2013, Catalin Marinas wrote:
> That's good as we can get any automatic builds using defconfig to test
> all the platforms. The only issue I see is that as the number of SoCs
> grows, if you only need to select a single SoC you could end up with
> features enabled for other platforms.

I don't see that as a problem, as long as the defconfig just works for
everyone. Anyone building an embedded system can just disable the drivers
they don't need.

	Arnd

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Rob Herring]

On 04/20/2013 02:15 AM, Vinayak Kale wrote:
> This patch adds initial DTS files required for APM Mustang board.
> 
> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
> Signed-off-by: Loc Ho <lho@apm.com>
> Signed-off-by: Feng Kan <fkan@apm.com>
> ---
>  arch/arm64/boot/dts/Makefile    |    1 +
>  arch/arm64/boot/dts/mustang.dts |   28 +++++++++
>  arch/arm64/boot/dts/storm.dtsi  |  116 +++++++++++++++++++++++++++++++++++++++

Can you add "apm" to these filenames.

>  3 files changed, 145 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/mustang.dts
>  create mode 100644 arch/arm64/boot/dts/storm.dtsi
> 
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index 68457e9..faeab34 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -1,4 +1,5 @@
>  dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
> +dtb-$(CONFIG_ARCH_XGENE) += mustang.dtb
>  
>  targets += dtbs
>  targets += $(dtb-y)
> diff --git a/arch/arm64/boot/dts/mustang.dts b/arch/arm64/boot/dts/mustang.dts
> new file mode 100644
> index 0000000..a061c99
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mustang.dts
> @@ -0,0 +1,28 @@
> +/*
> + * dts file for AppliedMicro (APM) Mustang Board
> + *
> + * Copyright (C) 2013, Applied Micro Circuits Corporation
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/dts-v1/;
> +
> +/include/ "storm.dtsi"
> +
> +/ {
> +	model = "mustang";
> +
> +	/* chosen */

Wow, that's a useful comment.

> +	chosen {
> +		linux,stdout-path = &serial0;

I don't think this is needed if you only have a single uart.

> +	};
> +
> +	memory {
> +		device_type = "memory";
> +		reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
> new file mode 100644
> index 0000000..8cab5d1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/storm.dtsi
> @@ -0,0 +1,116 @@
> +/*
> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
> + *
> + * Copyright (C) 2013, Applied Micro Circuits Corporation
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/ {
> +	compatible = "apm,xgene,storm", "apm,xgene";

Need to add documentation for the binding and the vendor prefix if it is
not already there.

> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu at 0 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0000>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 1 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0001>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 2 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0100>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 3 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0101>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 4 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0200>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 5 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0201>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 6 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0300>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +		cpu at 7 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0301>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x1 0x0000fff8>;
> +		};
> +	};
> +
> +	gic: interrupt-controller at 78010000 {
> +		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> +		#interrupt-cells = <3>;
> +		interrupt-controller;
> +		reg = <0x0 0x78010000 0x0 0x1000>,	/* GIC Dist */
> +		      <0x0 0x78020000 0x0 0x1000>,	/* GIC CPU */
> +		      <0x0 0x78040000 0x0 0x2000>,	/* GIC VCPU Control */
> +		      <0x0 0x78060000 0x0 0x2000>;	/* GIC VCPU */
> +		interrupts = <1 9 0xf04>;	/* GIC Maintenence IRQ */
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <1 0 0xff01>,	/* Secure Phys IRQ */
> +			     <1 13 0xff01>,	/* Non-secure Phys IRQ */
> +			     <1 14 0xff01>,	/* Virt IRQ */
> +			     <1 15 0xff01>;	/* Hyp IRQ */
> +		clock-frequency = <50000000>;
> +	};
> +
> +	soc {
> +		compatible = "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		serial0: uart0 at 1c020000 {
> +			device_type = "serial";
> +			compatible = "ns16550";
> +			reg = <0 0x1c020000 0x0 0x1000>;
> +			reg-shift = <2>;
> +			clock-frequency = <10000000>; /* Updated by bootloader */
> +			interrupt-parent = <&gic>;
> +			interrupts = <0x0 0x4c 0x4>;
> +		};
> +	};
> +};
> 

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Vinayak Kale]

On Tue, Apr 23, 2013 at 2:29 AM, Rob Herring <robherring2@gmail.com> wrote:
> On 04/20/2013 02:15 AM, Vinayak Kale wrote:
>> This patch adds initial DTS files required for APM Mustang board.
>>
>> Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
>> Signed-off-by: Loc Ho <lho@apm.com>
>> Signed-off-by: Feng Kan <fkan@apm.com>
>> ---
>>  arch/arm64/boot/dts/Makefile    |    1 +
>>  arch/arm64/boot/dts/mustang.dts |   28 +++++++++
>>  arch/arm64/boot/dts/storm.dtsi  |  116 +++++++++++++++++++++++++++++++++++++++
>
> Can you add "apm" to these filenames.
>
Okay, I'll add 'apm-' prefix to dts filenames.
>>  3 files changed, 145 insertions(+), 0 deletions(-)
>>  create mode 100644 arch/arm64/boot/dts/mustang.dts
>>  create mode 100644 arch/arm64/boot/dts/storm.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
>> index 68457e9..faeab34 100644
>> --- a/arch/arm64/boot/dts/Makefile
>> +++ b/arch/arm64/boot/dts/Makefile
>> @@ -1,4 +1,5 @@
>>  dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
>> +dtb-$(CONFIG_ARCH_XGENE) += mustang.dtb
>>
>>  targets += dtbs
>>  targets += $(dtb-y)
>> diff --git a/arch/arm64/boot/dts/mustang.dts b/arch/arm64/boot/dts/mustang.dts
>> new file mode 100644
>> index 0000000..a061c99
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/mustang.dts
>> @@ -0,0 +1,28 @@
>> +/*
>> + * dts file for AppliedMicro (APM) Mustang Board
>> + *
>> + * Copyright (C) 2013, Applied Micro Circuits Corporation
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +/include/ "storm.dtsi"
>> +
>> +/ {
>> +     model = "mustang";
>> +
>> +     /* chosen */
>
> Wow, that's a useful comment.
>
>> +     chosen {
>> +             linux,stdout-path = &serial0;
>
> I don't think this is needed if you only have a single uart.
>
In subsequent patches we will add other serial nodes in the dts.
>> +     };
>> +
>> +     memory {
>> +             device_type = "memory";
>> +             reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
>> +     };
>> +};
>> diff --git a/arch/arm64/boot/dts/storm.dtsi b/arch/arm64/boot/dts/storm.dtsi
>> new file mode 100644
>> index 0000000..8cab5d1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/storm.dtsi
>> @@ -0,0 +1,116 @@
>> +/*
>> + * dts file for AppliedMicro (APM) X-Gene Storm SOC
>> + *
>> + * Copyright (C) 2013, Applied Micro Circuits Corporation
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + */
>> +
>> +/ {
>> +     compatible = "apm,xgene,storm", "apm,xgene";
>
> Need to add documentation for the binding and the vendor prefix if it is
> not already there.
>
>> +     interrupt-parent = <&gic>;
>> +     #address-cells = <2>;
>> +     #size-cells = <2>;
>> +
>> +     cpus {
>> +             #address-cells = <1>;
>> +             #size-cells = <0>;
>> +
>> +             cpu at 0 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0000>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 1 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0001>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 2 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0100>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 3 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0101>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 4 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0200>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 5 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0201>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 6 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0300>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +             cpu at 7 {
>> +                     device_type = "cpu";
>> +                     compatible = "arm,armv8";
>> +                     reg = <0x0 0x0301>;
>> +                     enable-method = "spin-table";
>> +                     cpu-release-addr = <0x1 0x0000fff8>;
>> +             };
>> +     };
>> +
>> +     gic: interrupt-controller at 78010000 {
>> +             compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> +             #interrupt-cells = <3>;
>> +             interrupt-controller;
>> +             reg = <0x0 0x78010000 0x0 0x1000>,      /* GIC Dist */
>> +                   <0x0 0x78020000 0x0 0x1000>,      /* GIC CPU */
>> +                   <0x0 0x78040000 0x0 0x2000>,      /* GIC VCPU Control */
>> +                   <0x0 0x78060000 0x0 0x2000>;      /* GIC VCPU */
>> +             interrupts = <1 9 0xf04>;       /* GIC Maintenence IRQ */
>> +     };
>> +
>> +     timer {
>> +             compatible = "arm,armv8-timer";
>> +             interrupts = <1 0 0xff01>,      /* Secure Phys IRQ */
>> +                          <1 13 0xff01>,     /* Non-secure Phys IRQ */
>> +                          <1 14 0xff01>,     /* Virt IRQ */
>> +                          <1 15 0xff01>;     /* Hyp IRQ */
>> +             clock-frequency = <50000000>;
>> +     };
>> +
>> +     soc {
>> +             compatible = "simple-bus";
>> +             #address-cells = <2>;
>> +             #size-cells = <2>;
>> +             ranges;
>> +
>> +             serial0: uart0 at 1c020000 {
>> +                     device_type = "serial";
>> +                     compatible = "ns16550";
>> +                     reg = <0 0x1c020000 0x0 0x1000>;
>> +                     reg-shift = <2>;
>> +                     clock-frequency = <10000000>; /* Updated by bootloader */
>> +                     interrupt-parent = <&gic>;
>> +                     interrupts = <0x0 0x4c 0x4>;
>> +             };
>> +     };
>> +};
>>
>

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Olof Johansson]

On Sat, Apr 20, 2013 at 12:45:31PM +0530, Vinayak Kale wrote:

> +	gic: interrupt-controller at 78010000 {
> +		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> +		#interrupt-cells = <3>;
> +		interrupt-controller;
> +		reg = <0x0 0x78010000 0x0 0x1000>,	/* GIC Dist */
> +		      <0x0 0x78020000 0x0 0x1000>,	/* GIC CPU */
> +		      <0x0 0x78040000 0x0 0x2000>,	/* GIC VCPU Control */
> +		      <0x0 0x78060000 0x0 0x2000>;	/* GIC VCPU */
> +		interrupts = <1 9 0xf04>;	/* GIC Maintenence IRQ */
> +	};

Others have commented on other compatible fields, so it's my turn. :-)

Is this the exact same GIC that's used with A15? I don't think it is? It might
make more sense to use a new compatible field and add it to the driver.

Also, other platforms have removed the a9 fallback, so even if you happen to
have an a15-compatible gic, in this case you should at least take out the a9
string.


-Olof

[PATCH 4/4] arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board

[Vinayak Kale]

On Tue, Apr 23, 2013 at 11:41 PM, Olof Johansson <olof@lixom.net> wrote:
> On Sat, Apr 20, 2013 at 12:45:31PM +0530, Vinayak Kale wrote:
>
>> +     gic: interrupt-controller at 78010000 {
>> +             compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> +             #interrupt-cells = <3>;
>> +             interrupt-controller;
>> +             reg = <0x0 0x78010000 0x0 0x1000>,      /* GIC Dist */
>> +                   <0x0 0x78020000 0x0 0x1000>,      /* GIC CPU */
>> +                   <0x0 0x78040000 0x0 0x2000>,      /* GIC VCPU Control */
>> +                   <0x0 0x78060000 0x0 0x2000>;      /* GIC VCPU */
>> +             interrupts = <1 9 0xf04>;       /* GIC Maintenence IRQ */
>> +     };
>
> Others have commented on other compatible fields, so it's my turn. :-)
>
> Is this the exact same GIC that's used with A15? I don't think it is? It might
> make more sense to use a new compatible field and add it to the driver.
>
> Also, other platforms have removed the a9 fallback, so even if you happen to
> have an a15-compatible gic, in this case you should at least take out the a9
> string.
>
Okay, will remove a9-gic string. Our's is a15-compatible gic, will use
a15 string.
>
> -Olof
Thanks
-Vinayak