[PATCH 1/2] clk: si5351: Fix clkout rate computation.

[PATCH 1/2] clk: si5351: Fix clkout rate computation.

[Marek Belisko]

Rate was incorrectly computed because we read from wrong divider register.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
---
 drivers/clk/clk-si5351.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index 8927284..cf39e53 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -932,7 +932,7 @@ static unsigned long si5351_clkout_recalc_rate(struct clk_hw *hw,
 	unsigned char reg;
 	unsigned char rdiv;
 
-	if (hwdata->num > 5)
+	if (hwdata->num <= 5)
 		reg = si5351_msynth_params_address(hwdata->num) + 2;
 	else
 		reg = SI5351_CLK6_7_OUTPUT_DIVIDER;
-- 
1.7.9.5

[PATCH 2/2] clk: si5351: Apply rate when clock-frequency is defined in devicetree.

[Marek Belisko]

clock-frequency property from devicetree was read but never used. Apply
defined rate when clock is registered.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
---
 drivers/clk/clk-si5351.c |   10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index cf39e53..8323c31 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -1477,6 +1477,16 @@ static int si5351_i2c_probe(struct i2c_client *client,
 			return -EINVAL;
 		}
 		drvdata->onecell.clks[n] = clk;
+
+		/* set rate when defined in devicetree */
+		if (pdata->clkout[n].rate != 0) {
+			int ret;
+			ret = clk_set_rate(clk, pdata->clkout[n].rate);
+			if (ret != 0) {
+				dev_err(&client->dev, "Cannot set rate : %d\n",
+					ret);
+			}
+		}
 	}
 
 	ret = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get,
-- 
1.7.9.5

[PATCH 2/2] clk: si5351: Apply rate when clock-frequency is defined in devicetree.

[Sebastian Hesselbarth]

On 04/23/2013 08:22 AM, Marek Belisko wrote:
> clock-frequency property from devicetree was read but never used. Apply
> defined rate when clock is registered.
>
> Signed-off-by: Marek Belisko<marek.belisko@streamunlimited.com>
> ---
>   drivers/clk/clk-si5351.c |   10 ++++++++++
>   1 file changed, 10 insertions(+)
>
> diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
> index cf39e53..8323c31 100644
> --- a/drivers/clk/clk-si5351.c
> +++ b/drivers/clk/clk-si5351.c
> @@ -1477,6 +1477,16 @@ static int si5351_i2c_probe(struct i2c_client *client,
>   			return -EINVAL;
>   		}
>   		drvdata->onecell.clks[n] = clk;
> +
> +		/* set rate when defined in devicetree */

nit: We also set the rate when it is defined in platform_data
(which is disabled because there is still some CONFIG_OF dependency).

Anyway, the above comment and patch subject should refer to platform
data instead.

If you can send an updated version of this patch you get my
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

> +		if (pdata->clkout[n].rate != 0) {
> +			int ret;
> +			ret = clk_set_rate(clk, pdata->clkout[n].rate);
> +			if (ret != 0) {
> +				dev_err(&client->dev, "Cannot set rate : %d\n",
> +					ret);
> +			}
> +		}
>   	}
>
>   	ret = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get,

[PATCH 1/2] clk: si5351: Fix clkout rate computation.

[Sebastian Hesselbarth]

On 04/23/2013 08:22 AM, Marek Belisko wrote:
> Rate was incorrectly computed because we read from wrong divider register.
>
> Signed-off-by: Marek Belisko<marek.belisko@streamunlimited.com>

Marek,

sorry for the late reply and very good catch!

Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

> ---
>   drivers/clk/clk-si5351.c |    2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
> index 8927284..cf39e53 100644
> --- a/drivers/clk/clk-si5351.c
> +++ b/drivers/clk/clk-si5351.c
> @@ -932,7 +932,7 @@ static unsigned long si5351_clkout_recalc_rate(struct clk_hw *hw,
>   	unsigned char reg;
>   	unsigned char rdiv;
>
> -	if (hwdata->num>  5)
> +	if (hwdata->num<= 5)
>   		reg = si5351_msynth_params_address(hwdata->num) + 2;
>   	else
>   		reg = SI5351_CLK6_7_OUTPUT_DIVIDER;