From: swarren@nvidia.com (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: mmc: bcm281xx SDHCI driver
Date: Fri, 10 May 2013 22:28:22 -0600 [thread overview]
Message-ID: <518DC8E6.5000606@nvidia.com> (raw)
In-Reply-To: <1368078942-31265-1-git-send-email-csd@broadcom.com>
On 05/08/2013 11:55 PM, Christian Daudt wrote:
> Add SDHCI driver for the Broadcom 281xx SoCs. Also
> add bindings for it into bcm281xx dts files.
> Still missing:
> - power managemement
> diff --git a/drivers/mmc/host/sdhci-bcm-kona.c b/drivers/mmc/host/sdhci-bcm-kona.c
> + /*
> + * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
> + * Back-to-Back writes to same register needs delay when SD bus clock
> + * is very low w.r.t AHB clock, mainly during boot-time and during card
> + * insert-removal.
> + */
> + udelay(1000);
> + sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
This sounds very similar to the workaround in
drivers/mmc/host/sdhci-bcm2835.c. Is this the same IP block supported by
that driver? Perhaps not, since bcm2835 apparently needs other WARs such
as always using 32-bit IO and hence needing custom read/write w/b
functions to do read-modify-write which isn't here?
prev parent reply other threads:[~2013-05-11 4:28 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-09 5:55 [PATCH] ARM: mmc: bcm281xx SDHCI driver Christian Daudt
2013-05-09 6:35 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 7:23 ` Christian Daudt
2013-05-10 7:29 ` Christian Daudt
2013-05-10 10:26 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 14:37 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 7:45 ` Christian Daudt
2013-05-11 4:28 ` Stephen Warren [this message]
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