[GIT PULL] Renesas ARM based r8a7740 SoC updates for v3.11

[GIT PULL] Renesas ARM based r8a7740 SoC updates for v3.11

[Simon Horman]

Hi Arnd, Hi Olof,

The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75:

  Linux 3.10-rc2 (2013-05-20 14:37:38 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-r8a7740-for-v3.11

for you to fetch changes up to 0a9e1c1eef2b050a16685952ce20575348b94d5c:

  ARM: shmobile: clock-r8a7740: add TPU PWM support (2013-05-27 17:45:27 +0900)

----------------------------------------------------------------
Renesas ARM based r8a7740 SoC updates for v3.11

* Clean-ups from Kuninori Morimoto, Magnus Damm and Laurent Pinchart.
* Extended clock coverage by Bastian Hecht.
* Support for initialising GIC from OF by Bastian Hecht.
* Support for reference DT initialisation by Bastian Hecht.
  This is used in conjunction with other changes initialise
  the Armadillo 800 eva board in DT as much as possible.
* Suspend to RAM and CPUIdle support by Bastian Hecht
* Build fix for fallout by Arnd Bergmann from suspend to RAM change.

----------------------------------------------------------------
Arnd Bergmann (1):
      ARM: shmobile: fix sleep-r8a7740.S miscompiles

Bastian Hecht (7):
      ARM: shmobile: r8a7740: Add interim sh-eth device name to clocks list
      ARM: shmobile: r8a7740: Add DT name to clock list for CMT10
      ARM: shmobile: r8a7740: Add I2C DT clock names
      ARM: shmobile: r8a7740: Add OF support to initialze the GIC
      ARM: shmobile: r8a7740: Prepare for reference DT setup
      ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM
      ARM: shmobile: r8a7740: Add CPUIdle

Kuninori Morimoto (1):
      ARM: shmobile: remove ";" from SH_FIXED_RATIO_CLK*() macro

Laurent Pinchart (2):
      ARM: shmobile: r8a7740: Make private clock arrays static
      ARM: shmobile: clock-r8a7740: add TPU PWM support

Magnus Damm (1):
      ARM: shmobile: r8a7740 pinmux platform device cleanup

 arch/arm/boot/dts/r8a7740.dtsi                |  117 ++++++++++++++++++
 arch/arm/mach-shmobile/Makefile               |    2 +-
 arch/arm/mach-shmobile/clock-r8a7740.c        |   12 +-
 arch/arm/mach-shmobile/cpuidle-r8a7740.c      |   62 ++++++++++
 arch/arm/mach-shmobile/include/mach/clock.h   |    4 +-
 arch/arm/mach-shmobile/include/mach/r8a7740.h |    7 ++
 arch/arm/mach-shmobile/intc-r8a7740.c         |   24 +++-
 arch/arm/mach-shmobile/pm-r8a7740.c           |  165 ++++++++++++++++++++++++-
 arch/arm/mach-shmobile/setup-r8a7740.c        |   78 +++++-------
 arch/arm/mach-shmobile/sleep-r8a7740.S        |   57 +++++++++
 10 files changed, 469 insertions(+), 59 deletions(-)
 create mode 100644 arch/arm/mach-shmobile/cpuidle-r8a7740.c
 create mode 100644 arch/arm/mach-shmobile/sleep-r8a7740.S

[PATCH 01/12] ARM: shmobile: remove "; " from SH_FIXED_RATIO_CLK*() macro

[Simon Horman]

From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/include/mach/clock.h |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/include/mach/clock.h b/arch/arm/mach-shmobile/include/mach/clock.h
index 76ac612..8902044 100644
--- a/arch/arm/mach-shmobile/include/mach/clock.h
+++ b/arch/arm/mach-shmobile/include/mach/clock.h
@@ -24,11 +24,11 @@ struct clk name = {			\
 }
 
 #define SH_FIXED_RATIO_CLK(name, p, r)		\
-static SH_FIXED_RATIO_CLKg(name, p, r);
+static SH_FIXED_RATIO_CLKg(name, p, r)
 
 #define SH_FIXED_RATIO_CLK_SET(name, p, m, d)	\
 	SH_CLK_RATIO(name, m, d);		\
-	SH_FIXED_RATIO_CLK(name, p, name);
+	SH_FIXED_RATIO_CLK(name, p, name)
 
 #define SH_CLK_SET_RATIO(p, m, d)	\
 {			\
-- 
1.7.10.4

[PATCH 02/12] ARM: shmobile: r8a7740 pinmux platform device cleanup

[Simon Horman]

From: Magnus Damm <damm@opensource.se>

Use DEFINE_RES_MEM() and platform_device_register_simple()
to save a couple of lines of code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/setup-r8a7740.c |   24 +++++-------------------
 1 file changed, 5 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 326a4ab..3a6b6fe 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -70,29 +70,15 @@ void __init r8a7740_map_io(void)
 }
 
 /* PFC */
-static struct resource r8a7740_pfc_resources[] = {
-	[0] = {
-		.start	= 0xe6050000,
-		.end	= 0xe6057fff,
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= 0xe605800c,
-		.end	= 0xe605802b,
-		.flags	= IORESOURCE_MEM,
-	}
-};
-
-static struct platform_device r8a7740_pfc_device = {
-	.name		= "pfc-r8a7740",
-	.id		= -1,
-	.resource	= r8a7740_pfc_resources,
-	.num_resources	= ARRAY_SIZE(r8a7740_pfc_resources),
+static const struct resource pfc_resources[] = {
+	DEFINE_RES_MEM(0xe6050000, 0x8000),
+	DEFINE_RES_MEM(0xe605800c, 0x0020),
 };
 
 void __init r8a7740_pinmux_init(void)
 {
-	platform_device_register(&r8a7740_pfc_device);
+	platform_device_register_simple("pfc-r8a7740", -1, pfc_resources,
+					ARRAY_SIZE(pfc_resources));
 }
 
 static struct renesas_intc_irqpin_config irqpin0_platform_data = {
-- 
1.7.10.4

[PATCH 03/12] ARM: shmobile: r8a7740: Add interim sh-eth device name to clocks list

[Simon Horman]

From: Bastian Hecht <hechtb@gmail.com>

When we use the ethernet device via DT setup, we need to add it
to a lookup list until this is properly handled later in a DT-only
fashion.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/clock-r8a7740.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index c0d39aa..5bd8da0 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -592,6 +592,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh_mmcif",		&mstp_clks[MSTP312]),
 	CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
 	CLKDEV_DEV_ID("sh-eth",			&mstp_clks[MSTP309]),
+	CLKDEV_DEV_ID("e9a00000.sh-eth",	&mstp_clks[MSTP309]),
 
 	CLKDEV_DEV_ID("sh_mobile_sdhi.2",	&mstp_clks[MSTP415]),
 	CLKDEV_DEV_ID("e6870000.sdhi",          &mstp_clks[MSTP415]),
-- 
1.7.10.4

[PATCH 04/12] ARM: shmobile: r8a7740: Add DT name to clock list for CMT10

[Simon Horman]

From: Bastian Hecht <hechtb@gmail.com>

This adds temporarily the alternative device name to the clock list
that is used when booting via Device Tree setup.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/clock-r8a7740.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 5bd8da0..8fc396a 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e6cc0000.sci",		&mstp_clks[MSTP230]),
 
 	CLKDEV_DEV_ID("sh_cmt.10",		&mstp_clks[MSTP329]),
+	CLKDEV_DEV_ID("e6138010.timer",		&mstp_clks[MSTP329]),
 	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
 	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
 	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
-- 
1.7.10.4

[PATCH 04/12] ARM: shmobile: r8a7740: Add DT name to clock list for CMT10

[Olof Johansson]

Hi,

On Mon, May 27, 2013 at 05:59:45PM +0900, Simon Horman wrote:
> From: Bastian Hecht <hechtb@gmail.com>
> 
> This adds temporarily the alternative device name to the clock list
> that is used when booting via Device Tree setup.

> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  arch/arm/mach-shmobile/clock-r8a7740.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
> index 5bd8da0..8fc396a 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7740.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7740.c
> @@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("e6cc0000.sci",		&mstp_clks[MSTP230]),
>  
>  	CLKDEV_DEV_ID("sh_cmt.10",		&mstp_clks[MSTP329]),
> +	CLKDEV_DEV_ID("e6138010.timer",		&mstp_clks[MSTP329]),
>  	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
>  	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
>  	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
> -- 
> 1.7.10.4
> 

Usually this is instead handled by adding entries to OF_DEV_AUXDATA() to rename
the device in the board file. Would you mind doing that instead?


Thanks,

-Olof

[PATCH 04/12] ARM: shmobile: r8a7740: Add DT name to clock list for CMT10

[Simon Horman]

On Mon, May 27, 2013 at 08:29:48PM -0700, Olof Johansson wrote:
> Hi,
> 
> On Mon, May 27, 2013 at 05:59:45PM +0900, Simon Horman wrote:
> > From: Bastian Hecht <hechtb@gmail.com>
> > 
> > This adds temporarily the alternative device name to the clock list
> > that is used when booting via Device Tree setup.
> 
> > 
> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > ---
> >  arch/arm/mach-shmobile/clock-r8a7740.c |    1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
> > index 5bd8da0..8fc396a 100644
> > --- a/arch/arm/mach-shmobile/clock-r8a7740.c
> > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c
> > @@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = {
> >  	CLKDEV_DEV_ID("e6cc0000.sci",		&mstp_clks[MSTP230]),
> >  
> >  	CLKDEV_DEV_ID("sh_cmt.10",		&mstp_clks[MSTP329]),
> > +	CLKDEV_DEV_ID("e6138010.timer",		&mstp_clks[MSTP329]),
> >  	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
> >  	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
> >  	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
> > -- 
> > 1.7.10.4
> > 
> 
> Usually this is instead handled by adding entries to OF_DEV_AUXDATA() to
> rename the device in the board file. Would you mind doing that instead?

Magnus has indicated in the past that he prefers this method over
using OF_DEV_AUXDATA() and the above is consistent with other
shmobile code.

[PATCH 04/12] ARM: shmobile: r8a7740: Add DT name to clock list for CMT10

[Olof Johansson]

On Tue, May 28, 2013 at 02:29:44PM +0900, Simon Horman wrote:
> On Mon, May 27, 2013 at 08:29:48PM -0700, Olof Johansson wrote:
> > Hi,
> > 
> > On Mon, May 27, 2013 at 05:59:45PM +0900, Simon Horman wrote:
> > > From: Bastian Hecht <hechtb@gmail.com>
> > > 
> > > This adds temporarily the alternative device name to the clock list
> > > that is used when booting via Device Tree setup.
> > 
> > > 
> > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > > ---
> > >  arch/arm/mach-shmobile/clock-r8a7740.c |    1 +
> > >  1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
> > > index 5bd8da0..8fc396a 100644
> > > --- a/arch/arm/mach-shmobile/clock-r8a7740.c
> > > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c
> > > @@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = {
> > >  	CLKDEV_DEV_ID("e6cc0000.sci",		&mstp_clks[MSTP230]),
> > >  
> > >  	CLKDEV_DEV_ID("sh_cmt.10",		&mstp_clks[MSTP329]),
> > > +	CLKDEV_DEV_ID("e6138010.timer",		&mstp_clks[MSTP329]),
> > >  	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
> > >  	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
> > >  	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
> > > -- 
> > > 1.7.10.4
> > > 
> > 
> > Usually this is instead handled by adding entries to OF_DEV_AUXDATA() to
> > rename the device in the board file. Would you mind doing that instead?
> 
> Magnus has indicated in the past that he prefers this method over
> using OF_DEV_AUXDATA() and the above is consistent with other
> shmobile code.

Ho hum. That's 180 degrees opposite to how we've been doing it on all
other ARM platforms. :)

Once you guys have clock bindings for device tree, the aliases should be
possible to remove. That's where having them as auxdata is useful, since it's
just one place and it's also obvious just what clocks and what drivers need
aliases on device tree.

Where are you guys at on your plans for getting DT_based clock going? That will
sort of indicate just how temporary these clock alaises will be. I'm guessing
we'll be living with them for a while though?


-Olof

[PATCH 04/12] ARM: shmobile: r8a7740: Add DT name to clock list for CMT10

[Magnus Damm]

Hi Olof,

On Tue, May 28, 2013 at 3:22 PM, Olof Johansson <olof@lixom.net> wrote:
> On Tue, May 28, 2013 at 02:29:44PM +0900, Simon Horman wrote:
>> On Mon, May 27, 2013 at 08:29:48PM -0700, Olof Johansson wrote:
>> > Hi,
>> >
>> > On Mon, May 27, 2013 at 05:59:45PM +0900, Simon Horman wrote:
>> > > From: Bastian Hecht <hechtb@gmail.com>
>> > >
>> > > This adds temporarily the alternative device name to the clock list
>> > > that is used when booting via Device Tree setup.
>> >
>> > >
>> > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
>> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>> > > ---
>> > >  arch/arm/mach-shmobile/clock-r8a7740.c |    1 +
>> > >  1 file changed, 1 insertion(+)
>> > >
>> > > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
>> > > index 5bd8da0..8fc396a 100644
>> > > --- a/arch/arm/mach-shmobile/clock-r8a7740.c
>> > > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c
>> > > @@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = {
>> > >   CLKDEV_DEV_ID("e6cc0000.sci",           &mstp_clks[MSTP230]),
>> > >
>> > >   CLKDEV_DEV_ID("sh_cmt.10",              &mstp_clks[MSTP329]),
>> > > + CLKDEV_DEV_ID("e6138010.timer",         &mstp_clks[MSTP329]),
>> > >   CLKDEV_DEV_ID("sh_fsi2",                &mstp_clks[MSTP328]),
>> > >   CLKDEV_DEV_ID("i2c-sh_mobile.1",        &mstp_clks[MSTP323]),
>> > >   CLKDEV_DEV_ID("renesas_usbhs",          &mstp_clks[MSTP320]),
>> > > --
>> > > 1.7.10.4
>> > >
>> >
>> > Usually this is instead handled by adding entries to OF_DEV_AUXDATA() to
>> > rename the device in the board file. Would you mind doing that instead?
>>
>> Magnus has indicated in the past that he prefers this method over
>> using OF_DEV_AUXDATA() and the above is consistent with other
>> shmobile code.
>
> Ho hum. That's 180 degrees opposite to how we've been doing it on all
> other ARM platforms. :)

Correct! =) But that is not the only thing! The mach-shmobile
implementation style for DT is also different. I guess you've seen
other mach-shmobile-specific oddities like the DT -reference boards in
parallel with the C version, right?

With mach-shmobile we have deliberately chosen to avoid AUXDATA. The
reason for that is that we keep the DT version of a device clean from
the beginning so it is kept totally free of platform data while in
parallel we also have a regular platform device with platform data for
the old legacy C version of board support. Other ARM subarchitectures
seem to use DT together with platform data which is a step that we
prefer to skip by using a C version and a DT version of board support
in parallel. The idea is that we should be able to existing level of
support in the C version while incrementally doing development on the
DT -reference code. Then drop the C version when the DT version has
become good enough. Current blockers are GPIO/PFC DT and common clock
framework.

Regarding AUXDATA, I don't really mind using it that much, except that
I prefer to not use DT together with platform data. So that's what
we've been doing. As for device name conversion with AUXDATA, yes, we
could use that, but it turns out that if you're not using platform
data then it becomes more verbose line wise compared to just popping
in an additional line in the clock lookup like the patch above does.
It is already abstracted per-SoC but with AUXDATA i suspect we will
have to mix board specific bits with new SoC specific tables.

You can probably find other instances of similar mixed DT names with
regular platform device names in various clock lookup tables in
mach-shmobile. Of course we will convert them over if that makes your
life easier. Personally, due to limited time I'd rather work on other
non-cosmetic stuff like getting rid off CONFIG_MEMORY_START and others
and also fixing up 64-bit memory that seems broken in the generic ARM
kernel.

> Once you guys have clock bindings for device tree, the aliases should be
> possible to remove. That's where having them as auxdata is useful, since it's
> just one place and it's also obvious just what clocks and what drivers need
> aliases on device tree.

I agree that common clocks and DT bindings will make it possible for
us to remove these special cases, but from my point of view it is even
easier to kill off DT special case names like we already have in
clock-r8axxx.c when moving to common clocks (and getting rid of that
file) instead of introducing AUXDATA just to remove it soon again.

> Where are you guys at on your plans for getting DT_based clock going? That will
> sort of indicate just how temporary these clock alaises will be. I'm guessing
> we'll be living with them for a while though?

I have to deal with LPAE soon according to my todo list. After that I
will make sure common clock conversion starts moving. There are many
SoCs to convert, so it will have to happen gradually. I doubt we will
get any code ready for merge in v3.11, getting some bits into v3.12 is
probably possible.

Apart from moving to common clocks and after that adding support for a
single multi-subarch kernel binary, is there anything you want us to
implement? Anything for v3.11? I'd like to get the memory bits sorted
out if possible.

Thanks for your help.

Cheers,

/ magnus

[PATCH 04/12] ARM: shmobile: r8a7740: Add DT name to clock list for CMT10

[Arnd Bergmann]

On Friday 31 May 2013, Magnus Damm wrote:
> With mach-shmobile we have deliberately chosen to avoid AUXDATA. The
> reason for that is that we keep the DT version of a device clean from
> the beginning so it is kept totally free of platform data while in
> parallel we also have a regular platform device with platform data for
> the old legacy C version of board support. Other ARM subarchitectures
> seem to use DT together with platform data which is a step that we
> prefer to skip by using a C version and a DT version of board support
> in parallel. The idea is that we should be able to existing level of
> support in the C version while incrementally doing development on the
> DT -reference code. Then drop the C version when the DT version has
> become good enough. Current blockers are GPIO/PFC DT and common clock
> framework.

I think this makes sense and you we shouldn't force you as the platform
maintainer to do it the other way. Incrementally removing the auxdata
and platform_data structures as most platforms do is nice in the sense
that it allows you to have a fully working system booting with DT
from the start and to reduce the amount of code as early as possible,
and for instance this has worked rather well on kirkwood/orion/dove/mvebu.

The price for that method is that you end up having to coordinate patches
carefully between subsystems so you first add DT support to a driver,
and then atomically change the dts file and the board file to the
method. With your way, you can avoid a lot of the trouble we've seen
on other platforms with complex dependency graphs or broken
bisection.

> > Where are you guys at on your plans for getting DT_based clock going? That will
> > sort of indicate just how temporary these clock alaises will be. I'm guessing
> > we'll be living with them for a while though?
> 
> I have to deal with LPAE soon according to my todo list. After that I
> will make sure common clock conversion starts moving. There are many
> SoCs to convert, so it will have to happen gradually. I doubt we will
> get any code ready for merge in v3.11, getting some bits into v3.12 is
> probably possible.
> 
> Apart from moving to common clocks and after that adding support for a
> single multi-subarch kernel binary, is there anything you want us to
> implement? Anything for v3.11? I'd like to get the memory bits sorted
> out if possible.

My preference would be if you can get CONFIG_MULTIPLATFORM to work on
as many of your SoCs as possible, but that depends on having at least
some support for COMMON_CLK.

	Arnd

[PATCH 04/12] ARM: shmobile: r8a7740: Add DT name to clock list for CMT10

[Olof Johansson]

On Fri, May 31, 2013 at 11:39:05PM +0200, Arnd Bergmann wrote:
> On Friday 31 May 2013, Magnus Damm wrote:
> > With mach-shmobile we have deliberately chosen to avoid AUXDATA. The
> > reason for that is that we keep the DT version of a device clean from
> > the beginning so it is kept totally free of platform data while in
> > parallel we also have a regular platform device with platform data for
> > the old legacy C version of board support. Other ARM subarchitectures
> > seem to use DT together with platform data which is a step that we
> > prefer to skip by using a C version and a DT version of board support
> > in parallel. The idea is that we should be able to existing level of
> > support in the C version while incrementally doing development on the
> > DT -reference code. Then drop the C version when the DT version has
> > become good enough. Current blockers are GPIO/PFC DT and common clock
> > framework.
> 
> I think this makes sense and you we shouldn't force you as the platform
> maintainer to do it the other way. Incrementally removing the auxdata
> and platform_data structures as most platforms do is nice in the sense
> that it allows you to have a fully working system booting with DT
> from the start and to reduce the amount of code as early as possible,
> and for instance this has worked rather well on kirkwood/orion/dove/mvebu.
> 
> The price for that method is that you end up having to coordinate patches
> carefully between subsystems so you first add DT support to a driver,
> and then atomically change the dts file and the board file to the
> method. With your way, you can avoid a lot of the trouble we've seen
> on other platforms with complex dependency graphs or broken
> bisection.

Well, or at least you have to add the auxdata table entries as you enable
drivers, it doesn't have to be strictly coordinated.

Anyway, that isn't really worth arguing here since it's not relevant to
the shmobile case. If doing clocks this way makes more sense for you
for now, you should continue with it. Sounds like people are aware of
the trade-offs, etc.

> > > Where are you guys at on your plans for getting DT_based clock going? That will
> > > sort of indicate just how temporary these clock alaises will be. I'm guessing
> > > we'll be living with them for a while though?
> > 
> > I have to deal with LPAE soon according to my todo list. After that I
> > will make sure common clock conversion starts moving. There are many
> > SoCs to convert, so it will have to happen gradually. I doubt we will
> > get any code ready for merge in v3.11, getting some bits into v3.12 is
> > probably possible.
> > 
> > Apart from moving to common clocks and after that adding support for a
> > single multi-subarch kernel binary, is there anything you want us to
> > implement? Anything for v3.11? I'd like to get the memory bits sorted
> > out if possible.
> 
> My preference would be if you can get CONFIG_MULTIPLATFORM to work on
> as many of your SoCs as possible, but that depends on having at least
> some support for COMMON_CLK.

Yep, agreed. Thanks for the update on your plans as well, Magnus.


-Olof

[PATCH 05/12] ARM: shmobile: r8a7740: Make private clock arrays static

[Simon Horman]

From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.

To avoid further similar issues, also define the main_clks as static.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/clock-r8a7740.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 8fc396a..a2a612f 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -266,7 +266,7 @@ static struct clk fsiack_clk = {
 static struct clk fsibck_clk = {
 };
 
-struct clk *main_clks[] = {
+static struct clk *main_clks[] = {
 	&extalr_clk,
 	&extal1_clk,
 	&extal2_clk,
@@ -317,7 +317,7 @@ enum {
 	DIV4_NR
 };
 
-struct clk div4_clks[DIV4_NR] = {
+static struct clk div4_clks[DIV4_NR] = {
 	[DIV4_I]	= SH_CLK_DIV4(&pllc1_clk, FRQCRA, 20, 0x6fff, CLK_ENABLE_ON_INIT),
 	[DIV4_ZG]	= SH_CLK_DIV4(&pllc1_clk, FRQCRA, 16, 0x6fff, CLK_ENABLE_ON_INIT),
 	[DIV4_B]	= SH_CLK_DIV4(&pllc1_clk, FRQCRA,  8, 0x6fff, CLK_ENABLE_ON_INIT),
-- 
1.7.10.4

[PATCH 06/12] ARM: shmobile: r8a7740: Add I2C DT clock names

[Simon Horman]

From: Bastian Hecht <hechtb@gmail.com>

Add clock association for i2c0 and i2c1 for the new DT names.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/clock-r8a7740.c |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index a2a612f..b12c476 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -551,6 +551,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh_tmu.4",		&mstp_clks[MSTP111]),
 	CLKDEV_DEV_ID("sh_tmu.5",		&mstp_clks[MSTP111]),
 	CLKDEV_DEV_ID("i2c-sh_mobile.0",	&mstp_clks[MSTP116]),
+	CLKDEV_DEV_ID("fff20000.i2c",		&mstp_clks[MSTP116]),
 	CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1",	&mstp_clks[MSTP117]),
 	CLKDEV_DEV_ID("sh_tmu.0",		&mstp_clks[MSTP125]),
 	CLKDEV_DEV_ID("sh_tmu.1",		&mstp_clks[MSTP125]),
@@ -585,6 +586,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e6138010.timer",		&mstp_clks[MSTP329]),
 	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
 	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
+	CLKDEV_DEV_ID("e6c20000.i2c",		&mstp_clks[MSTP323]),
 	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
 	CLKDEV_DEV_ID("sh_mobile_sdhi.0",	&mstp_clks[MSTP314]),
 	CLKDEV_DEV_ID("e6850000.sdhi",          &mstp_clks[MSTP314]),
-- 
1.7.10.4

[PATCH 06/12] ARM: shmobile: r8a7740: Add I2C DT clock names

[Olof Johansson]

Hi,

On Mon, May 27, 2013 at 05:59:47PM +0900, Simon Horman wrote:
> From: Bastian Hecht <hechtb@gmail.com>
> 
> Add clock association for i2c0 and i2c1 for the new DT names.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  arch/arm/mach-shmobile/clock-r8a7740.c |    2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
> index a2a612f..b12c476 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7740.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7740.c
> @@ -551,6 +551,7 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("sh_tmu.4",		&mstp_clks[MSTP111]),
>  	CLKDEV_DEV_ID("sh_tmu.5",		&mstp_clks[MSTP111]),
>  	CLKDEV_DEV_ID("i2c-sh_mobile.0",	&mstp_clks[MSTP116]),
> +	CLKDEV_DEV_ID("fff20000.i2c",		&mstp_clks[MSTP116]),
>  	CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1",	&mstp_clks[MSTP117]),
>  	CLKDEV_DEV_ID("sh_tmu.0",		&mstp_clks[MSTP125]),
>  	CLKDEV_DEV_ID("sh_tmu.1",		&mstp_clks[MSTP125]),
> @@ -585,6 +586,7 @@ static struct clk_lookup lookups[] = {
>  	CLKDEV_DEV_ID("e6138010.timer",		&mstp_clks[MSTP329]),
>  	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
>  	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
> +	CLKDEV_DEV_ID("e6c20000.i2c",		&mstp_clks[MSTP323]),
>  	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
>  	CLKDEV_DEV_ID("sh_mobile_sdhi.0",	&mstp_clks[MSTP314]),
>  	CLKDEV_DEV_ID("e6850000.sdhi",          &mstp_clks[MSTP314]),
> -- 

Same here w.r.t. OF_DEV_AUXDATA().


-Olof

[PATCH 07/12] ARM: shmobile: r8a7740: Add OF support to initialze the GIC

[Simon Horman]

From: Bastian Hecht <hechtb@gmail.com>

We add a variant to initalize the interrupt controller in case we describe
the GIC using the Device Tree and not platform data.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/include/mach/r8a7740.h |    1 +
 arch/arm/mach-shmobile/intc-r8a7740.c         |   24 ++++++++++++++++++------
 2 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index abdc4d4..19c0423 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -534,6 +534,7 @@ enum {
 
 extern void r8a7740_meram_workaround(void);
 extern void r8a7740_init_irq(void);
+extern void r8a7740_init_irq_of(void);
 extern void r8a7740_map_io(void);
 extern void r8a7740_add_early_devices(void);
 extern void r8a7740_add_standard_devices(void);
diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
index b741c84..8871f77 100644
--- a/arch/arm/mach-shmobile/intc-r8a7740.c
+++ b/arch/arm/mach-shmobile/intc-r8a7740.c
@@ -20,19 +20,15 @@
 
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/arm-gic.h>
 
-void __init r8a7740_init_irq(void)
+static void __init r8a7740_init_irq_common(void)
 {
-	void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
-	void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
 	void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
 	void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
 	void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
 
-	/* initialize the Generic Interrupt Controller PL390 r0p0 */
-	gic_init(0, 29, gic_dist_base, gic_cpu_base);
-
 	/* route signals to GIC */
 	iowrite32(0x0, pfc_inta_ctrl);
 
@@ -54,3 +50,19 @@ void __init r8a7740_init_irq(void)
 	iounmap(intc_msk_base);
 	iounmap(pfc_inta_ctrl);
 }
+
+void __init r8a7740_init_irq_of(void)
+{
+	irqchip_init();
+	r8a7740_init_irq_common();
+}
+
+void __init r8a7740_init_irq(void)
+{
+	void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
+	void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
+
+	/* initialize the Generic Interrupt Controller PL390 r0p0 */
+	gic_init(0, 29, gic_dist_base, gic_cpu_base);
+	r8a7740_init_irq_common();
+}
-- 
1.7.10.4

[PATCH 07/12] ARM: shmobile: r8a7740: Add OF support to initialze the GIC

[Olof Johansson]

Hi,

On Mon, May 27, 2013 at 05:59:48PM +0900, Simon Horman wrote:
> From: Bastian Hecht <hechtb@gmail.com>
> 
> We add a variant to initalize the interrupt controller in case we describe
> the GIC using the Device Tree and not platform data.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  arch/arm/mach-shmobile/include/mach/r8a7740.h |    1 +
>  arch/arm/mach-shmobile/intc-r8a7740.c         |   24 ++++++++++++++++++------
>  2 files changed, 19 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
> index abdc4d4..19c0423 100644
> --- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
> +++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
> @@ -534,6 +534,7 @@ enum {
>  
>  extern void r8a7740_meram_workaround(void);
>  extern void r8a7740_init_irq(void);
> +extern void r8a7740_init_irq_of(void);
>  extern void r8a7740_map_io(void);
>  extern void r8a7740_add_early_devices(void);
>  extern void r8a7740_add_standard_devices(void);

This is not a comment on this patch per se, but this header file should
probably be directly under the mach directory instead of under include/mach.

In particular, if/when the shmobile platforms get converted to
multiplatform, the header file has to move. And I see that most of these
functions are only used locally in that directory anyway.

It'd be nice to see some of that addressed by 3.12 or so, if you have a chance.


-Olof

[PATCH 08/12] ARM: shmobile: r8a7740: Prepare for reference DT setup

[Simon Horman]

From: Bastian Hecht <hechtb@gmail.com>

We need three steps to prepare for the new Armadillo reference DT board code:
 - Split the device list into r8a7740_early_devices used by the old platform
   data setup (board-armadillo.c) and r8a7740_devices_dt used by both
   setup variants.
 - Introduce new r8a7740_init_delay() to be more flexible about calling
   shmobile_setup_delay().
 - For the generic r8a7740 support, we switch to device tree setup for
   the GIC, the irqpin devices and the I2C controllers.

This is slightly similar to commit 3b00f9342623a5ebc
"ARM: shmobile: sh73a0: Do not use early devices with DT reference"

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7740.dtsi                |  117 +++++++++++++++++++++++++
 arch/arm/mach-shmobile/include/mach/r8a7740.h |    2 +
 arch/arm/mach-shmobile/setup-r8a7740.c        |   54 ++++++------
 3 files changed, 148 insertions(+), 25 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 798fa35..25dc930 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -18,4 +18,121 @@
 			compatible = "arm,cortex-a9";
 		};
 	};
+
+	gic: interrupt-controller at c2800000 {
+		compatible = "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <1>;
+		interrupt-controller;
+		reg = <0xc2800000 0x1000>,
+		      <0xc2000000 0x1000>;
+	};
+
+	/* irqpin0: IRQ0 - IRQ7 */
+	irqpin0: irqpin at e6900000 {
+		compatible = "renesas,intc-irqpin";
+		#interrupt-cells = <2>;
+		interrupt-controller;
+		reg = <0xe6900000 4>,
+			<0xe6900010 4>,
+			<0xe6900020 1>,
+			<0xe6900040 1>,
+			<0xe6900060 1>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4>;
+	};
+
+	/* irqpin1: IRQ8 - IRQ15 */
+	irqpin1: irqpin at e6900004 {
+		compatible = "renesas,intc-irqpin";
+		#interrupt-cells = <2>;
+		interrupt-controller;
+		reg = <0xe6900004 4>,
+			<0xe6900014 4>,
+			<0xe6900024 1>,
+			<0xe6900044 1>,
+			<0xe6900064 1>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4>;
+	};
+
+	/* irqpin2: IRQ16 - IRQ23 */
+	irqpin2: irqpin at e6900008 {
+		compatible = "renesas,intc-irqpin";
+		#interrupt-cells = <2>;
+		interrupt-controller;
+		reg = <0xe6900008 4>,
+			<0xe6900018 4>,
+			<0xe6900028 1>,
+			<0xe6900048 1>,
+			<0xe6900068 1>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4>;
+	};
+
+	/* irqpin3: IRQ24 - IRQ31 */
+	irqpin3: irqpin at e690000c {
+		compatible = "renesas,intc-irqpin";
+		#interrupt-cells = <2>;
+		interrupt-controller;
+		reg = <0xe690000c 4>,
+			<0xe690001c 4>,
+			<0xe690002c 1>,
+			<0xe690004c 1>,
+			<0xe690006c 1>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4
+			      0 149 0x4>;
+	};
+
+	i2c0: i2c at fff20000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,rmobile-iic";
+		reg = <0xfff20000 0x425>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 201 0x4
+			      0 202 0x4
+			      0 203 0x4
+			      0 204 0x4>;
+	};
+
+	i2c1: i2c at e6c20000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,rmobile-iic";
+		reg = <0xe6c20000 0x425>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 70 0x4
+			      0 71 0x4
+			      0 72 0x4
+			      0 73 0x4>;
+	};
 };
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index 19c0423..1cf6869 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -533,11 +533,13 @@ enum {
 };
 
 extern void r8a7740_meram_workaround(void);
+extern void r8a7740_init_delay(void);
 extern void r8a7740_init_irq(void);
 extern void r8a7740_init_irq_of(void);
 extern void r8a7740_map_io(void);
 extern void r8a7740_add_early_devices(void);
 extern void r8a7740_add_standard_devices(void);
+extern void r8a7740_add_standard_devices_dt(void);
 extern void r8a7740_clock_init(u8 md_ck);
 extern void r8a7740_pinmux_init(void);
 extern void r8a7740_pm_init(void);
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 3a6b6fe..00c5a70 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -517,11 +517,7 @@ static struct platform_device ipmmu_device = {
 	.num_resources  = ARRAY_SIZE(ipmmu_resources),
 };
 
-static struct platform_device *r8a7740_early_devices[] __initdata = {
-	&irqpin0_device,
-	&irqpin1_device,
-	&irqpin2_device,
-	&irqpin3_device,
+static struct platform_device *r8a7740_devices_dt[] __initdata = {
 	&scif0_device,
 	&scif1_device,
 	&scif2_device,
@@ -532,6 +528,13 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
 	&scif7_device,
 	&scifb_device,
 	&cmt10_device,
+};
+
+static struct platform_device *r8a7740_early_devices[] __initdata = {
+	&irqpin0_device,
+	&irqpin1_device,
+	&irqpin2_device,
+	&irqpin3_device,
 	&tmu00_device,
 	&tmu01_device,
 	&tmu02_device,
@@ -951,6 +954,8 @@ void __init r8a7740_add_standard_devices(void)
 	/* add devices */
 	platform_add_devices(r8a7740_early_devices,
 			    ARRAY_SIZE(r8a7740_early_devices));
+	platform_add_devices(r8a7740_devices_dt,
+			    ARRAY_SIZE(r8a7740_devices_dt));
 	platform_add_devices(r8a7740_late_devices,
 			     ARRAY_SIZE(r8a7740_late_devices));
 
@@ -972,6 +977,8 @@ void __init r8a7740_add_early_devices(void)
 {
 	early_platform_add_devices(r8a7740_early_devices,
 				   ARRAY_SIZE(r8a7740_early_devices));
+	early_platform_add_devices(r8a7740_devices_dt,
+				   ARRAY_SIZE(r8a7740_devices_dt));
 
 	/* setup early console here as well */
 	shmobile_setup_console();
@@ -979,33 +986,29 @@ void __init r8a7740_add_early_devices(void)
 
 #ifdef CONFIG_USE_OF
 
-void __init r8a7740_add_early_devices_dt(void)
-{
-	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-
-	early_platform_add_devices(r8a7740_early_devices,
-				   ARRAY_SIZE(r8a7740_early_devices));
-
-	/* setup early console here as well */
-	shmobile_setup_console();
-}
-
 static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = {
 	{ }
 };
 
 void __init r8a7740_add_standard_devices_dt(void)
 {
-	/* clocks are setup late during boot in the case of DT */
-	r8a7740_clock_init(0);
-
-	platform_add_devices(r8a7740_early_devices,
-			    ARRAY_SIZE(r8a7740_early_devices));
-
+	platform_add_devices(r8a7740_devices_dt,
+			    ARRAY_SIZE(r8a7740_devices_dt));
 	of_platform_populate(NULL, of_default_bus_match_table,
 			     r8a7740_auxdata_lookup, NULL);
 }
 
+void __init r8a7740_init_delay(void)
+{
+	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
+};
+
+static void __init r8a7740_generic_init(void)
+{
+	r8a7740_clock_init(0);
+	r8a7740_add_standard_devices_dt();
+}
+
 static const char *r8a7740_boards_compat_dt[] __initdata = {
 	"renesas,r8a7740",
 	NULL,
@@ -1013,9 +1016,10 @@ static const char *r8a7740_boards_compat_dt[] __initdata = {
 
 DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
 	.map_io		= r8a7740_map_io,
-	.init_early	= r8a7740_add_early_devices_dt,
-	.init_irq	= r8a7740_init_irq,
-	.init_machine	= r8a7740_add_standard_devices_dt,
+	.init_early	= r8a7740_init_delay,
+	.init_irq	= r8a7740_init_irq_of,
+	.init_machine	= r8a7740_generic_init,
+	.init_time	= shmobile_timer_init,
 	.dt_compat	= r8a7740_boards_compat_dt,
 MACHINE_END
 
-- 
1.7.10.4

[PATCH 09/12] ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM

[Simon Horman]

From: Bastian Hecht <hechtb@gmail.com>

We add 2 Suspend to RAM modes:
- A3SM PLL0 on/off:     Power domain A3SM that contains the ARM core
                        and the 2nd level cache with either PLL0 on
                        or off

As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
is included here too, so CPUIdle can use both power down modes (not
included in this patch).

The setup of the SYSC regarding the external IRQs is taken from
pm-sh7372.c from Magnus Damm.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
 arch/arm/mach-shmobile/Makefile               |    2 +-
 arch/arm/mach-shmobile/include/mach/r8a7740.h |    3 +
 arch/arm/mach-shmobile/pm-r8a7740.c           |  164 ++++++++++++++++++++++++-
 arch/arm/mach-shmobile/sleep-r8a7740.S        |   57 +++++++++
 4 files changed, 222 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/mach-shmobile/sleep-r8a7740.S

diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 068f1da..0568894 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -30,7 +30,7 @@ obj-$(CONFIG_SUSPEND)		+= suspend.o
 obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o
 obj-$(CONFIG_ARCH_SHMOBILE)	+= pm-rmobile.o
 obj-$(CONFIG_ARCH_SH7372)	+= pm-sh7372.o sleep-sh7372.o
-obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o sleep-r8a7740.o
 obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
 obj-$(CONFIG_ARCH_SH73A0)	+= pm-sh73a0.o
 
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index 1cf6869..5cfe5d9 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -543,6 +543,9 @@ extern void r8a7740_add_standard_devices_dt(void);
 extern void r8a7740_clock_init(u8 md_ck);
 extern void r8a7740_pinmux_init(void);
 extern void r8a7740_pm_init(void);
+extern void r8a7740_resume(void);
+extern void r8a7740_shutdown(void);
+extern void r8a7740_enter_a3sm_common(int);
 
 #ifdef CONFIG_PM
 extern void __init r8a7740_init_pm_domains(void);
diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c
index 40b87aa..fe3c867 100644
--- a/arch/arm/mach-shmobile/pm-r8a7740.c
+++ b/arch/arm/mach-shmobile/pm-r8a7740.c
@@ -8,10 +8,52 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
+#include <linux/bitrev.h>
 #include <linux/console.h>
+#include <linux/module.h>
 #include <linux/suspend.h>
+#include <linux/io.h>
+#include <asm/suspend.h>
+#include <asm/cacheflush.h>
+#include <asm/hardware/cache-l2x0.h>
 #include <mach/pm-rmobile.h>
 #include <mach/common.h>
+#include <mach/r8a7740.h>
+
+/* CPGA */
+#define PLLC01STPCR	IOMEM(0xe61500c8)
+#define SYSTBCR		IOMEM(0xe6150024)
+
+/* SYSC */
+#define STBCHR		IOMEM(0xe6180000)
+#define STBCHRB		IOMEM(0xe6180040)
+#define SPDCR		IOMEM(0xe6180008)
+#define SBAR		IOMEM(0xe6180020)
+#define SRSTFR		IOMEM(0xe61800B4)
+#define WUPSMSK		IOMEM(0xe618002c)
+#define WUPSMSK2	IOMEM(0xe6180048)
+#define WUPSFAC		IOMEM(0xe6180098)
+#define IRQCR		IOMEM(0xe618022c)
+#define IRQCR2		IOMEM(0xe6180238)
+#define IRQCR3		IOMEM(0xe6180244)
+#define IRQCR4		IOMEM(0xe6180248)
+
+/* SRSTFR flags */
+#define RAMST		(1 << 19)
+#define RCLNKA		(1 << 7)
+#define RCPRES		(1 << 5)
+#define RCWD1		(1 << 4)
+#define RPF		(1 << 0)
+
+/* INTC */
+#define ICR1A		IOMEM(0xe6900000)
+#define ICR2A		IOMEM(0xe6900004)
+#define ICR3A		IOMEM(0xe6900008)
+#define ICR4A		IOMEM(0xe690000c)
+#define INTMSK00A	IOMEM(0xe6900040)
+#define INTMSK10A	IOMEM(0xe6900044)
+#define INTMSK20A	IOMEM(0xe6900048)
+#define INTMSK30A	IOMEM(0xe690004c)
 
 #ifdef CONFIG_PM
 static int r8a7740_pd_a4s_suspend(void)
@@ -58,13 +100,129 @@ void __init r8a7740_init_pm_domains(void)
 	rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains));
 	pm_genpd_add_subdomain_names("A4S", "A3SP");
 }
-
 #endif /* CONFIG_PM */
 
 #ifdef CONFIG_SUSPEND
+static void r8a7740_set_reset_vector(unsigned long address)
+{
+	__raw_writel(address, SBAR);
+}
+
+static void r8a7740_icr_to_irqcr(unsigned long icr, u16 *irqcr1p, u16 *irqcr2p)
+{
+	u16 tmp, irqcr1, irqcr2;
+	int k;
+
+	irqcr1 = 0;
+	irqcr2 = 0;
+
+	/* convert INTCA ICR register layout to SYSC IRQCR+IRQCR2 */
+	for (k = 0; k <= 7; k++) {
+		tmp = (icr >> ((7 - k) * 4)) & 0xf;
+		irqcr1 |= (tmp & 0x03) << (k * 2);
+		irqcr2 |= (tmp >> 2) << (k * 2);
+	}
+
+	*irqcr1p = irqcr1;
+	*irqcr2p = irqcr2;
+}
+
+static void r8a7740_setup_sysc(unsigned long msk, unsigned long msk2)
+{
+	u16 irqcrx_low, irqcrx_high, irqcry_low, irqcry_high;
+	unsigned long tmp;
+
+	/* read IRQ0A -> IRQ15A mask */
+	tmp = bitrev8(__raw_readb(INTMSK00A));
+	tmp |= bitrev8(__raw_readb(INTMSK10A)) << 8;
+
+	/* setup WUPSMSK from clocks and external IRQ mask */
+	msk = (~msk & 0xc030000f) | (tmp << 4);
+	__raw_writel(msk, WUPSMSK);
+
+	/* propage level/edge trigger for external IRQ 0->15 */
+	r8a7740_icr_to_irqcr(__raw_readl(ICR1A), &irqcrx_low, &irqcry_low);
+	r8a7740_icr_to_irqcr(__raw_readl(ICR2A), &irqcrx_high, &irqcry_high);
+	__raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR);
+	__raw_writel((irqcry_high << 16) | irqcry_low, IRQCR2);
+
+	/* read IRQ16A -> IRQ31A mask */
+	tmp = bitrev8(__raw_readb(INTMSK20A));
+	tmp |= bitrev8(__raw_readb(INTMSK30A)) << 8;
+
+	/* setup WUPSMSK2 from clocks and external IRQ mask */
+	msk2 = (~msk2 & 0x00030000) | tmp;
+	__raw_writel(msk2, WUPSMSK2);
+
+	/* propage level/edge trigger for external IRQ 16->31 */
+	r8a7740_icr_to_irqcr(__raw_readl(ICR3A), &irqcrx_low, &irqcry_low);
+	r8a7740_icr_to_irqcr(__raw_readl(ICR4A), &irqcrx_high, &irqcry_high);
+	__raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR3);
+	__raw_writel((irqcry_high << 16) | irqcry_low, IRQCR4);
+}
+
+static void r8a7740_prepare_wakeup(void)
+{
+	/* clear all flags that lead to a cold boot */
+	__raw_writel(~(RAMST | RCLNKA | RCPRES | RCWD1 | RPF), SRSTFR);
+	/* indicate warm boot */
+	__raw_writel(0x80000000, STBCHRB);
+	/* clear other flags checked by internal ROM boot loader */
+	__raw_writel(0x00000000, STBCHR);
+}
+
+static int r8a7740_do_suspend(unsigned long unused)
+{
+	/*
+	 * cpu_suspend() guarantees that all data made it to the L2.
+	 * Flush it out now and disable the cache controller.
+	 */
+	outer_flush_all();
+	outer_disable();
+
+	r8a7740_shutdown();
+
+	return 0;
+}
+
+void r8a7740_enter_a3sm_common(int pllc0_on)
+{
+	u32 reg32;
+
+	if (pllc0_on)
+		__raw_writel(0, PLLC01STPCR);
+	else
+		__raw_writel(1 << 28, PLLC01STPCR);
+
+	r8a7740_set_reset_vector(__pa(r8a7740_resume));
+	r8a7740_prepare_wakeup();
+	r8a7740_setup_sysc(1 << 0, 0);
+
+	/* Activate delayed shutdown of A3SM */
+	reg32 = __raw_readl(SPDCR);
+	reg32 |= (1 << 31) | (1 << 12);
+	__raw_writel(reg32, SPDCR);
+
+	/* We activate CPU Core Standby as well here */
+	reg32 = __raw_readl(SYSTBCR);
+	reg32 |= (1 << 4);
+	__raw_writel(reg32, SYSTBCR);
+
+	/* Clear Wakeup Factors and do suspend */
+	reg32 = __raw_readl(WUPSFAC);
+	cpu_suspend(0, r8a7740_do_suspend);
+	outer_resume();
+	reg32 = __raw_readl(WUPSFAC);
+
+	/* Clear CPU Core Standby flag for other WFI instructions */
+	reg32 &= ~(1 << 4);
+	__raw_writel(reg32, SYSTBCR);
+
+}
+
 static int r8a7740_enter_suspend(suspend_state_t suspend_state)
 {
-	cpu_do_idle();
+	r8a7740_enter_a3sm_common(0);
 	return 0;
 }
 
@@ -74,7 +232,7 @@ static void r8a7740_suspend_init(void)
 }
 #else
 static void r8a7740_suspend_init(void) {}
-#endif
+#endif /* CONFIG_SUSPEND */
 
 void __init r8a7740_pm_init(void)
 {
diff --git a/arch/arm/mach-shmobile/sleep-r8a7740.S b/arch/arm/mach-shmobile/sleep-r8a7740.S
new file mode 100644
index 0000000..435531b
--- /dev/null
+++ b/arch/arm/mach-shmobile/sleep-r8a7740.S
@@ -0,0 +1,57 @@
+/*
+ * Low level sleep code for the SoC r8a7740
+ *
+ * Copyright (C) 2013 Bastian Hecht
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/memory.h>
+
+#ifdef CONFIG_SUSPEND
+
+/* r8a7740_shutdown expects L2 to be flushed */
+	.text
+ENTRY(r8a7740_shutdown)
+	/*
+	 * Clear the SCTLR.C bit to prevent further data cache
+	 * allocation. Clearing SCTLR.C would make all the data accesses
+	 * strongly ordered and would not hit the cache.
+	 */
+	mrc	p15, 0, r0, c1, c0, 0
+	bic	r0, r0, #(1 << 2)		@ Disable the C bit
+	mcr	p15, 0, r0, c1, c0, 0
+	isb
+
+	bl      v7_flush_dcache_all
+
+wfi_loop:
+	bl	cpu_v7_do_idle
+	b wfi_loop
+ENDPROC(r8a7740)
+
+	.text
+ENTRY(v7_cpu_resume)
+	bl	v7_invalidate_l1
+	b	cpu_resume
+ENDPROC(v7_cpu_resume)
+
+/*
+ * The entry point of a warm reboot, used by wakeup scenarios
+ *
+ * The CPU jumps in this case to (0xfffff000 & SBAR), so we need
+ * to align this function properly.
+ * We use a long jump into the text segment and use the physical
+ * address as the MMU is still turned off.
+ */
+	.align	12
+	.text
+ENTRY(r8a7740_resume)
+	ldr	pc, 1f
+1:	.long	v7_cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET
+ENDPROC(r8a7740_resume_core_standby)
+#endif
-- 
1.7.10.4

[PATCH 09/12] ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM

[Olof Johansson]

Hi,

On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote:
> From: Bastian Hecht <hechtb@gmail.com>
> 
> We add 2 Suspend to RAM modes:
> - A3SM PLL0 on/off:     Power domain A3SM that contains the ARM core
>                         and the 2nd level cache with either PLL0 on
>                         or off
> 
> As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
> is included here too, so CPUIdle can use both power down modes (not
> included in this patch).
> 
> The setup of the SYSC regarding the external IRQs is taken from
> pm-sh7372.c from Magnus Damm.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>

Missing S-o-b from you, Simon?

> +	.text
> +ENTRY(v7_cpu_resume)
> +	bl	v7_invalidate_l1
> +	b	cpu_resume
> +ENDPROC(v7_cpu_resume)

This is a global namespace so it'll conflict with i.MX whenever
you multiplatform enable shmobile. Might want to pick a more
unique name.


-Olof

[PATCH 09/12] ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM

[Simon Horman]

On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote:
> Hi,
> 
> On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote:
> > From: Bastian Hecht <hechtb@gmail.com>
> > 
> > We add 2 Suspend to RAM modes:
> > - A3SM PLL0 on/off:     Power domain A3SM that contains the ARM core
> >                         and the 2nd level cache with either PLL0 on
> >                         or off
> > 
> > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
> > is included here too, so CPUIdle can use both power down modes (not
> > included in this patch).
> > 
> > The setup of the SYSC regarding the external IRQs is taken from
> > pm-sh7372.c from Magnus Damm.
> > 
> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> 
> Missing S-o-b from you, Simon?

Oops sorry about that.

> > +	.text
> > +ENTRY(v7_cpu_resume)
> > +	bl	v7_invalidate_l1
> > +	b	cpu_resume
> > +ENDPROC(v7_cpu_resume)
> 
> This is a global namespace so it'll conflict with i.MX whenever
> you multiplatform enable shmobile. Might want to pick a more
> unique name.

Bastian, could you suggest an alternate name?

[PATCH 09/12] ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM

[Bastian Hecht]

2013/5/28 Simon Horman <horms@verge.net.au>:
> On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote:
>> Hi,
>>
>> On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote:
>> > From: Bastian Hecht <hechtb@gmail.com>
>> >
>> > We add 2 Suspend to RAM modes:
>> > - A3SM PLL0 on/off:     Power domain A3SM that contains the ARM core
>> >                         and the 2nd level cache with either PLL0 on
>> >                         or off
>> >
>> > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
>> > is included here too, so CPUIdle can use both power down modes (not
>> > included in this patch).
>> >
>> > The setup of the SYSC regarding the external IRQs is taken from
>> > pm-sh7372.c from Magnus Damm.
>> >
>> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
>>
>> Missing S-o-b from you, Simon?
>
> Oops sorry about that.
>
>> > +   .text
>> > +ENTRY(v7_cpu_resume)
>> > +   bl      v7_invalidate_l1
>> > +   b       cpu_resume
>> > +ENDPROC(v7_cpu_resume)
>>
>> This is a global namespace so it'll conflict with i.MX whenever
>> you multiplatform enable shmobile. Might want to pick a more
>> unique name.
>
> Bastian, could you suggest an alternate name?

It should really be a temporary thing, as this should be handled in
the generic ARM code. So how about:

r8a7740_cpu_resume()

Cheers,

 Bastian

[PATCH 09/12] ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM

[Simon Horman]

On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote:
> Hi,
> 
> On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote:
> > From: Bastian Hecht <hechtb@gmail.com>
> > 
> > We add 2 Suspend to RAM modes:
> > - A3SM PLL0 on/off:     Power domain A3SM that contains the ARM core
> >                         and the 2nd level cache with either PLL0 on
> >                         or off
> > 
> > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
> > is included here too, so CPUIdle can use both power down modes (not
> > included in this patch).
> > 
> > The setup of the SYSC regarding the external IRQs is taken from
> > pm-sh7372.c from Magnus Damm.
> > 
> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> 
> Missing S-o-b from you, Simon?
> 
> > +	.text
> > +ENTRY(v7_cpu_resume)
> > +	bl	v7_invalidate_l1
> > +	b	cpu_resume
> > +ENDPROC(v7_cpu_resume)
> 
> This is a global namespace so it'll conflict with i.MX whenever
> you multiplatform enable shmobile. Might want to pick a more
> unique name.

I have decided to drop this and related cpuidle and suspend-to-ram
patches for r8a7740 after discussion with Magnus.

[PATCH 09/12] ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM

[Bastian Hecht]

Hi Simon,

quite some effort has gone into this patch. People from ARM Ltd. have
discussed issues about the shutdown in other threads and I spent quite
some time on it. What are the problems? Are we concerned about the
stability of our system? The CPUIdle feature shut down my r8a7740 on
the Armadillo board more than 1 million times successfully. Further
CPUIdle is deselected as default config anyway. And single
suspend/resume cycles should be even less problematic.

Thanks,

 Bastian


2013/6/4 Simon Horman <horms@verge.net.au>:
> On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote:
>> Hi,
>>
>> On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote:
>> > From: Bastian Hecht <hechtb@gmail.com>
>> >
>> > We add 2 Suspend to RAM modes:
>> > - A3SM PLL0 on/off:     Power domain A3SM that contains the ARM core
>> >                         and the 2nd level cache with either PLL0 on
>> >                         or off
>> >
>> > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
>> > is included here too, so CPUIdle can use both power down modes (not
>> > included in this patch).
>> >
>> > The setup of the SYSC regarding the external IRQs is taken from
>> > pm-sh7372.c from Magnus Damm.
>> >
>> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
>>
>> Missing S-o-b from you, Simon?
>>
>> > +   .text
>> > +ENTRY(v7_cpu_resume)
>> > +   bl      v7_invalidate_l1
>> > +   b       cpu_resume
>> > +ENDPROC(v7_cpu_resume)
>>
>> This is a global namespace so it'll conflict with i.MX whenever
>> you multiplatform enable shmobile. Might want to pick a more
>> unique name.
>
> I have decided to drop this and related cpuidle and suspend-to-ram
> patches for r8a7740 after discussion with Magnus.

[PATCH 09/12] ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM

[Simon Horman]

Hi Bastian,

I wasn't implying that I have rejected these patches outright,
I apologise if that is the way that I cam across. Rather, that
they seem to need a little more work.

* ARM: shmobile: r8a7740: Add CPUIdle

  There was some discussion in a different sub-thread
  that this should be Acked by Rafael and possibly go through
  his tree. Could you talk with Rafael about his feelings
  with regards to both of these.

* ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM

  I'm unclear if this is also in Rafael's domain or not,
  but as it depends on the first patch it seems as well
  to talk post it to Rafael with the other patch for his
  consideration.

  This patch also seems to have some minor problems.

  1. When you repost could you please squash in the fix
     provided by Arnd as "ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM".

  2. As noticed by Olof, v7_cpu_resume needs a different name.
     I believe you have already proposed a trivial fix for this.

On Tue, Jun 04, 2013 at 05:34:30PM +0200, Bastian Hecht wrote:
> Hi Simon,
> 
> quite some effort has gone into this patch. People from ARM Ltd. have
> discussed issues about the shutdown in other threads and I spent quite
> some time on it. What are the problems? Are we concerned about the
> stability of our system? The CPUIdle feature shut down my r8a7740 on
> the Armadillo board more than 1 million times successfully. Further
> CPUIdle is deselected as default config anyway. And single
> suspend/resume cycles should be even less problematic.
> 
> Thanks,
> 
>  Bastian
> 
> 
> 2013/6/4 Simon Horman <horms@verge.net.au>:
> > On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote:
> >> Hi,
> >>
> >> On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote:
> >> > From: Bastian Hecht <hechtb@gmail.com>
> >> >
> >> > We add 2 Suspend to RAM modes:
> >> > - A3SM PLL0 on/off:     Power domain A3SM that contains the ARM core
> >> >                         and the 2nd level cache with either PLL0 on
> >> >                         or off
> >> >
> >> > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on
> >> > is included here too, so CPUIdle can use both power down modes (not
> >> > included in this patch).
> >> >
> >> > The setup of the SYSC regarding the external IRQs is taken from
> >> > pm-sh7372.c from Magnus Damm.
> >> >
> >> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> >>
> >> Missing S-o-b from you, Simon?
> >>
> >> > +   .text
> >> > +ENTRY(v7_cpu_resume)
> >> > +   bl      v7_invalidate_l1
> >> > +   b       cpu_resume
> >> > +ENDPROC(v7_cpu_resume)
> >>
> >> This is a global namespace so it'll conflict with i.MX whenever
> >> you multiplatform enable shmobile. Might want to pick a more
> >> unique name.
> >
> > I have decided to drop this and related cpuidle and suspend-to-ram
> > patches for r8a7740 after discussion with Magnus.
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

[PATCH 10/12] ARM: shmobile: r8a7740: Add CPUIdle

[Simon Horman]

From: Bastian Hecht <hechtb@gmail.com>

We make use of the r8a7740 Suspend To Ram code to plug together a
CPUIdle driver.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 arch/arm/mach-shmobile/Makefile               |    2 +-
 arch/arm/mach-shmobile/cpuidle-r8a7740.c      |   62 +++++++++++++++++++++++++
 arch/arm/mach-shmobile/include/mach/r8a7740.h |    1 +
 arch/arm/mach-shmobile/pm-r8a7740.c           |    1 +
 4 files changed, 65 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-shmobile/cpuidle-r8a7740.c

diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 0568894..2852dcf 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -30,7 +30,7 @@ obj-$(CONFIG_SUSPEND)		+= suspend.o
 obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o
 obj-$(CONFIG_ARCH_SHMOBILE)	+= pm-rmobile.o
 obj-$(CONFIG_ARCH_SH7372)	+= pm-sh7372.o sleep-sh7372.o
-obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o sleep-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o sleep-r8a7740.o cpuidle-r8a7740.o
 obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
 obj-$(CONFIG_ARCH_SH73A0)	+= pm-sh73a0.o
 
diff --git a/arch/arm/mach-shmobile/cpuidle-r8a7740.c b/arch/arm/mach-shmobile/cpuidle-r8a7740.c
new file mode 100644
index 0000000..48c7a6c
--- /dev/null
+++ b/arch/arm/mach-shmobile/cpuidle-r8a7740.c
@@ -0,0 +1,62 @@
+/*
+ * CPUIdle code for SoC r8a7740
+ *
+ * Copyright (C) 2013 Bastian Hecht
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/cpuidle.h>
+#include <linux/module.h>
+#include <asm/cpuidle.h>
+#include <mach/common.h>
+#include <mach/r8a7740.h>
+
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_CPU_IDLE)
+static int r8a7740_enter_a3sm_pll_on(struct cpuidle_device *dev,
+					struct cpuidle_driver *drv, int index)
+{
+	r8a7740_enter_a3sm_common(1);
+	return 1;
+}
+
+static int r8a7740_enter_a3sm_pll_off(struct cpuidle_device *dev,
+					struct cpuidle_driver *drv, int index)
+{
+	r8a7740_enter_a3sm_common(0);
+	return 2;
+}
+
+static struct cpuidle_driver r8a7740_cpuidle_driver = {
+	.name			= "r8a7740_cpuidle",
+	.owner			= THIS_MODULE,
+	.en_core_tk_irqen	= 1,
+	.state_count		= 3,
+	.safe_state_index	= 0, /* C1 */
+	.states[0] = ARM_CPUIDLE_WFI_STATE,
+	.states[1] = {
+		.name = "C2",
+		.desc = "A3SM PLL ON",
+		.exit_latency = 40,
+		.target_residency = 30 + 40,
+		.flags = CPUIDLE_FLAG_TIME_VALID,
+		.enter = r8a7740_enter_a3sm_pll_on,
+	},
+	.states[2] = {
+		.name = "C3",
+		.desc = "A3SM PLL OFF",
+		.exit_latency = 120,
+		.target_residency = 30 + 120,
+		.flags = CPUIDLE_FLAG_TIME_VALID,
+		.enter = r8a7740_enter_a3sm_pll_off,
+	},
+};
+
+void r8a7740_cpuidle_init(void)
+{
+	shmobile_cpuidle_set_driver(&r8a7740_cpuidle_driver);
+}
+#else
+void r8a7740_cpuidle_init(void) {}
+#endif
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index 5cfe5d9..3b538e3 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -545,6 +545,7 @@ extern void r8a7740_pinmux_init(void);
 extern void r8a7740_pm_init(void);
 extern void r8a7740_resume(void);
 extern void r8a7740_shutdown(void);
+extern void r8a7740_cpuidle_init(void);
 extern void r8a7740_enter_a3sm_common(int);
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c
index fe3c867..2f196bd 100644
--- a/arch/arm/mach-shmobile/pm-r8a7740.c
+++ b/arch/arm/mach-shmobile/pm-r8a7740.c
@@ -237,4 +237,5 @@ static void r8a7740_suspend_init(void) {}
 void __init r8a7740_pm_init(void)
 {
 	r8a7740_suspend_init();
+	r8a7740_cpuidle_init();
 }
-- 
1.7.10.4

[PATCH 10/12] ARM: shmobile: r8a7740: Add CPUIdle

[Daniel Lezcano]

On 05/27/2013 10:59 AM, Simon Horman wrote:
> From: Bastian Hecht <hechtb@gmail.com>
> 
> We make use of the r8a7740 Suspend To Ram code to plug together a
> CPUIdle driver.
> 
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> ---

Shouldn't it go through Rafael's tree ? Or does the patch contains some
dependencies on a code only visible in the ARM tree ?

>  arch/arm/mach-shmobile/Makefile               |    2 +-
>  arch/arm/mach-shmobile/cpuidle-r8a7740.c      |   62 +++++++++++++++++++++++++
>  arch/arm/mach-shmobile/include/mach/r8a7740.h |    1 +
>  arch/arm/mach-shmobile/pm-r8a7740.c           |    1 +
>  4 files changed, 65 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/mach-shmobile/cpuidle-r8a7740.c
> 
> diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
> index 0568894..2852dcf 100644
> --- a/arch/arm/mach-shmobile/Makefile
> +++ b/arch/arm/mach-shmobile/Makefile
> @@ -30,7 +30,7 @@ obj-$(CONFIG_SUSPEND)		+= suspend.o
>  obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o
>  obj-$(CONFIG_ARCH_SHMOBILE)	+= pm-rmobile.o
>  obj-$(CONFIG_ARCH_SH7372)	+= pm-sh7372.o sleep-sh7372.o
> -obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o sleep-r8a7740.o
> +obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o sleep-r8a7740.o cpuidle-r8a7740.o
>  obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
>  obj-$(CONFIG_ARCH_SH73A0)	+= pm-sh73a0.o
>  
> diff --git a/arch/arm/mach-shmobile/cpuidle-r8a7740.c b/arch/arm/mach-shmobile/cpuidle-r8a7740.c
> new file mode 100644
> index 0000000..48c7a6c
> --- /dev/null
> +++ b/arch/arm/mach-shmobile/cpuidle-r8a7740.c
> @@ -0,0 +1,62 @@
> +/*
> + * CPUIdle code for SoC r8a7740
> + *
> + * Copyright (C) 2013 Bastian Hecht
> + *
> + * This file is subject to the terms and conditions of the GNU General Public
> + * License.  See the file "COPYING" in the main directory of this archive
> + * for more details.
> + */
> +#include <linux/cpuidle.h>
> +#include <linux/module.h>
> +#include <asm/cpuidle.h>
> +#include <mach/common.h>
> +#include <mach/r8a7740.h>
> +
> +#if defined(CONFIG_SUSPEND) && defined(CONFIG_CPU_IDLE)
> +static int r8a7740_enter_a3sm_pll_on(struct cpuidle_device *dev,
> +					struct cpuidle_driver *drv, int index)
> +{
> +	r8a7740_enter_a3sm_common(1);
> +	return 1;
> +}
> +
> +static int r8a7740_enter_a3sm_pll_off(struct cpuidle_device *dev,
> +					struct cpuidle_driver *drv, int index)
> +{
> +	r8a7740_enter_a3sm_common(0);
> +	return 2;
> +}
> +
> +static struct cpuidle_driver r8a7740_cpuidle_driver = {
> +	.name			= "r8a7740_cpuidle",
> +	.owner			= THIS_MODULE,
> +	.en_core_tk_irqen	= 1,
> +	.state_count		= 3,
> +	.safe_state_index	= 0, /* C1 */
> +	.states[0] = ARM_CPUIDLE_WFI_STATE,
> +	.states[1] = {
> +		.name = "C2",
> +		.desc = "A3SM PLL ON",
> +		.exit_latency = 40,
> +		.target_residency = 30 + 40,
> +		.flags = CPUIDLE_FLAG_TIME_VALID,
> +		.enter = r8a7740_enter_a3sm_pll_on,
> +	},
> +	.states[2] = {
> +		.name = "C3",
> +		.desc = "A3SM PLL OFF",
> +		.exit_latency = 120,
> +		.target_residency = 30 + 120,
> +		.flags = CPUIDLE_FLAG_TIME_VALID,
> +		.enter = r8a7740_enter_a3sm_pll_off,
> +	},
> +};
> +
> +void r8a7740_cpuidle_init(void)
> +{
> +	shmobile_cpuidle_set_driver(&r8a7740_cpuidle_driver);
> +}
> +#else
> +void r8a7740_cpuidle_init(void) {}
> +#endif
> diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
> index 5cfe5d9..3b538e3 100644
> --- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
> +++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
> @@ -545,6 +545,7 @@ extern void r8a7740_pinmux_init(void);
>  extern void r8a7740_pm_init(void);
>  extern void r8a7740_resume(void);
>  extern void r8a7740_shutdown(void);
> +extern void r8a7740_cpuidle_init(void);
>  extern void r8a7740_enter_a3sm_common(int);
>  
>  #ifdef CONFIG_PM
> diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c
> index fe3c867..2f196bd 100644
> --- a/arch/arm/mach-shmobile/pm-r8a7740.c
> +++ b/arch/arm/mach-shmobile/pm-r8a7740.c
> @@ -237,4 +237,5 @@ static void r8a7740_suspend_init(void) {}
>  void __init r8a7740_pm_init(void)
>  {
>  	r8a7740_suspend_init();
> +	r8a7740_cpuidle_init();
>  }
> 


-- 
 <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

[PATCH 10/12] ARM: shmobile: r8a7740: Add CPUIdle

[Olof Johansson]

On Mon, May 27, 2013 at 01:03:31PM +0200, Daniel Lezcano wrote:
> On 05/27/2013 10:59 AM, Simon Horman wrote:
> > From: Bastian Hecht <hechtb@gmail.com>
> > 
> > We make use of the r8a7740 Suspend To Ram code to plug together a
> > CPUIdle driver.
> > 
> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> > ---
> 
> Shouldn't it go through Rafael's tree ? Or does the patch contains some
> dependencies on a code only visible in the ARM tree ?

Missing S-o-b from Simon. But this patch clearly builds on the preceding
one in the series, so merging them independently might not make much
sense. Getting an ack from Rafael would be nice though.

I was going to say that it should probably go under drivers/cpuidle as
well, but that just seems silly -- there is practically no code to share
with any other platform in this small driver, AND there's not really
any subsystem-internal data exposed. So it might just make more sense
to keep it under arch/arm instead.

Likewise, looking at the kirkwood and calxeda drivers under drivers/cpuidle,
I'm wondering why we thought it was a good idea to merge them there, besides
getting caught up in the "nothing can live under arch/arm any more" frenzy.


-Olof

[PATCH 10/12] ARM: shmobile: r8a7740: Add CPUIdle

[Daniel Lezcano]

On 05/28/2013 05:54 AM, Olof Johansson wrote:
> On Mon, May 27, 2013 at 01:03:31PM +0200, Daniel Lezcano wrote:
>> On 05/27/2013 10:59 AM, Simon Horman wrote:
>>> From: Bastian Hecht <hechtb@gmail.com>
>>>
>>> We make use of the r8a7740 Suspend To Ram code to plug together a
>>> CPUIdle driver.
>>>
>>> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
>>> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
>>> ---
>>
>> Shouldn't it go through Rafael's tree ? Or does the patch contains some
>> dependencies on a code only visible in the ARM tree ?
> 
> Missing S-o-b from Simon. But this patch clearly builds on the preceding
> one in the series, so merging them independently might not make much
> sense. Getting an ack from Rafael would be nice though.

I was not suggesting to put the driver in the drivers/cpuidle directory
but to merge the driver through Rafael's tree as we decided some weeks
ago [1]. Although having the drivers all over the place does not help to
consolidate the code, so moving them little by little to drivers/cpuidle
makes sense but this is part of another work.

> I was going to say that it should probably go under drivers/cpuidle as
> well, but that just seems silly -- there is practically no code to share
> with any other platform in this small driver, AND there's not really
> any subsystem-internal data exposed. So it might just make more sense
> to keep it under arch/arm instead.
> 
> Likewise, looking at the kirkwood and calxeda drivers under drivers/cpuidle,
> I'm wondering why we thought it was a good idea to merge them there, besides
> getting caught up in the "nothing can live under arch/arm any more" frenzy.

Having the drivers in the drivers/cpuidle directory like drivers/cpufreq
will help to keep a consistency with the code and a single entry point
for upstream and review.

Thanks.
  -- Daniel

[1] https://patchwork.kernel.org/patch/2492841/

-- 
 <http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

[PATCH 10/12] ARM: shmobile: r8a7740: Add CPUIdle

[Simon Horman]

On Mon, May 27, 2013 at 08:54:46PM -0700, Olof Johansson wrote:
> On Mon, May 27, 2013 at 01:03:31PM +0200, Daniel Lezcano wrote:
> > On 05/27/2013 10:59 AM, Simon Horman wrote:
> > > From: Bastian Hecht <hechtb@gmail.com>
> > > 
> > > We make use of the r8a7740 Suspend To Ram code to plug together a
> > > CPUIdle driver.
> > > 
> > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
> > > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> > > ---
> > 
> > Shouldn't it go through Rafael's tree ? Or does the patch contains some
> > dependencies on a code only visible in the ARM tree ?
> 
> Missing S-o-b from Simon. But this patch clearly builds on the preceding
> one in the series, so merging them independently might not make much
> sense. Getting an ack from Rafael would be nice though.
> 
> I was going to say that it should probably go under drivers/cpuidle as
> well, but that just seems silly -- there is practically no code to share
> with any other platform in this small driver, AND there's not really
> any subsystem-internal data exposed. So it might just make more sense
> to keep it under arch/arm instead.
> 
> Likewise, looking at the kirkwood and calxeda drivers under drivers/cpuidle,
> I'm wondering why we thought it was a good idea to merge them there, besides
> getting caught up in the "nothing can live under arch/arm any more" frenzy.

After discussion with Magnus I have decided to drop these changes.
We can revisit them for a future release.

[PATCH 11/12] ARM: shmobile: fix sleep-r8a7740.S miscompiles

[Simon Horman]

From: Arnd Bergmann <arnd@arndb.de>

The newly added sleep-r8a7740.S file in shmobile does not
actually build because of renamed symbols.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/sleep-r8a7740.S |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/sleep-r8a7740.S b/arch/arm/mach-shmobile/sleep-r8a7740.S
index 435531b..982eacb 100644
--- a/arch/arm/mach-shmobile/sleep-r8a7740.S
+++ b/arch/arm/mach-shmobile/sleep-r8a7740.S
@@ -32,7 +32,7 @@ ENTRY(r8a7740_shutdown)
 wfi_loop:
 	bl	cpu_v7_do_idle
 	b wfi_loop
-ENDPROC(r8a7740)
+ENDPROC(r8a7740_shutdown)
 
 	.text
 ENTRY(v7_cpu_resume)
@@ -53,5 +53,5 @@ ENDPROC(v7_cpu_resume)
 ENTRY(r8a7740_resume)
 	ldr	pc, 1f
 1:	.long	v7_cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET
-ENDPROC(r8a7740_resume_core_standby)
+ENDPROC(r8a7740_resume)
 #endif
-- 
1.7.10.4

[PATCH 12/12] ARM: shmobile: clock-r8a7740: add TPU PWM support

[Simon Horman]

From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/mach-shmobile/clock-r8a7740.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index b12c476..6ad4640 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -461,7 +461,7 @@ enum {
 
 	MSTP329, MSTP328, MSTP323, MSTP320,
 	MSTP314, MSTP313, MSTP312,
-	MSTP309,
+	MSTP309, MSTP304,
 
 	MSTP416, MSTP415, MSTP407, MSTP406,
 
@@ -499,6 +499,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 13, 0), /* SDHI1 */
 	[MSTP312] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 12, 0), /* MMC */
 	[MSTP309] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3,  9, 0), /* GEther */
+	[MSTP304] = SH_CLK_MSTP32(&div4_clks[DIV4_CP],	SMSTPCR3,  4, 0), /* TPU0 */
 
 	[MSTP416] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR4, 16, 0), /* USBHOST */
 	[MSTP415] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR4, 15, 0), /* SDHI2 */
@@ -596,6 +597,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
 	CLKDEV_DEV_ID("sh-eth",			&mstp_clks[MSTP309]),
 	CLKDEV_DEV_ID("e9a00000.sh-eth",	&mstp_clks[MSTP309]),
+	CLKDEV_DEV_ID("renesas_tpu_pwm",	&mstp_clks[MSTP304]),
 
 	CLKDEV_DEV_ID("sh_mobile_sdhi.2",	&mstp_clks[MSTP415]),
 	CLKDEV_DEV_ID("e6870000.sdhi",          &mstp_clks[MSTP415]),
-- 
1.7.10.4

[GIT PULL] Renesas ARM based r8a7740 SoC updates for v3.11

[Olof Johansson]

Hi Simon,

On Mon, May 27, 2013 at 05:59:41PM +0900, Simon Horman wrote:
> Hi Arnd, Hi Olof,
> 
> The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75:
> 
>   Linux 3.10-rc2 (2013-05-20 14:37:38 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-r8a7740-for-v3.11
> 
> for you to fetch changes up to 0a9e1c1eef2b050a16685952ce20575348b94d5c:
> 
>   ARM: shmobile: clock-r8a7740: add TPU PWM support (2013-05-27 17:45:27 +0900)
> 
> ----------------------------------------------------------------
> Renesas ARM based r8a7740 SoC updates for v3.11
> 
> * Clean-ups from Kuninori Morimoto, Magnus Damm and Laurent Pinchart.
> * Extended clock coverage by Bastian Hecht.
> * Support for initialising GIC from OF by Bastian Hecht.
> * Support for reference DT initialisation by Bastian Hecht.
>   This is used in conjunction with other changes initialise
>   the Armadillo 800 eva board in DT as much as possible.
> * Suspend to RAM and CPUIdle support by Bastian Hecht
> * Build fix for fallout by Arnd Bergmann from suspend to RAM change.

So, looking at this branch, I think you need to reorganize your patches a bit.
You seem to have fallen back to the case of only sorting patches by what
Renesas SoC they are for, while they are clearly of different kinds such that
we would prefer to see them sorted differently for arm-soc.

For example, the fix from Arnd should go in a shared shmobile fixes branch,
ideally. Some of the DT initialization should maybe go in a separate
(shmobile-shared) DT branch. Clock, suspend/resume and other patches can go in
a shared SoC branch across all of shmobile though.

Care to respin? I had a handful of comments on the patches as well, and I'll
continue to look at some of the other ones.

Since you'll have to respin, we might as well see the reshuffling into shared
shmobile branches, so I'll drop the three merges I had already done of
SoC-specific branches. I'll follow up on the ones I claimed to have merged.
None had been pushed out anyway.


Regards,

-Olof

[GIT PULL] Renesas ARM based r8a7740 SoC updates for v3.11

[Simon Horman]

On Mon, May 27, 2013 at 08:58:48PM -0700, Olof Johansson wrote:
> Hi Simon,
> 
> On Mon, May 27, 2013 at 05:59:41PM +0900, Simon Horman wrote:
> > Hi Arnd, Hi Olof,
> > 
> > The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75:
> > 
> >   Linux 3.10-rc2 (2013-05-20 14:37:38 -0700)
> > 
> > are available in the git repository at:
> > 
> >   git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-r8a7740-for-v3.11
> > 
> > for you to fetch changes up to 0a9e1c1eef2b050a16685952ce20575348b94d5c:
> > 
> >   ARM: shmobile: clock-r8a7740: add TPU PWM support (2013-05-27 17:45:27 +0900)
> > 
> > ----------------------------------------------------------------
> > Renesas ARM based r8a7740 SoC updates for v3.11
> > 
> > * Clean-ups from Kuninori Morimoto, Magnus Damm and Laurent Pinchart.
> > * Extended clock coverage by Bastian Hecht.
> > * Support for initialising GIC from OF by Bastian Hecht.
> > * Support for reference DT initialisation by Bastian Hecht.
> >   This is used in conjunction with other changes initialise
> >   the Armadillo 800 eva board in DT as much as possible.
> > * Suspend to RAM and CPUIdle support by Bastian Hecht
> > * Build fix for fallout by Arnd Bergmann from suspend to RAM change.
> 
> So, looking at this branch, I think you need to reorganize your patches a bit.
> You seem to have fallen back to the case of only sorting patches by what
> Renesas SoC they are for, while they are clearly of different kinds such that
> we would prefer to see them sorted differently for arm-soc.
> 
> For example, the fix from Arnd should go in a shared shmobile fixes branch,
> ideally. Some of the DT initialization should maybe go in a separate
> (shmobile-shared) DT branch. Clock, suspend/resume and other patches can go in
> a shared SoC branch across all of shmobile though.
> 
> Care to respin? I had a handful of comments on the patches as well, and I'll
> continue to look at some of the other ones.
> 
> Since you'll have to respin, we might as well see the reshuffling into shared
> shmobile branches, so I'll drop the three merges I had already done of
> SoC-specific branches. I'll follow up on the ones I claimed to have merged.
> None had been pushed out anyway.

Sure, I will re-spin and try to re-arange my branches as you describe above.