From: monstr@monstr.eu (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [GIT PULL v2] arm-soc: Xilinx zynq clock changes for v3.11
Date: Thu, 06 Jun 2013 11:00:58 +0200 [thread overview]
Message-ID: <51B04FCA.1090905@monstr.eu> (raw)
In-Reply-To: <20130601234708.21525.1684@quantum>
Hi Arnd and Olof,
please pull the following changes to your arm-soc tree.
This is the second pull request based on our discussion with Mike
I have added Mike's ACK to all patches.
Thanks,
Michal
The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75:
Linux 3.10-rc2 (2013-05-20 14:37:38 -0700)
are available in the git repository at:
git://git.xilinx.com/linux-xlnx.git tags/zynq-clk-for-3.11
for you to fetch changes up to 97c4e87d45498fb4d18c995721bba72345a7d257:
clk: zynq: Remove deprecated clock code (2013-05-27 09:21:49 +0200)
----------------------------------------------------------------
arm: Xilinx Zynq clock changes for v3.11
Change Xilinx Zynq DT clock description which
reflects logical abstraction of Zynq's clock tree.
- Refactor PLL driver
- Use new clock controller driver
- Change timer and uart drivers
----------------------------------------------------------------
Soren Brinkmann (4):
clk: zynq: Factor out PLL driver
clk: zynq: Add clock controller driver
arm: zynq: Migrate platform to clock controller
clk: zynq: Remove deprecated clock code
Documentation/devicetree/bindings/clock/zynq-7000.txt | 123 +++++++---
arch/arm/boot/dts/zynq-7000.dtsi | 71 ++----
arch/arm/boot/dts/zynq-zc702.dts | 4 -
arch/arm/mach-zynq/slcr.c | 2 +-
drivers/clk/Makefile | 2 +-
drivers/clk/clk-zynq.c | 378 -------------------------------
drivers/clk/zynq/Makefile | 3 +
drivers/clk/zynq/clkc.c | 533 ++++++++++++++++++++++++++++++++++++++++++++
drivers/clk/zynq/pll.c | 235 +++++++++++++++++++
drivers/clocksource/cadence_ttc_timer.c | 23 +-
drivers/tty/serial/xilinx_uartps.c | 85 +++++--
include/linux/clk/zynq.h | 8 +-
12 files changed, 972 insertions(+), 495 deletions(-)
delete mode 100644 drivers/clk/clk-zynq.c
create mode 100644 drivers/clk/zynq/Makefile
create mode 100644 drivers/clk/zynq/clkc.c
create mode 100644 drivers/clk/zynq/pll.c
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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next prev parent reply other threads:[~2013-06-06 9:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-27 7:50 [GIT PULL] arm-soc: Xilinx zynq clock changes for v3.11 Michal Simek
2013-05-30 11:28 ` Michal Simek
2013-06-01 5:19 ` Olof Johansson
2013-06-01 5:19 ` Olof Johansson
2013-06-01 23:47 ` Mike Turquette
2013-06-03 7:49 ` Michal Simek
2013-06-06 9:00 ` Michal Simek [this message]
2013-06-08 0:03 ` [GIT PULL v2] " Olof Johansson
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