[PATCH 1/2] ARM: OMAP2+: hwmod: rt address space index for DT

[PATCH 1/2] ARM: OMAP2+: hwmod: rt address space index for DT

[Afzal Mohammed]

Address space is being removed from hwmod database and DT information
in <reg> property is being used. Currently the 0th index of device
address space is used to map for register target address. This is not
always true, eg. cpgmac has it's sysconfig in second address space.

Handle it by specifying index of device address space to be used for
register target. As default value of this field would be zero with
static initialization, existing behaviour of using first address space
for register target while using DT would be kept as such.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c | 2 +-
 arch/arm/mach-omap2/omap_hwmod.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 7341eff..7f4db12 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2386,7 +2386,7 @@ static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
 
 		np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh);
 		if (np)
-			va_start = of_iomap(np, 0);
+			va_start = of_iomap(np, oh->mpu_rt_idx);
 	} else {
 		va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
 	}
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index aab33fd..29f7687 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -568,6 +568,7 @@ struct omap_hwmod_link {
  * @voltdm: pointer to voltage domain (filled in at runtime)
  * @dev_attr: arbitrary device attributes that can be passed to the driver
  * @_sysc_cache: internal-use hwmod flags
+ * @mpu_rt_idx: index of device address space for register target (for DT boot)
  * @_mpu_rt_va: cached register target start address (internal use)
  * @_mpu_port: cached MPU register target slave (internal use)
  * @opt_clks_cnt: number of @opt_clks
@@ -612,6 +613,7 @@ struct omap_hwmod {
 	struct list_head		slave_ports; /* connect to *_TA */
 	void				*dev_attr;
 	u32				_sysc_cache;
+	int				mpu_rt_idx;
 	void __iomem			*_mpu_rt_va;
 	spinlock_t			_lock;
 	struct list_head		node;
-- 
1.8.3.1

[PATCH 2/2] ARM: OMAP2+: hwmod: AM335x: fix cpgmac address space

[Afzal Mohammed]

Register target address to be used for cpgmac is the second device
address space. By default, hwmod picks first address space (0th index)
for register target.

With removal of address space from hwmod and using DT instead, cpgmac
is getting wrong address space for register target.

Fix it by indicating the address space to be used for register target.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 28bbd56..7a9b492 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -562,6 +562,7 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = {
 	.clkdm_name	= "cpsw_125mhz_clkdm",
 	.flags		= (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
 	.main_clk	= "cpsw_125mhz_gclk",
+	.mpu_rt_idx	= 1,
 	.prcm		= {
 		.omap4	= {
 			.clkctrl_offs	= AM33XX_CM_PER_CPGMAC0_CLKCTRL_OFFSET,
-- 
1.8.3.1

[PATCH 2/2] ARM: OMAP2+: hwmod: AM335x: fix cpgmac address space

[Mugunthan V N]

On 7/5/2013 8:43 PM, Afzal Mohammed wrote:
> Register target address to be used for cpgmac is the second device
> address space. By default, hwmod picks first address space (0th index)
> for register target.
>
> With removal of address space from hwmod and using DT instead, cpgmac
> is getting wrong address space for register target.
>
> Fix it by indicating the address space to be used for register target.
>
> Signed-off-by: Afzal Mohammed <afzal@ti.com>
I have tested this patch and it's needed when we have CPSW Ethernet built-in to
go to low power state.

Tested-by: Mugunthan V N <mugunthanvnm@ti.com>

Regards
Mugunthan V N

[PATCH 1/2] ARM: OMAP2+: hwmod: rt address space index for DT

[Afzal Mohammed]

Hi Paul, Benoit,

On 7/5/2013 8:43 PM, Afzal Mohammed wrote:

> Address space is being removed from hwmod database and DT information
> in <reg> property is being used. Currently the 0th index of device
> address space is used to map for register target address. This is not
> always true, eg. cpgmac has it's sysconfig in second address space.
>
> Handle it by specifying index of device address space to be used for
> register target. As default value of this field would be zero with
> static initialization, existing behaviour of using first address space
> for register target while using DT would be kept as such.

This series is required to fix the wrong register target address being 
picked up by hwmod for cpgmac on am335x.

Issue happened during last merge window cleanup, where address space was 
removed from hwmod, and in turn DTS was relied upon for address 
space(Earlier having the address space in hwmod did not cause any issue 
as 'ADDR_TYPE_RT' was used to specify proper address space index).

Please help this series reach mainline for v3.11

Regards
Afzal

[PATCH 1/2] ARM: OMAP2+: hwmod: rt address space index for DT

[Mugunthan V N]

On 7/5/2013 8:43 PM, Afzal Mohammed wrote:
> Address space is being removed from hwmod database and DT information
> in <reg> property is being used. Currently the 0th index of device
> address space is used to map for register target address. This is not
> always true, eg. cpgmac has it's sysconfig in second address space.
>
> Handle it by specifying index of device address space to be used for
> register target. As default value of this field would be zero with
> static initialization, existing behaviour of using first address space
> for register target while using DT would be kept as such.
>
> Signed-off-by: Afzal Mohammed <afzal@ti.com>
I have tested this patch and it's needed when we have CPSW Ethernet built-in to
go to low power state.

Tested-by: Mugunthan V N <mugunthanvnm@ti.com>

Regards
Mugunthan V N