* [PATCH v3 0/9] DRA7xx core support
@ 2013-08-04 16:27 Rajendra Nayak
2013-08-04 16:27 ` [PATCH v3 1/9] ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra Rajendra Nayak
` (9 more replies)
0 siblings, 10 replies; 16+ messages in thread
From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw)
To: linux-arm-kernel
Changes in v3:
-1- Dropped some clock/dpll framework builds for dra7
-2- Added all instances of IPs in dtsi file
-3- dtsi does a 'disabled' by default and dts enables as needed
-4- soc_is_dra7xx() based on DT compatible instead of using ID code
Changes in v2:
-1- Fixed minor changelog details
-2- Dropped the SRAM support patch since we need to move to drivers/misc/sram.c
-3- Added DTS update patches to this series which were earlier posted as
part of the data series (Since they don't have much objections as against the
other in-kernel data files)
-4- Updated the EVM dts file with pin config details for uart/mcspi and i2c
DRA7xx based SoCs' are high-performance, infotainment application devices,
based on enhanced OMAP architecture integrated on a 28nm
technology.
The DRA7xx family is composed of DRA75x and DRA74x devices.
The current device for which the patches add support is the
DRA752 SoC.
Most of the core IPs are similar to those found on the OMAP5
devices, including the dual cortex-A15 based MPU subsystem,
which has helped quite some reuse from existing OMAP5 support.
This series contains only core support patches and none of
the PRCM and hwmod data needed for the device to boot.
The bootloader support for the platform is already available
in mainline u-boot.
The patches posted in this series are available at:
git://github.com/rrnayak/linux.git for-3.12/dra-core-v3
The patches (including the ones for in-kernel data) which boot
on dra7xx evm are available at:
t://github.com/rrnayak/linux.git out-of-tree/dra-integrated-v3
R Sricharan (8):
ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra
ARM: DRA7: Reuse io tables and add a new .init_early
ARM: DRA7: Resue the clocksource, clockevent support
ARM: DRA7: board-generic: Add basic DT support
ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512
ARM: DRA7: dts: Add the dts files for dra7 SoC and dra7-evm board
ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs'
ARM: DRA7: Add the build support in omap2plus
Rajendra Nayak (1):
ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5
.../devicetree/bindings/arm/omap/omap.txt | 3 +
arch/arm/Kconfig | 2 +-
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/dra7-evm.dts | 140 +++++
arch/arm/boot/dts/dra7.dtsi | 567 ++++++++++++++++++++
arch/arm/configs/omap2plus_defconfig | 1 +
arch/arm/mach-omap1/include/mach/soc.h | 1 +
arch/arm/mach-omap2/Kconfig | 12 +-
arch/arm/mach-omap2/Makefile | 6 +
arch/arm/mach-omap2/board-generic.c | 18 +
arch/arm/mach-omap2/common.h | 1 +
arch/arm/mach-omap2/id.c | 4 +-
arch/arm/mach-omap2/io.c | 20 +-
arch/arm/mach-omap2/omap54xx.h | 4 +
arch/arm/mach-omap2/omap_hwmod.c | 2 +-
arch/arm/mach-omap2/soc.h | 17 +
arch/arm/mach-omap2/timer.c | 3 +-
arch/arm/plat-omap/Kconfig | 2 +-
18 files changed, 795 insertions(+), 11 deletions(-)
create mode 100644 arch/arm/boot/dts/dra7-evm.dts
create mode 100644 arch/arm/boot/dts/dra7.dtsi
--
1.7.9.5
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v3 1/9] ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 2/9] ARM: DRA7: Reuse io tables and add a new .init_early Rajendra Nayak ` (8 subsequent siblings) 9 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel From: R Sricharan <r.sricharan@ti.com> The PRCM and MPUSS parts of DRA7 devices are quite identical to OMAP5 so as to reuse all the existing infrastructure around it. Makefile updates to do just that. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/mach-omap2/Makefile | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index d4f6715..cc36bfe 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) obj-$(CONFIG_SOC_OMAP5) += prm44xx.o $(hwmod-common) $(secure-common) obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common) +obj-$(CONFIG_SOC_DRA7XX) += prm44xx.o $(hwmod-common) $(secure-common) ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) obj-y += mcbsp.o @@ -39,6 +40,7 @@ omap-4-5-common = omap4-common.o omap-wakeupgen.o obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) sleep44xx.o obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y) sleep44xx.o obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common) +obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-common) $(smp-y) plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) @@ -87,6 +89,7 @@ obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o +obj-$(CONFIG_SOC_DRA7XX) += omap-mpuss-lowpower.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o @@ -114,6 +117,7 @@ omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \ vc44xx_data.o vp44xx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common) +obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common) # OMAP voltage domains voltagedomain-common := voltage.o vc.o vp.o @@ -143,6 +147,7 @@ obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o obj-$(CONFIG_SOC_AM43XX) += $(powerdomain-common) obj-$(CONFIG_SOC_OMAP5) += $(powerdomain-common) obj-$(CONFIG_SOC_OMAP5) += powerdomains54xx_data.o +obj-$(CONFIG_SOC_DRA7XX) += $(powerdomain-common) # PRCM clockdomain control clockdomain-common += clockdomain.o @@ -160,6 +165,7 @@ obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o obj-$(CONFIG_SOC_AM43XX) += $(clockdomain-common) obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common) obj-$(CONFIG_SOC_OMAP5) += clockdomains54xx_data.o +obj-$(CONFIG_SOC_DRA7XX) += $(clockdomain-common) # Clock framework obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 2/9] ARM: DRA7: Reuse io tables and add a new .init_early 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 1/9] ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 3/9] ARM: DRA7: Resue the clocksource, clockevent support Rajendra Nayak ` (7 subsequent siblings) 9 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel From: R Sricharan <r.sricharan@ti.com> The IO descriptor tables for DRA7 are a complete reuse from OMAP5. A new dra7xx_init_early() does the base address inits. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/mach-omap2/common.h | 1 + arch/arm/mach-omap2/io.c | 20 ++++++++++++++++++-- arch/arm/mach-omap2/omap54xx.h | 4 ++++ 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index dfcc182..4a5684b 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -110,6 +110,7 @@ void omap3630_init_late(void); void am35xx_init_late(void); void ti81xx_init_late(void); int omap2_common_pm_late_init(void); +void dra7xx_init_early(void); #ifdef CONFIG_SOC_BUS void omap_soc_device_init(void); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 4a3f06f..3656b80 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -251,7 +251,7 @@ static struct map_desc omap44xx_io_desc[] __initdata = { }; #endif -#ifdef CONFIG_SOC_OMAP5 +#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) static struct map_desc omap54xx_io_desc[] __initdata = { { .virtual = L3_54XX_VIRT, @@ -333,7 +333,7 @@ void __init omap4_map_io(void) } #endif -#ifdef CONFIG_SOC_OMAP5 +#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) void __init omap5_map_io(void) { iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); @@ -653,6 +653,22 @@ void __init omap5_init_early(void) } #endif +#ifdef CONFIG_SOC_DRA7XX +void __init dra7xx_init_early(void) +{ + omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), + OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE)); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_AON_BASE), + OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); + omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); + omap_prm_base_init(); + omap_cm_base_init(); +} +#endif + + void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h index a086ba1..2d35c57 100644 --- a/arch/arm/mach-omap2/omap54xx.h +++ b/arch/arm/mach-omap2/omap54xx.h @@ -30,4 +30,8 @@ #define OMAP54XX_CTRL_BASE 0x4a002800 #define OMAP54XX_SAR_RAM_BASE 0x4ae26000 +#define DRA7XX_CM_CORE_AON_BASE 0x4a005000 +#define DRA7XX_CTRL_BASE 0x4a003400 +#define DRA7XX_TAP_BASE 0x4ae0c000 + #endif /* __ASM_SOC_OMAP555554XX_H */ -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 3/9] ARM: DRA7: Resue the clocksource, clockevent support 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 1/9] ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 2/9] ARM: DRA7: Reuse io tables and add a new .init_early Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 4/9] ARM: DRA7: board-generic: Add basic DT support Rajendra Nayak ` (6 subsequent siblings) 9 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel From: R Sricharan <r.sricharan@ti.com> All of OMAP5 timer support for clocksource and clockevent is completely reused across DRA7. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/mach-omap2/Kconfig | 2 +- arch/arm/mach-omap2/timer.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 3eed000..fc6ec23 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -132,7 +132,7 @@ config SOC_HAS_OMAP2_SDRC config SOC_HAS_REALTIME_COUNTER bool "Real time free running counter" - depends on SOC_OMAP5 + depends on SOC_OMAP5 || SOC_DRA7XX default y comment "OMAP Core Type" diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index b37e1fc..1e77f11 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -594,7 +594,8 @@ OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL, 1, "timer_sys_ck", "ti,timer-alwon"); #endif -#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ + defined(CONFIG_SOC_DRA7XX) static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon", 2, "sys_clkin_ck", NULL); #endif -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 4/9] ARM: DRA7: board-generic: Add basic DT support 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak ` (2 preceding siblings ...) 2013-08-04 16:27 ` [PATCH v3 3/9] ARM: DRA7: Resue the clocksource, clockevent support Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 5/9] ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512 Rajendra Nayak ` (5 subsequent siblings) 9 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel From: R Sricharan <r.sricharan@ti.com> Describe minimal DT boot machine details for DRA7xx based SoC's. DRA7xx family is based on dual core ARM CORTEX A15 using GIC as the interrupt controller. The PRCM and timer infrastructure is reused from OMAP5 and so are the io descriptor tables. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- .../devicetree/bindings/arm/omap/omap.txt | 3 +++ arch/arm/mach-omap2/board-generic.c | 18 ++++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index 6d498c7..91b7049 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -59,3 +59,6 @@ Boards: - AM43x EPOS EVM compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43" + +- DRA7 EVM: Software Developement Board for DRA7XX + compatible = "ti,dra7-evm", "ti,dra7" diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index be5d005..b89e55b 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -222,3 +222,21 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)") .dt_compat = am43_boards_compat, MACHINE_END #endif + +#ifdef CONFIG_SOC_DRA7XX +static const char *dra7xx_boards_compat[] __initdata = { + "ti,dra7", + NULL, +}; + +DT_MACHINE_START(DRA7XX_DT, "Generic DRA7XX (Flattened Device Tree)") + .reserve = omap_reserve, + .smp = smp_ops(omap4_smp_ops), + .map_io = omap5_map_io, + .init_early = dra7xx_init_early, + .init_irq = omap_gic_of_init, + .init_machine = omap_generic_init, + .init_time = omap5_realtime_timer_init, + .dt_compat = dra7xx_boards_compat, +MACHINE_END +#endif -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 5/9] ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak ` (3 preceding siblings ...) 2013-08-04 16:27 ` [PATCH v3 4/9] ARM: DRA7: board-generic: Add basic DT support Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 6/9] ARM: DRA7: dts: Add the dts files for dra7 SoC and dra7-evm board Rajendra Nayak ` (4 subsequent siblings) 9 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel From: R Sricharan <r.sricharan@ti.com> DRA7xx has 8 GPIO banks so that there are 32x8 = 256 GPIOs. In order for the gpiolib to detect and initialize these and other TWL GPIOs, ARCH_NR_GPIO is set to 512 using the kconfig default for DRA7. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 37c0f4e..b9e64f2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1600,7 +1600,7 @@ config LOCAL_TIMERS config ARCH_NR_GPIO int default 1024 if ARCH_SHMOBILE || ARCH_TEGRA - default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 + default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || SOC_DRA7XX default 392 if ARCH_U8500 default 352 if ARCH_VT8500 default 288 if ARCH_SUNXI -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 6/9] ARM: DRA7: dts: Add the dts files for dra7 SoC and dra7-evm board 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak ` (4 preceding siblings ...) 2013-08-04 16:27 ` [PATCH v3 5/9] ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512 Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' Rajendra Nayak ` (3 subsequent siblings) 9 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel From: R Sricharan <r.sricharan@ti.com> Add minimal device tree source needed for DRA7 based SoCs. Also add a board dts file for the dra7-evm (based on dra752) which contains 1.5G of memory with 1G interleaved and 512MB non-interleaved. Also added in the board file are pin configuration details for i2c, mcspi and uart devices on board. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/dra7-evm.dts | 140 ++++++++++ arch/arm/boot/dts/dra7.dtsi | 567 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 709 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/dra7-evm.dts create mode 100644 arch/arm/boot/dts/dra7.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 641b3c9..e2f8566 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -173,7 +173,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ am335x-bone.dtb \ am3517-evm.dtb \ am3517_mt_ventoux.dtb \ - am43x-epos-evm.dtb + am43x-epos-evm.dtb \ + dra7-evm.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \ diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts new file mode 100644 index 0000000..b270e24 --- /dev/null +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -0,0 +1,140 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "dra7.dtsi" + +/ { + model = "TI DRA7"; + compatible = "ti,dra7-evm", "ti,dra752", "ti,dra7"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x60000000>; /* 1536 MB */ + }; +}; + +&dra7_pmx_core { + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x400 0x60000 /* i2c1_sda */ + 0x404 0x60000 /* i2c1_scl */ + >; + }; + + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + 0x408 0x60000 /* i2c2_sda */ + 0x40c 0x60000 /* i2c2_scl */ + >; + }; + + i2c3_pins: pinmux_i2c3_pins { + pinctrl-single,pins = < + 0x410 0x60000 /* i2c3_sda */ + 0x414 0x60000 /* i2c3_scl */ + >; + }; + + mcspi1_pins: pinmux_mcspi1_pins { + pinctrl-single,pins = < + 0x3a4 0x40000 /* spi2_clk */ + 0x3a8 0x40000 /* spi2_d1 */ + 0x3ac 0x40000 /* spi2_d0 */ + 0x3b0 0xc0000 /* spi2_cs0 */ + 0x3b4 0xc0000 /* spi2_cs1 */ + 0x3b8 0xe0006 /* spi2_cs2 */ + 0x3bc 0xe0006 /* spi2_cs3 */ + >; + }; + + mcspi2_pins: pinmux_mcspi2_pins { + pinctrl-single,pins = < + 0x3c0 0x40000 /* spi2_sclk */ + 0x3c4 0xc0000 /* spi2_d1 */ + 0x3c8 0xc0000 /* spi2_d1 */ + 0x3cc 0xe0000 /* spi2_cs0 */ + >; + }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x3e0 0xe0000 /* uart1_rxd */ + 0x3e4 0xe0000 /* uart1_txd */ + 0x3e8 0x60003 /* uart1_ctsn */ + 0x3ec 0x60003 /* uart1_rtsn */ + >; + }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + 0x3f0 0x60000 /* uart2_rxd */ + 0x3f4 0x60000 /* uart2_txd */ + 0x3f8 0x60000 /* uart2_ctsn */ + 0x3fc 0x60000 /* uart2_rtsn */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x248 0xc0000 /* uart3_rxd */ + 0x24c 0xc0000 /* uart3_txd */ + >; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <400000>; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + clock-frequency = <400000>; +}; + +&i2c3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + clock-frequency = <3400000>; +}; + +&mcspi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcspi1_pins>; +}; + +&mcspi2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcspi2_pins>; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + +&uart3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi new file mode 100644 index 0000000..ffe7af9 --- /dev/null +++ b/arch/arm/boot/dts/dra7.dtsi @@ -0,0 +1,567 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * Based on "omap4.dtsi" + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "ti,dra7xx"; + interrupt-parent = <&gic>; + + aliases { + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + serial4 = &uart5; + serial5 = &uart6; + }; + + cpus { + cpu at 0 { + compatible = "arm,cortex-a15"; + timer { + compatible = "arm,armv7-timer"; + /* + * PPI secure/nonsecure IRQ, + * active low level-sensitive + */ + interrupts = <1 13 0x308>, + <1 14 0x308>; + clock-frequency = <6144000>; + }; + }; + cpu at 1 { + compatible = "arm,cortex-a15"; + timer { + compatible = "arm,armv7-timer"; + /* + * PPI secure/nonsecure IRQ, + * active low level-sensitive + */ + interrupts = <1 13 0x308>, + <1 14 0x308>; + clock-frequency = <6144000>; + }; + }; + }; + + gic: interrupt-controller at 48211000 { + compatible = "arm,cortex-a15-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x48211000 0x1000>, + <0x48212000 0x1000>; + }; + + /* + * The soc node represents the soc top level view. It is uses for IPs + * that are not memory mapped in the MPU view or for the MPU itself. + */ + soc { + compatible = "ti,omap-infra"; + mpu { + compatible = "ti,omap5-mpu"; + ti,hwmods = "mpu"; + }; + }; + + /* + * XXX: Use a flat representation of the SOC interconnect. + * The real OMAP interconnect network is quite complex. + * Since that will not bring real advantage to represent that in DT for + * the moment, just use a fake OCP bus entry to represent the whole bus + * hierarchy. + */ + ocp { + compatible = "ti,omap4-l3-noc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "l3_main_1", "l3_main_2"; + + counter32k: counter at 4ae04000 { + compatible = "ti,omap-counter32k"; + reg = <0x4ae04000 0x40>; + ti,hwmods = "counter_32k"; + }; + + dra7_pmx_core: pinmux at 4a003400 { + compatible = "pinctrl-single"; + reg = <0x4a003400 0x0464>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x3fffffff>; + }; + + sdma: dma-controller at 4a056000 { + compatible = "ti,omap4430-sdma"; + reg = <0x4a056000 0x1000>; + interrupts = <0 12 0x4>, + <0 13 0x4>, + <0 14 0x4>, + <0 15 0x4>; + #dma-cells = <1>; + #dma-channels = <32>; + #dma-requests = <127>; + }; + + gpio1: gpio at 4ae10000 { + compatible = "ti,omap4-gpio"; + reg = <0x4ae10000 0x200>; + interrupts = <0 29 0x4>; + ti,hwmods = "gpio1"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio2: gpio at 48055000 { + compatible = "ti,omap4-gpio"; + reg = <0x48055000 0x200>; + interrupts = <0 30 0x4>; + ti,hwmods = "gpio2"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio3: gpio at 48057000 { + compatible = "ti,omap4-gpio"; + reg = <0x48057000 0x200>; + interrupts = <0 31 0x4>; + ti,hwmods = "gpio3"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio4: gpio at 48059000 { + compatible = "ti,omap4-gpio"; + reg = <0x48059000 0x200>; + interrupts = <0 32 0x4>; + ti,hwmods = "gpio4"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio5: gpio at 4805b000 { + compatible = "ti,omap4-gpio"; + reg = <0x4805b000 0x200>; + interrupts = <0 33 0x4>; + ti,hwmods = "gpio5"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio6: gpio at 4805d000 { + compatible = "ti,omap4-gpio"; + reg = <0x4805d000 0x200>; + interrupts = <0 34 0x4>; + ti,hwmods = "gpio6"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio7: gpio at 48051000 { + compatible = "ti,omap4-gpio"; + reg = <0x48051000 0x200>; + interrupts = <0 35 0x4>; + ti,hwmods = "gpio7"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gpio8: gpio at 48053000 { + compatible = "ti,omap4-gpio"; + reg = <0x48053000 0x200>; + interrupts = <0 121 0x4>; + ti,hwmods = "gpio8"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uart1: serial at 4806a000 { + compatible = "ti,omap4-uart"; + reg = <0x4806a000 0x100>; + interrupts = <0 72 0x4>; + ti,hwmods = "uart1"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart2: serial at 4806c000 { + compatible = "ti,omap4-uart"; + reg = <0x4806c000 0x100>; + interrupts = <0 73 0x4>; + ti,hwmods = "uart2"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart3: serial at 48020000 { + compatible = "ti,omap4-uart"; + reg = <0x48020000 0x100>; + interrupts = <0 74 0x4>; + ti,hwmods = "uart3"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart4: serial at 4806e000 { + compatible = "ti,omap4-uart"; + reg = <0x4806e000 0x100>; + interrupts = <0 70 0x4>; + ti,hwmods = "uart4"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart5: serial at 48066000 { + compatible = "ti,omap4-uart"; + reg = <0x48066000 0x100>; + interrupts = <0 105 0x4>; + ti,hwmods = "uart5"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart6: serial at 48068000 { + compatible = "ti,omap4-uart"; + reg = <0x48068000 0x100>; + interrupts = <0 106 0x4>; + ti,hwmods = "uart6"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart7: serial at 48420000 { + compatible = "ti,omap4-uart"; + reg = <0x48420000 0x100>; + ti,hwmods = "uart7"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart8: serial at 48422000 { + compatible = "ti,omap4-uart"; + reg = <0x48422000 0x100>; + ti,hwmods = "uart8"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart9: serial at 48424000 { + compatible = "ti,omap4-uart"; + reg = <0x48424000 0x100>; + ti,hwmods = "uart9"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + uart10: serial at 4ae2b000 { + compatible = "ti,omap4-uart"; + reg = <0x4ae2b000 0x100>; + ti,hwmods = "uart10"; + clock-frequency = <48000000>; + status = "disabled"; + }; + + timer1: timer at 4ae18000 { + compatible = "ti,omap5430-timer"; + reg = <0x4ae18000 0x80>; + interrupts = <0 37 0x4>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer at 48032000 { + compatible = "ti,omap5430-timer"; + reg = <0x48032000 0x80>; + interrupts = <0 38 0x4>; + ti,hwmods = "timer2"; + }; + + timer3: timer at 48034000 { + compatible = "ti,omap5430-timer"; + reg = <0x48034000 0x80>; + interrupts = <0 39 0x4>; + ti,hwmods = "timer3"; + }; + + timer4: timer at 48036000 { + compatible = "ti,omap5430-timer"; + reg = <0x48036000 0x80>; + interrupts = <0 40 0x4>; + ti,hwmods = "timer4"; + }; + + timer5: timer at 48820000 { + compatible = "ti,omap5430-timer"; + reg = <0x48820000 0x80>; + interrupts = <0 41 0x4>; + ti,hwmods = "timer5"; + ti,timer-dsp; + }; + + timer6: timer at 48822000 { + compatible = "ti,omap5430-timer"; + reg = <0x48822000 0x80>; + interrupts = <0 42 0x4>; + ti,hwmods = "timer6"; + ti,timer-dsp; + ti,timer-pwm; + }; + + timer7: timer at 48824000 { + compatible = "ti,omap5430-timer"; + reg = <0x48824000 0x80>; + interrupts = <0 43 0x4>; + ti,hwmods = "timer7"; + ti,timer-dsp; + }; + + timer8: timer at 48826000 { + compatible = "ti,omap5430-timer"; + reg = <0x48826000 0x80>; + interrupts = <0 44 0x4>; + ti,hwmods = "timer8"; + ti,timer-dsp; + ti,timer-pwm; + }; + + timer9: timer at 4803e000 { + compatible = "ti,omap5430-timer"; + reg = <0x4803e000 0x80>; + interrupts = <0 45 0x4>; + ti,hwmods = "timer9"; + }; + + timer10: timer at 48086000 { + compatible = "ti,omap5430-timer"; + reg = <0x48086000 0x80>; + interrupts = <0 46 0x4>; + ti,hwmods = "timer10"; + }; + + timer11: timer at 48088000 { + compatible = "ti,omap5430-timer"; + reg = <0x48088000 0x80>; + interrupts = <0 47 0x4>; + ti,hwmods = "timer11"; + ti,timer-pwm; + }; + + timer13: timer at 48828000 { + compatible = "ti,omap5430-timer"; + reg = <0x48828000 0x80>; + ti,hwmods = "timer13"; + status = "disabled"; + }; + + timer14: timer at 4882a000 { + compatible = "ti,omap5430-timer"; + reg = <0x4882a000 0x80>; + ti,hwmods = "timer14"; + status = "disabled"; + }; + + timer15: timer at 4882c000 { + compatible = "ti,omap5430-timer"; + reg = <0x4882c000 0x80>; + ti,hwmods = "timer15"; + status = "disabled"; + }; + + timer16: timer at 4882e000 { + compatible = "ti,omap5430-timer"; + reg = <0x4882e000 0x80>; + ti,hwmods = "timer16"; + status = "disabled"; + }; + + wdt2: wdt at 4ae14000 { + compatible = "ti,omap4-wdt"; + reg = <0x4ae14000 0x80>; + interrupts = <0 80 0x4>; + ti,hwmods = "wd_timer2"; + }; + + i2c1: i2c at 48070000 { + compatible = "ti,omap4-i2c"; + reg = <0x48070000 0x100>; + interrupts = <0 56 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c1"; + status = "disabled"; + }; + + i2c2: i2c at 48072000 { + compatible = "ti,omap4-i2c"; + reg = <0x48072000 0x100>; + interrupts = <0 57 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c2"; + status = "disabled"; + }; + + i2c3: i2c at 48060000 { + compatible = "ti,omap4-i2c"; + reg = <0x48060000 0x100>; + interrupts = <0 61 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c3"; + status = "disabled"; + }; + + i2c4: i2c at 4807a000 { + compatible = "ti,omap4-i2c"; + reg = <0x4807a000 0x100>; + interrupts = <0 62 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c4"; + status = "disabled"; + }; + + i2c5: i2c at 4807c000 { + compatible = "ti,omap4-i2c"; + reg = <0x4807c000 0x100>; + interrupts = <0 60 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "i2c5"; + status = "disabled"; + }; + + mmc1: mmc at 4809c000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x4809c000 0x400>; + interrupts = <0 83 0x4>; + ti,hwmods = "mmc1"; + ti,dual-volt; + ti,needs-special-reset; + dmas = <&sdma 61>, <&sdma 62>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + mmc2: mmc at 480b4000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x480b4000 0x400>; + interrupts = <0 86 0x4>; + ti,hwmods = "mmc2"; + ti,needs-special-reset; + dmas = <&sdma 47>, <&sdma 48>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + mmc3: mmc at 480ad000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x480ad000 0x400>; + interrupts = <0 94 0x4>; + ti,hwmods = "mmc3"; + ti,needs-special-reset; + dmas = <&sdma 77>, <&sdma 78>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + mmc4: mmc at 480d1000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x480d1000 0x400>; + interrupts = <0 96 0x4>; + ti,hwmods = "mmc4"; + ti,needs-special-reset; + dmas = <&sdma 57>, <&sdma 58>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + mcspi1: spi at 48098000 { + compatible = "ti,omap4-mcspi"; + reg = <0x48098000 0x200>; + interrupts = <0 65 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi1"; + ti,spi-num-cs = <4>; + dmas = <&sdma 35>, + <&sdma 36>, + <&sdma 37>, + <&sdma 38>, + <&sdma 39>, + <&sdma 40>, + <&sdma 41>, + <&sdma 42>; + dma-names = "tx0", "rx0", "tx1", "rx1", + "tx2", "rx2", "tx3", "rx3"; + status = "disabled"; + }; + + mcspi2: spi at 4809a000 { + compatible = "ti,omap4-mcspi"; + reg = <0x4809a000 0x200>; + interrupts = <0 66 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi2"; + ti,spi-num-cs = <2>; + dmas = <&sdma 43>, + <&sdma 44>, + <&sdma 45>, + <&sdma 46>; + dma-names = "tx0", "rx0", "tx1", "rx1"; + status = "disabled"; + }; + + mcspi3: spi at 480b8000 { + compatible = "ti,omap4-mcspi"; + reg = <0x480b8000 0x200>; + interrupts = <0 91 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi3"; + ti,spi-num-cs = <2>; + dmas = <&sdma 15>, <&sdma 16>; + dma-names = "tx0", "rx0"; + status = "disabled"; + }; + + mcspi4: spi at 480ba000 { + compatible = "ti,omap4-mcspi"; + reg = <0x480ba000 0x200>; + interrupts = <0 48 0x4>; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "mcspi4"; + ti,spi-num-cs = <1>; + dmas = <&sdma 70>, <&sdma 71>; + dma-names = "tx0", "rx0"; + status = "disabled"; + }; + }; +}; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak ` (5 preceding siblings ...) 2013-08-04 16:27 ` [PATCH v3 6/9] ARM: DRA7: dts: Add the dts files for dra7 SoC and dra7-evm board Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-05 11:44 ` Grygorii Strashko 2013-08-04 16:27 ` [PATCH v3 8/9] ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5 Rajendra Nayak ` (2 subsequent siblings) 9 siblings, 1 reply; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel From: R Sricharan <r.sricharan@ti.com> The DRA7xx is a high-performance, infotainment application device, based on enhanced OMAP architecture integrated on a 28-nm technology. Since DRA7 is a platform supported only using DT, the cpu detection is based on the compatibles passed from DT blobs as suggested here http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html Suggested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/mach-omap1/include/mach/soc.h | 1 + arch/arm/mach-omap2/id.c | 4 ++-- arch/arm/mach-omap2/soc.h | 17 +++++++++++++++++ 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h index 6cf9c1c..612bd1c 100644 --- a/arch/arm/mach-omap1/include/mach/soc.h +++ b/arch/arm/mach-omap1/include/mach/soc.h @@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710) #define cpu_is_omap34xx() 0 #define cpu_is_omap44xx() 0 #define soc_is_omap54xx() 0 +#define soc_is_dra7xx() 0 #define soc_is_am33xx() 0 #define cpu_class_is_omap1() 1 #define cpu_class_is_omap2() 0 diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 2dc62a2..0289adc 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -61,7 +61,7 @@ int omap_type(void) val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); } else if (cpu_is_omap44xx()) { val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS); - } else if (soc_is_omap54xx()) { + } else if (soc_is_omap54xx() || soc_is_dra7xx()) { val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS); val &= OMAP5_DEVICETYPE_MASK; val >>= 6; @@ -116,7 +116,7 @@ static u16 tap_prod_id; void omap_get_die_id(struct omap_die_id *odi) { - if (cpu_is_omap44xx() || soc_is_omap54xx()) { + if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0); odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1); odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2); diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 8c616e4..4588df1 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -8,6 +8,7 @@ * Written by Tony Lindgren <tony.lindgren@nokia.com> * * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> + * Added DRA7xxx specific defines - Sricharan R<r.sricharan@ti.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -35,6 +36,7 @@ #ifndef __ASSEMBLY__ #include <linux/bitops.h> +#include <linux/of.h> /* * Test if multicore OMAP support is needed @@ -105,6 +107,15 @@ # endif #endif +#ifdef CONFIG_SOC_DRA7XX +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME DRA7XX +# endif +#endif + /* * Omap device type i.e. EMU/HS/TST/GP/BAD */ @@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437) #define cpu_is_omap447x() 0 #define soc_is_omap54xx() 0 #define soc_is_omap543x() 0 +#define soc_is_dra7xx() 0 #if defined(MULTI_OMAP2) # if defined(CONFIG_ARCH_OMAP2) @@ -379,6 +391,11 @@ IS_OMAP_TYPE(3430, 0x3430) # define soc_is_omap543x() is_omap543x() #endif +#if defined(CONFIG_SOC_DRA7XX) +#undef soc_is_dra7xx +#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7")) +#endif + /* Various silicon revisions for omap2 */ #define OMAP242X_CLASS 0x24200024 #define OMAP2420_REV_ES1_0 OMAP242X_CLASS -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' 2013-08-04 16:27 ` [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' Rajendra Nayak @ 2013-08-05 11:44 ` Grygorii Strashko 2013-08-06 8:11 ` Rajendra Nayak 0 siblings, 1 reply; 16+ messages in thread From: Grygorii Strashko @ 2013-08-05 11:44 UTC (permalink / raw) To: linux-arm-kernel On 08/04/2013 07:27 PM, Rajendra Nayak wrote: > From: R Sricharan <r.sricharan@ti.com> > > The DRA7xx is a high-performance, infotainment application device, > based on enhanced OMAP architecture integrated on a 28-nm technology. > > Since DRA7 is a platform supported only using DT, the cpu detection > is based on the compatibles passed from DT blobs as suggested here > http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html > > Suggested-by: Felipe Balbi <balbi@ti.com> > Signed-off-by: R Sricharan <r.sricharan@ti.com> > Signed-off-by: Rajendra Nayak <rnayak@ti.com> > Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> > --- > arch/arm/mach-omap1/include/mach/soc.h | 1 + > arch/arm/mach-omap2/id.c | 4 ++-- > arch/arm/mach-omap2/soc.h | 17 +++++++++++++++++ > 3 files changed, 20 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h > index 6cf9c1c..612bd1c 100644 > --- a/arch/arm/mach-omap1/include/mach/soc.h > +++ b/arch/arm/mach-omap1/include/mach/soc.h > @@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710) > #define cpu_is_omap34xx() 0 > #define cpu_is_omap44xx() 0 > #define soc_is_omap54xx() 0 > +#define soc_is_dra7xx() 0 > #define soc_is_am33xx() 0 > #define cpu_class_is_omap1() 1 > #define cpu_class_is_omap2() 0 > diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c > index 2dc62a2..0289adc 100644 > --- a/arch/arm/mach-omap2/id.c > +++ b/arch/arm/mach-omap2/id.c > @@ -61,7 +61,7 @@ int omap_type(void) > val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); > } else if (cpu_is_omap44xx()) { > val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS); > - } else if (soc_is_omap54xx()) { > + } else if (soc_is_omap54xx() || soc_is_dra7xx()) { > val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS); > val &= OMAP5_DEVICETYPE_MASK; > val >>= 6; > @@ -116,7 +116,7 @@ static u16 tap_prod_id; > > void omap_get_die_id(struct omap_die_id *odi) > { > - if (cpu_is_omap44xx() || soc_is_omap54xx()) { > + if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { > odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0); > odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1); > odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2); > diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h > index 8c616e4..4588df1 100644 > --- a/arch/arm/mach-omap2/soc.h > +++ b/arch/arm/mach-omap2/soc.h > @@ -8,6 +8,7 @@ > * Written by Tony Lindgren <tony.lindgren@nokia.com> > * > * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> > + * Added DRA7xxx specific defines - Sricharan R<r.sricharan@ti.com> > * > * This program is free software; you can redistribute it and/or modify > * it under the terms of the GNU General Public License as published by > @@ -35,6 +36,7 @@ > #ifndef __ASSEMBLY__ > > #include <linux/bitops.h> > +#include <linux/of.h> > > /* > * Test if multicore OMAP support is needed > @@ -105,6 +107,15 @@ > # endif > #endif > > +#ifdef CONFIG_SOC_DRA7XX > +# ifdef OMAP_NAME > +# undef MULTI_OMAP2 > +# define MULTI_OMAP2 > +# else > +# define OMAP_NAME DRA7XX > +# endif > +#endif > + > /* > * Omap device type i.e. EMU/HS/TST/GP/BAD > */ > @@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437) > #define cpu_is_omap447x() 0 > #define soc_is_omap54xx() 0 > #define soc_is_omap543x() 0 > +#define soc_is_dra7xx() 0 > > #if defined(MULTI_OMAP2) > # if defined(CONFIG_ARCH_OMAP2) > @@ -379,6 +391,11 @@ IS_OMAP_TYPE(3430, 0x3430) > # define soc_is_omap543x() is_omap543x() > #endif > > +#if defined(CONFIG_SOC_DRA7XX) > +#undef soc_is_dra7xx > +#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7")) Wouldn't that be too expensive to call of_machine_is_compatible every time for DRA7 detection? May be static variable can be used to store DRA7 presence status, smth. like this: static inline int is_dra7xx(void) { static int is_dra7 = -1; if (is_dra7 < 0) is_dra7 = of_machine_is_compatible("ti,dra7"); return !!is_dra7; } (it's just an idea, not verified) > +#endif > + > /* Various silicon revisions for omap2 */ > #define OMAP242X_CLASS 0x24200024 > #define OMAP2420_REV_ES1_0 OMAP242X_CLASS > Regards, -grygorii ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' 2013-08-05 11:44 ` Grygorii Strashko @ 2013-08-06 8:11 ` Rajendra Nayak 2013-08-06 11:59 ` Grygorii Strashko 0 siblings, 1 reply; 16+ messages in thread From: Rajendra Nayak @ 2013-08-06 8:11 UTC (permalink / raw) To: linux-arm-kernel Hi Grygorii, On Monday 05 August 2013 05:14 PM, Grygorii Strashko wrote: > On 08/04/2013 07:27 PM, Rajendra Nayak wrote: >> From: R Sricharan <r.sricharan@ti.com> >> >> The DRA7xx is a high-performance, infotainment application device, >> based on enhanced OMAP architecture integrated on a 28-nm technology. >> >> Since DRA7 is a platform supported only using DT, the cpu detection >> is based on the compatibles passed from DT blobs as suggested here >> http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html >> >> Suggested-by: Felipe Balbi <balbi@ti.com> >> Signed-off-by: R Sricharan <r.sricharan@ti.com> >> Signed-off-by: Rajendra Nayak <rnayak@ti.com> >> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> >> --- >> arch/arm/mach-omap1/include/mach/soc.h | 1 + >> arch/arm/mach-omap2/id.c | 4 ++-- >> arch/arm/mach-omap2/soc.h | 17 +++++++++++++++++ >> 3 files changed, 20 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h >> index 6cf9c1c..612bd1c 100644 >> --- a/arch/arm/mach-omap1/include/mach/soc.h >> +++ b/arch/arm/mach-omap1/include/mach/soc.h >> @@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710) >> #define cpu_is_omap34xx() 0 >> #define cpu_is_omap44xx() 0 >> #define soc_is_omap54xx() 0 >> +#define soc_is_dra7xx() 0 >> #define soc_is_am33xx() 0 >> #define cpu_class_is_omap1() 1 >> #define cpu_class_is_omap2() 0 >> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c >> index 2dc62a2..0289adc 100644 >> --- a/arch/arm/mach-omap2/id.c >> +++ b/arch/arm/mach-omap2/id.c >> @@ -61,7 +61,7 @@ int omap_type(void) >> val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); >> } else if (cpu_is_omap44xx()) { >> val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS); >> - } else if (soc_is_omap54xx()) { >> + } else if (soc_is_omap54xx() || soc_is_dra7xx()) { >> val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS); >> val &= OMAP5_DEVICETYPE_MASK; >> val >>= 6; >> @@ -116,7 +116,7 @@ static u16 tap_prod_id; >> >> void omap_get_die_id(struct omap_die_id *odi) >> { >> - if (cpu_is_omap44xx() || soc_is_omap54xx()) { >> + if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { >> odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0); >> odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1); >> odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2); >> diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h >> index 8c616e4..4588df1 100644 >> --- a/arch/arm/mach-omap2/soc.h >> +++ b/arch/arm/mach-omap2/soc.h >> @@ -8,6 +8,7 @@ >> * Written by Tony Lindgren <tony.lindgren@nokia.com> >> * >> * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> >> + * Added DRA7xxx specific defines - Sricharan R<r.sricharan@ti.com> >> * >> * This program is free software; you can redistribute it and/or modify >> * it under the terms of the GNU General Public License as published by >> @@ -35,6 +36,7 @@ >> #ifndef __ASSEMBLY__ >> >> #include <linux/bitops.h> >> +#include <linux/of.h> >> >> /* >> * Test if multicore OMAP support is needed >> @@ -105,6 +107,15 @@ >> # endif >> #endif >> >> +#ifdef CONFIG_SOC_DRA7XX >> +# ifdef OMAP_NAME >> +# undef MULTI_OMAP2 >> +# define MULTI_OMAP2 >> +# else >> +# define OMAP_NAME DRA7XX >> +# endif >> +#endif >> + >> /* >> * Omap device type i.e. EMU/HS/TST/GP/BAD >> */ >> @@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437) >> #define cpu_is_omap447x() 0 >> #define soc_is_omap54xx() 0 >> #define soc_is_omap543x() 0 >> +#define soc_is_dra7xx() 0 >> >> #if defined(MULTI_OMAP2) >> # if defined(CONFIG_ARCH_OMAP2) >> @@ -379,6 +391,11 @@ IS_OMAP_TYPE(3430, 0x3430) >> # define soc_is_omap543x() is_omap543x() >> #endif >> >> +#if defined(CONFIG_SOC_DRA7XX) >> +#undef soc_is_dra7xx >> +#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7")) > > Wouldn't that be too expensive to call of_machine_is_compatible every > time for DRA7 detection? Ideally these soc checks should happen only once at init (see PATCH 8/9 in the series for instance) so there should not be a 'every time' penalty. regards, Rajendra > > May be static variable can be used to store DRA7 presence status, > smth. like this: > > static inline int is_dra7xx(void) > { > static int is_dra7 = -1; > > if (is_dra7 < 0) > is_dra7 = of_machine_is_compatible("ti,dra7"); > > return !!is_dra7; > } > > (it's just an idea, not verified) > >> +#endif >> + >> /* Various silicon revisions for omap2 */ >> #define OMAP242X_CLASS 0x24200024 >> #define OMAP2420_REV_ES1_0 OMAP242X_CLASS >> > > > Regards, > -grygorii ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' 2013-08-06 8:11 ` Rajendra Nayak @ 2013-08-06 11:59 ` Grygorii Strashko 0 siblings, 0 replies; 16+ messages in thread From: Grygorii Strashko @ 2013-08-06 11:59 UTC (permalink / raw) To: linux-arm-kernel On 08/06/2013 11:11 AM, Rajendra Nayak wrote: > Hi Grygorii, > > On Monday 05 August 2013 05:14 PM, Grygorii Strashko wrote: >> On 08/04/2013 07:27 PM, Rajendra Nayak wrote: >>> From: R Sricharan <r.sricharan@ti.com> >>> >>> The DRA7xx is a high-performance, infotainment application device, >>> based on enhanced OMAP architecture integrated on a 28-nm technology. >>> >>> Since DRA7 is a platform supported only using DT, the cpu detection >>> is based on the compatibles passed from DT blobs as suggested here >>> http://lists.infradead.org/pipermail/linux-arm-kernel/2013-July/187712.html >>> >>> Suggested-by: Felipe Balbi <balbi@ti.com> >>> Signed-off-by: R Sricharan <r.sricharan@ti.com> >>> Signed-off-by: Rajendra Nayak <rnayak@ti.com> >>> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> >>> --- >>> arch/arm/mach-omap1/include/mach/soc.h | 1 + >>> arch/arm/mach-omap2/id.c | 4 ++-- >>> arch/arm/mach-omap2/soc.h | 17 +++++++++++++++++ >>> 3 files changed, 20 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h >>> index 6cf9c1c..612bd1c 100644 >>> --- a/arch/arm/mach-omap1/include/mach/soc.h >>> +++ b/arch/arm/mach-omap1/include/mach/soc.h >>> @@ -195,6 +195,7 @@ IS_OMAP_TYPE(1710, 0x1710) >>> #define cpu_is_omap34xx() 0 >>> #define cpu_is_omap44xx() 0 >>> #define soc_is_omap54xx() 0 >>> +#define soc_is_dra7xx() 0 >>> #define soc_is_am33xx() 0 >>> #define cpu_class_is_omap1() 1 >>> #define cpu_class_is_omap2() 0 >>> diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c >>> index 2dc62a2..0289adc 100644 >>> --- a/arch/arm/mach-omap2/id.c >>> +++ b/arch/arm/mach-omap2/id.c >>> @@ -61,7 +61,7 @@ int omap_type(void) >>> val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); >>> } else if (cpu_is_omap44xx()) { >>> val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS); >>> - } else if (soc_is_omap54xx()) { >>> + } else if (soc_is_omap54xx() || soc_is_dra7xx()) { >>> val = omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS); >>> val &= OMAP5_DEVICETYPE_MASK; >>> val >>= 6; >>> @@ -116,7 +116,7 @@ static u16 tap_prod_id; >>> >>> void omap_get_die_id(struct omap_die_id *odi) >>> { >>> - if (cpu_is_omap44xx() || soc_is_omap54xx()) { >>> + if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { >>> odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0); >>> odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1); >>> odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2); >>> diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h >>> index 8c616e4..4588df1 100644 >>> --- a/arch/arm/mach-omap2/soc.h >>> +++ b/arch/arm/mach-omap2/soc.h >>> @@ -8,6 +8,7 @@ >>> * Written by Tony Lindgren <tony.lindgren@nokia.com> >>> * >>> * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com> >>> + * Added DRA7xxx specific defines - Sricharan R<r.sricharan@ti.com> >>> * >>> * This program is free software; you can redistribute it and/or modify >>> * it under the terms of the GNU General Public License as published by >>> @@ -35,6 +36,7 @@ >>> #ifndef __ASSEMBLY__ >>> >>> #include <linux/bitops.h> >>> +#include <linux/of.h> >>> >>> /* >>> * Test if multicore OMAP support is needed >>> @@ -105,6 +107,15 @@ >>> # endif >>> #endif >>> >>> +#ifdef CONFIG_SOC_DRA7XX >>> +# ifdef OMAP_NAME >>> +# undef MULTI_OMAP2 >>> +# define MULTI_OMAP2 >>> +# else >>> +# define OMAP_NAME DRA7XX >>> +# endif >>> +#endif >>> + >>> /* >>> * Omap device type i.e. EMU/HS/TST/GP/BAD >>> */ >>> @@ -233,6 +244,7 @@ IS_AM_SUBCLASS(437x, 0x437) >>> #define cpu_is_omap447x() 0 >>> #define soc_is_omap54xx() 0 >>> #define soc_is_omap543x() 0 >>> +#define soc_is_dra7xx() 0 >>> >>> #if defined(MULTI_OMAP2) >>> # if defined(CONFIG_ARCH_OMAP2) >>> @@ -379,6 +391,11 @@ IS_OMAP_TYPE(3430, 0x3430) >>> # define soc_is_omap543x() is_omap543x() >>> #endif >>> >>> +#if defined(CONFIG_SOC_DRA7XX) >>> +#undef soc_is_dra7xx >>> +#define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7")) >> >> Wouldn't that be too expensive to call of_machine_is_compatible every >> time for DRA7 detection? > > Ideally these soc checks should happen only once at init (see PATCH 8/9 in the > series for instance) so there should not be a 'every time' penalty. Ok, Agreed then. > > regards, > Rajendra > >> >> May be static variable can be used to store DRA7 presence status, >> smth. like this: >> >> static inline int is_dra7xx(void) >> { >> static int is_dra7 = -1; >> >> if (is_dra7 < 0) >> is_dra7 = of_machine_is_compatible("ti,dra7"); >> >> return !!is_dra7; >> } >> >> (it's just an idea, not verified) >> >>> +#endif >>> + >>> /* Various silicon revisions for omap2 */ >>> #define OMAP242X_CLASS 0x24200024 >>> #define OMAP2420_REV_ES1_0 OMAP242X_CLASS >>> >> >> >> Regards, >> -grygorii > ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 8/9] ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak ` (6 preceding siblings ...) 2013-08-04 16:27 ` [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 9/9] ARM: DRA7: Add the build support in omap2plus Rajendra Nayak 2013-08-12 6:40 ` [PATCH v3 0/9] DRA7xx core support Rajendra Nayak 9 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel The soc_ops for dra7xx devices can be completed reused from the ones used for omap4 and omap5 devices. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/mach-omap2/omap_hwmod.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 7341eff..f6eb29b 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -4113,7 +4113,7 @@ void __init omap_hwmod_init(void) soc_ops.assert_hardreset = _omap2_assert_hardreset; soc_ops.deassert_hardreset = _omap2_deassert_hardreset; soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; - } else if (cpu_is_omap44xx() || soc_is_omap54xx()) { + } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { soc_ops.enable_module = _omap4_enable_module; soc_ops.disable_module = _omap4_disable_module; soc_ops.wait_target_ready = _omap4_wait_target_ready; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 9/9] ARM: DRA7: Add the build support in omap2plus 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak ` (7 preceding siblings ...) 2013-08-04 16:27 ` [PATCH v3 8/9] ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5 Rajendra Nayak @ 2013-08-04 16:27 ` Rajendra Nayak 2013-08-12 6:40 ` [PATCH v3 0/9] DRA7xx core support Rajendra Nayak 9 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-04 16:27 UTC (permalink / raw) To: linux-arm-kernel From: R Sricharan <r.sricharan@ti.com> Now that the needed pieces for DRA7 based SoCs' is present, enable the build support in omap2plus_defconfig Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/configs/omap2plus_defconfig | 1 + arch/arm/mach-omap2/Kconfig | 10 +++++++++- arch/arm/plat-omap/Kconfig | 2 +- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 5339e6a..1da7cf9 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -306,3 +306,4 @@ CONFIG_TI_DAVINCI_MDIO=y CONFIG_TI_DAVINCI_CPDMA=y CONFIG_TI_CPSW=y CONFIG_AT803X_PHY=y +CONFIG_SOC_DRA7XX=y diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index fc6ec23..740f41b 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -118,7 +118,7 @@ config ARCH_OMAP2PLUS_TYPICAL select I2C select I2C_OMAP select MENELAUS if ARCH_OMAP2 - select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 + select NEON if CPU_V7 select PM_RUNTIME select REGULATOR select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 @@ -135,6 +135,14 @@ config SOC_HAS_REALTIME_COUNTER depends on SOC_OMAP5 || SOC_DRA7XX default y +config SOC_DRA7XX + bool "TI DRA7XX" + select ARM_ARCH_TIMER + select CPU_V7 + select ARM_GIC + select HAVE_SMP + select COMMON_CLK + comment "OMAP Core Type" depends on ARCH_OMAP2 diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index f82bae2..436ea97 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -106,7 +106,7 @@ config OMAP_32K_TIMER This timer saves power compared to the OMAP_MPU_TIMER, and has support for no tick during idle. The 32KHz timer provides less intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is - currently only available for OMAP16XX, 24XX, 34XX and OMAP4/5. + currently only available for OMAP16XX, 24XX, 34XX, OMAP4/5 and DRA7XX. On OMAP2PLUS this value is only used for CONFIG_HZ and CLOCK_TICK_RATE compile time calculation. -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 0/9] DRA7xx core support 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak ` (8 preceding siblings ...) 2013-08-04 16:27 ` [PATCH v3 9/9] ARM: DRA7: Add the build support in omap2plus Rajendra Nayak @ 2013-08-12 6:40 ` Rajendra Nayak 2013-08-12 8:24 ` Tony Lindgren 9 siblings, 1 reply; 16+ messages in thread From: Rajendra Nayak @ 2013-08-12 6:40 UTC (permalink / raw) To: linux-arm-kernel On Sunday 04 August 2013 09:57 PM, Rajendra Nayak wrote: > Changes in v3: > -1- Dropped some clock/dpll framework builds for dra7 > -2- Added all instances of IPs in dtsi file > -3- dtsi does a 'disabled' by default and dts enables as needed > -4- soc_is_dra7xx() based on DT compatible instead of using ID code > > Changes in v2: > -1- Fixed minor changelog details > -2- Dropped the SRAM support patch since we need to move to drivers/misc/sram.c > -3- Added DTS update patches to this series which were earlier posted as > part of the data series (Since they don't have much objections as against the > other in-kernel data files) > -4- Updated the EVM dts file with pin config details for uart/mcspi and i2c > > DRA7xx based SoCs' are high-performance, infotainment application devices, > based on enhanced OMAP architecture integrated on a 28nm > technology. > > The DRA7xx family is composed of DRA75x and DRA74x devices. > The current device for which the patches add support is the > DRA752 SoC. > > Most of the core IPs are similar to those found on the OMAP5 > devices, including the dual cortex-A15 based MPU subsystem, > which has helped quite some reuse from existing OMAP5 support. > > This series contains only core support patches and none of > the PRCM and hwmod data needed for the device to boot. Tony, any chance of this series making it to 3.12? regards, Rajendra > > The bootloader support for the platform is already available > in mainline u-boot. > > The patches posted in this series are available at: > git://github.com/rrnayak/linux.git for-3.12/dra-core-v3 > > The patches (including the ones for in-kernel data) which boot > on dra7xx evm are available at: > t://github.com/rrnayak/linux.git out-of-tree/dra-integrated-v3 > > R Sricharan (8): > ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra > ARM: DRA7: Reuse io tables and add a new .init_early > ARM: DRA7: Resue the clocksource, clockevent support > ARM: DRA7: board-generic: Add basic DT support > ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512 > ARM: DRA7: dts: Add the dts files for dra7 SoC and dra7-evm board > ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' > ARM: DRA7: Add the build support in omap2plus > > Rajendra Nayak (1): > ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5 > > .../devicetree/bindings/arm/omap/omap.txt | 3 + > arch/arm/Kconfig | 2 +- > arch/arm/boot/dts/Makefile | 3 +- > arch/arm/boot/dts/dra7-evm.dts | 140 +++++ > arch/arm/boot/dts/dra7.dtsi | 567 ++++++++++++++++++++ > arch/arm/configs/omap2plus_defconfig | 1 + > arch/arm/mach-omap1/include/mach/soc.h | 1 + > arch/arm/mach-omap2/Kconfig | 12 +- > arch/arm/mach-omap2/Makefile | 6 + > arch/arm/mach-omap2/board-generic.c | 18 + > arch/arm/mach-omap2/common.h | 1 + > arch/arm/mach-omap2/id.c | 4 +- > arch/arm/mach-omap2/io.c | 20 +- > arch/arm/mach-omap2/omap54xx.h | 4 + > arch/arm/mach-omap2/omap_hwmod.c | 2 +- > arch/arm/mach-omap2/soc.h | 17 + > arch/arm/mach-omap2/timer.c | 3 +- > arch/arm/plat-omap/Kconfig | 2 +- > 18 files changed, 795 insertions(+), 11 deletions(-) > create mode 100644 arch/arm/boot/dts/dra7-evm.dts > create mode 100644 arch/arm/boot/dts/dra7.dtsi > ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 0/9] DRA7xx core support 2013-08-12 6:40 ` [PATCH v3 0/9] DRA7xx core support Rajendra Nayak @ 2013-08-12 8:24 ` Tony Lindgren 2013-08-12 8:27 ` Rajendra Nayak 0 siblings, 1 reply; 16+ messages in thread From: Tony Lindgren @ 2013-08-12 8:24 UTC (permalink / raw) To: linux-arm-kernel * Rajendra Nayak <rnayak@ti.com> [130811 23:47]: > On Sunday 04 August 2013 09:57 PM, Rajendra Nayak wrote: > > Changes in v3: > > -1- Dropped some clock/dpll framework builds for dra7 > > -2- Added all instances of IPs in dtsi file > > -3- dtsi does a 'disabled' by default and dts enables as needed > > -4- soc_is_dra7xx() based on DT compatible instead of using ID code > > > > Changes in v2: > > -1- Fixed minor changelog details > > -2- Dropped the SRAM support patch since we need to move to drivers/misc/sram.c > > -3- Added DTS update patches to this series which were earlier posted as > > part of the data series (Since they don't have much objections as against the > > other in-kernel data files) > > -4- Updated the EVM dts file with pin config details for uart/mcspi and i2c > > > > DRA7xx based SoCs' are high-performance, infotainment application devices, > > based on enhanced OMAP architecture integrated on a 28nm > > technology. > > > > The DRA7xx family is composed of DRA75x and DRA74x devices. > > The current device for which the patches add support is the > > DRA752 SoC. > > > > Most of the core IPs are similar to those found on the OMAP5 > > devices, including the dual cortex-A15 based MPU subsystem, > > which has helped quite some reuse from existing OMAP5 support. > > > > This series contains only core support patches and none of > > the PRCM and hwmod data needed for the device to boot. > > Tony, any chance of this series making it to 3.12? Looks OK to me, want to do a pull request against -rc5 for me? Regards, Tony ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 0/9] DRA7xx core support 2013-08-12 8:24 ` Tony Lindgren @ 2013-08-12 8:27 ` Rajendra Nayak 0 siblings, 0 replies; 16+ messages in thread From: Rajendra Nayak @ 2013-08-12 8:27 UTC (permalink / raw) To: linux-arm-kernel On Monday 12 August 2013 01:54 PM, Tony Lindgren wrote: > * Rajendra Nayak <rnayak@ti.com> [130811 23:47]: >> On Sunday 04 August 2013 09:57 PM, Rajendra Nayak wrote: >>> Changes in v3: >>> -1- Dropped some clock/dpll framework builds for dra7 >>> -2- Added all instances of IPs in dtsi file >>> -3- dtsi does a 'disabled' by default and dts enables as needed >>> -4- soc_is_dra7xx() based on DT compatible instead of using ID code >>> >>> Changes in v2: >>> -1- Fixed minor changelog details >>> -2- Dropped the SRAM support patch since we need to move to drivers/misc/sram.c >>> -3- Added DTS update patches to this series which were earlier posted as >>> part of the data series (Since they don't have much objections as against the >>> other in-kernel data files) >>> -4- Updated the EVM dts file with pin config details for uart/mcspi and i2c >>> >>> DRA7xx based SoCs' are high-performance, infotainment application devices, >>> based on enhanced OMAP architecture integrated on a 28nm >>> technology. >>> >>> The DRA7xx family is composed of DRA75x and DRA74x devices. >>> The current device for which the patches add support is the >>> DRA752 SoC. >>> >>> Most of the core IPs are similar to those found on the OMAP5 >>> devices, including the dual cortex-A15 based MPU subsystem, >>> which has helped quite some reuse from existing OMAP5 support. >>> >>> This series contains only core support patches and none of >>> the PRCM and hwmod data needed for the device to boot. >> >> Tony, any chance of this series making it to 3.12? > > Looks OK to me, want to do a pull request against -rc5 for me? Sure, will do. Thanks. > > Regards, > > Tony > ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2013-08-12 8:27 UTC | newest] Thread overview: 16+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-08-04 16:27 [PATCH v3 0/9] DRA7xx core support Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 1/9] ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 2/9] ARM: DRA7: Reuse io tables and add a new .init_early Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 3/9] ARM: DRA7: Resue the clocksource, clockevent support Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 4/9] ARM: DRA7: board-generic: Add basic DT support Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 5/9] ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512 Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 6/9] ARM: DRA7: dts: Add the dts files for dra7 SoC and dra7-evm board Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 7/9] ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' Rajendra Nayak 2013-08-05 11:44 ` Grygorii Strashko 2013-08-06 8:11 ` Rajendra Nayak 2013-08-06 11:59 ` Grygorii Strashko 2013-08-04 16:27 ` [PATCH v3 8/9] ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5 Rajendra Nayak 2013-08-04 16:27 ` [PATCH v3 9/9] ARM: DRA7: Add the build support in omap2plus Rajendra Nayak 2013-08-12 6:40 ` [PATCH v3 0/9] DRA7xx core support Rajendra Nayak 2013-08-12 8:24 ` Tony Lindgren 2013-08-12 8:27 ` Rajendra Nayak
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