From: markz@nvidia.com (Mark Zhang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/5] clk: tegra: Add reset only clock node flag and COP
Date: Thu, 8 Aug 2013 13:50:22 +0800 [thread overview]
Message-ID: <5203319E.6050002@nvidia.com> (raw)
In-Reply-To: <52027C9B.2030009@wwwdotorg.org>
Okay, I don't know these background infos. If so, there is no reason to
upstream this kind of patches.
On 08/08/2013 12:58 AM, Stephen Warren wrote:
> On 08/07/2013 05:25 AM, Mark Zhang wrote:
>> From: Peter De Schrijver <pdeschrijver@nvidia.com>
>>
>> COP is a reset only clock. So this patch adds NO_CLK support
>> then adds the COP clock.
>
> Do we actually need this clock upstream yet?
>
> IIRC, Prashant was working on implementing the common reset API, so I'd
> prefer not to add any reset-only "clocks" to the clock driver, but
> rather to simply make sure that the new reset driver exposes them.
>
>> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
>
>> enum tegra114_clk {
>> - rtc = 4, timer = 5, uarta = 6, sdmmc2 = 9, i2s1 = 11, i2c1 = 12,
>> + cop = 1, rtc = 4, timer = 5, uarta = 6, sdmmc2 = 9, i2s1 = 11, i2c1 = 12,
>
> To make this change, you would also need to edit
> include/dt-bindings/clock/tegra114-car.h. BTW, why doesn't the Tegra
> clock driver include that file rather than defining its own enum?
>
next prev parent reply other threads:[~2013-08-08 5:50 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-07 11:25 [PATCH 1/5] clk: tegra: Correct sbc mux width & parent Mark Zhang
2013-08-07 11:25 ` [PATCH 2/5] clk: tegra: Add reset only clock node flag and COP Mark Zhang
2013-08-07 16:58 ` Stephen Warren
2013-08-08 5:50 ` Mark Zhang [this message]
2013-08-19 14:53 ` Peter De Schrijver
2013-08-19 16:25 ` Stephen Warren
2013-08-07 11:25 ` [PATCH 3/5] clk: tegra: Fix vde/2d/3d clock src offset Mark Zhang
2013-08-07 17:00 ` Stephen Warren
2013-08-20 8:47 ` Peter De Schrijver
2013-08-07 11:25 ` [PATCH 4/5] clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2 Mark Zhang
2013-08-20 8:47 ` Peter De Schrijver
2013-08-07 11:25 ` [PATCH 5/5] clk: tegra: Set the clk parent of host1x to pll_p Mark Zhang
2013-08-07 16:56 ` [PATCH 1/5] clk: tegra: Correct sbc mux width & parent Stephen Warren
2013-08-08 1:26 ` Mark Zhang
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